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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
12
13 config ARM64_CRC32
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
16 default y
17 help
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
21 newer.
22
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
31 default 0
32 help
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
39
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
43 help
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
50
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
53 depends on ARM64
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
56 help
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
62
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
66
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
69 depends on ARM64
70 depends on INIT_SP_RELATIVE
71 default 524288
72 help
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
77
78 config SPL_SYS_NO_VECTOR_TABLE
79 depends on SPL
80 bool
81
82 config LINUX_KERNEL_IMAGE_HEADER
83 depends on ARM64
84 bool
85 help
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
91
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
94 hex
95 help
96 The value subtracted from CONFIG_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
98
99 config GICV2
100 bool
101
102 config GICV3
103 bool
104
105 config GIC_V3_ITS
106 bool "ARM GICV3 ITS"
107 select IRQ
108 help
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
115
116 config STATIC_RELA
117 bool
118 default y if ARM64
119
120 config DMA_ADDR_T_64BIT
121 bool
122 default y if ARM64
123
124 config HAS_VBAR
125 bool
126
127 config HAS_THUMB2
128 bool
129
130 config GPIO_EXTRA_HEADER
131 bool
132
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
135 bool
136 default y
137
138 # Used for compatibility with asm files copied from the kernel
139 config THUMB2_KERNEL
140 bool
141
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
144 help
145 Do not enable instruction cache in U-Boot.
146
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
149 depends on SPL
150 default SYS_ICACHE_OFF
151 help
152 Do not enable instruction cache in SPL.
153
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
156 help
157 Do not enable data cache in U-Boot.
158
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
161 depends on SPL
162 default SYS_DCACHE_OFF
163 help
164 Do not enable data cache in SPL.
165
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
168 help
169 Select this if your processor suports enabling caches by using
170 CP15 registers.
171
172 config SYS_ARM_MMU
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
175 help
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
178
179 config SYS_ARM_MPU
180 bool 'Use the ARM v7 PMSA Compliant MPU'
181 help
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
184 memory.
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
187
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
194 # product checks:
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
202
203 config ARM_ERRATA_430973
204 bool
205
206 config ARM_ERRATA_454179
207 bool
208
209 config ARM_ERRATA_621766
210 bool
211
212 config ARM_ERRATA_716044
213 bool
214
215 config ARM_ERRATA_725233
216 bool
217
218 config ARM_ERRATA_742230
219 bool
220
221 config ARM_ERRATA_743622
222 bool
223
224 config ARM_ERRATA_751472
225 bool
226
227 config ARM_ERRATA_761320
228 bool
229
230 config ARM_ERRATA_773022
231 bool
232
233 config ARM_ERRATA_774769
234 bool
235
236 config ARM_ERRATA_794072
237 bool
238
239 config ARM_ERRATA_798870
240 bool
241
242 config ARM_ERRATA_801819
243 bool
244
245 config ARM_ERRATA_826974
246 bool
247
248 config ARM_ERRATA_828024
249 bool
250
251 config ARM_ERRATA_829520
252 bool
253
254 config ARM_ERRATA_833069
255 bool
256
257 config ARM_ERRATA_833471
258 bool
259
260 config ARM_ERRATA_845369
261 bool
262
263 config ARM_ERRATA_852421
264 bool
265
266 config ARM_ERRATA_852423
267 bool
268
269 config ARM_ERRATA_855873
270 bool
271
272 config ARM_CORTEX_A8_CVE_2017_5715
273 bool
274
275 config ARM_CORTEX_A15_CVE_2017_5715
276 bool
277
278 config CPU_ARM720T
279 bool
280 select SYS_CACHE_SHIFT_5
281 imply SYS_ARM_MMU
282
283 config CPU_ARM920T
284 bool
285 select SYS_CACHE_SHIFT_5
286 imply SYS_ARM_MMU
287
288 config CPU_ARM926EJS
289 bool
290 select SYS_CACHE_SHIFT_5
291 imply SYS_ARM_MMU
292 imply SPL_SEPARATE_BSS
293
294 config CPU_ARM946ES
295 bool
296 select SYS_CACHE_SHIFT_5
297 imply SYS_ARM_MMU
298
299 config CPU_ARM1136
300 bool
301 select SYS_CACHE_SHIFT_5
302 imply SYS_ARM_MMU
303 imply SPL_SEPARATE_BSS
304
305 config CPU_ARM1176
306 bool
307 select HAS_VBAR
308 select SYS_CACHE_SHIFT_5
309 imply SYS_ARM_MMU
310
311 config CPU_V7A
312 bool
313 select HAS_THUMB2
314 select HAS_VBAR
315 select SYS_CACHE_SHIFT_6
316 imply SYS_ARM_MMU
317
318 config CPU_V7M
319 bool
320 select HAS_THUMB2
321 select SYS_ARM_MPU
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
324 select THUMB2_KERNEL
325
326 config CPU_V7R
327 bool
328 select HAS_THUMB2
329 select SYS_ARM_CACHE_CP15
330 select SYS_ARM_MPU
331 select SYS_CACHE_SHIFT_6
332
333 config SYS_CPU
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
344
345 config SYS_ARM_ARCH
346 int
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
353 default 7 if CPU_V7A
354 default 7 if CPU_V7M
355 default 7 if CPU_V7R
356 default 8 if ARM64
357
358 choice
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
362
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
365 help
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
368 cleaned.
369
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
372 help
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
375
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
378 help
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
382 write is performed.
383 endchoice
384
385 config ARCH_VERY_EARLY_INIT
386 bool
387
388 config SPL_ARCH_VERY_EARLY_INIT
389 bool
390
391 config ARCH_CPU_INIT
392 bool "Enable ARCH_CPU_INIT"
393 help
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
396
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
400 default y if ARM64
401 help
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
405 on ARMv7 systems.
406
407 config ARM_SMCCC
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
410 select ARM_PSCI_FW
411 help
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
415
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
418 depends on !ARM64
419 help
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
424
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
429 help
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
434
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
439 help
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
444
445 config SYS_L2_PL310
446 bool "ARM PL310 L2 cache controller"
447 help
448 Enable support for ARM PL310 L2 cache controller in U-Boot
449
450 config SPL_SYS_L2_PL310
451 bool "ARM PL310 L2 cache controller in SPL"
452 help
453 Enable support for ARM PL310 L2 cache controller in SPL
454
455 config SYS_L2CACHE_OFF
456 bool "L2cache off"
457 help
458 If SoC does not support L2CACHE or one does not want to enable
459 L2CACHE, choose this option.
460
461 config ENABLE_ARM_SOC_BOOT0_HOOK
462 bool "prepare BOOT0 header"
463 help
464 If the SoC's BOOT0 requires a header area filled with (magic)
465 values, then choose this option, and create a file included as
466 <asm/arch/boot0.h> which contains the required assembler code.
467
468 config USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy"
470 default y if !ARM64
471 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
472 help
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
476
477 config SPL_USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy for SPL"
479 default y if USE_ARCH_MEMCPY
480 depends on SPL
481 help
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
485
486 config TPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for TPL"
488 default y if USE_ARCH_MEMCPY
489 depends on TPL
490 help
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
494
495 config USE_ARCH_MEMMOVE
496 bool "Use an assembly optimized implementation of memmove" if !ARM64
497 default USE_ARCH_MEMCPY if ARM64
498 depends on ARM64
499 help
500 Enable the generation of an optimized version of memmove.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
503
504 config SPL_USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
506 default SPL_USE_ARCH_MEMCPY if ARM64
507 depends on SPL && ARM64
508 help
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
512
513 config TPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
515 default TPL_USE_ARCH_MEMCPY if ARM64
516 depends on TPL && ARM64
517 help
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
521
522 config USE_ARCH_MEMSET
523 bool "Use an assembly optimized implementation of memset"
524 default y if !ARM64
525 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
526 help
527 Enable the generation of an optimized version of memset.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
530
531 config SPL_USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset for SPL"
533 default y if USE_ARCH_MEMSET
534 depends on SPL
535 help
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
539
540 config TPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for TPL"
542 default y if USE_ARCH_MEMSET
543 depends on TPL
544 help
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
548
549 config ARM64_SUPPORT_AARCH32
550 bool "ARM64 system support AArch32 execution state"
551 depends on ARM64
552 default y if !TARGET_THUNDERX_88XX
553 help
554 This ARM64 system supports AArch32 execution state.
555
556 config IPROC
557 bool
558
559 config S5P
560 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
561
562 choice
563 prompt "Target select"
564 default TARGET_HIKEY
565
566 config ARCH_AT91
567 bool "Atmel AT91"
568 select GPIO_EXTRA_HEADER
569 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
570 select SPL_SEPARATE_BSS if SPL
571
572 config ARCH_DAVINCI
573 bool "TI DaVinci"
574 select CPU_ARM926EJS
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
577 imply CMD_SAVES
578 help
579 Support for TI's DaVinci platform.
580
581 config ARCH_KIRKWOOD
582 bool "Marvell Kirkwood"
583 select ARCH_MISC_INIT
584 select BOARD_EARLY_INIT_F
585 select CPU_ARM926EJS
586 select GPIO_EXTRA_HEADER
587 select TIMER
588
589 config ARCH_MVEBU
590 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
591 select ARCH_EARLY_INIT_R if ARM64
592 select DM
593 select DM_SERIAL
594 select DM_SPI
595 select DM_SPI_FLASH
596 select GPIO_EXTRA_HEADER
597 select SPL_DM_SPI if SPL
598 select SPL_DM_SPI_FLASH if SPL
599 select SPL_TIMER if SPL
600 select TIMER if !ARM64
601 select OF_CONTROL
602 select OF_SEPARATE
603 select SPI
604 imply CMD_DM
605
606 config ARCH_ORION5X
607 bool "Marvell Orion"
608 select CPU_ARM926EJS
609 select GPIO_EXTRA_HEADER
610 select SPL_SEPARATE_BSS if SPL
611 select TIMER
612
613 config TARGET_STV0991
614 bool "Support stv0991"
615 select CPU_V7A
616 select DM
617 select DM_SERIAL
618 select DM_SPI
619 select DM_SPI_FLASH
620 select GPIO_EXTRA_HEADER
621 select PL01X_SERIAL
622 select SPI
623 select SPI_FLASH
624 imply CMD_DM
625
626 config ARCH_BCM283X
627 bool "Broadcom BCM283X family"
628 select DM
629 select DM_GPIO
630 select DM_SERIAL
631 select GPIO_EXTRA_HEADER
632 select OF_CONTROL
633 select PL01X_SERIAL
634 select SERIAL_SEARCH_ALL
635 imply CMD_DM
636 imply FAT_WRITE
637
638 config ARCH_BCMSTB
639 bool "Broadcom BCM7XXX family"
640 select CPU_V7A
641 select DM
642 select GPIO_EXTRA_HEADER
643 select OF_CONTROL
644 imply CMD_DM
645 imply OF_HAS_PRIOR_STAGE
646 help
647 This enables support for Broadcom ARM-based set-top box
648 chipsets, including the 7445 family of chips.
649
650 config ARCH_BCMBCA
651 bool "Broadcom broadband chip family"
652 select DM
653 select OF_CONTROL
654 imply CMD_DM
655
656 config TARGET_VEXPRESS_CA9X4
657 bool "Support vexpress_ca9x4"
658 select CPU_V7A
659 select PL011_SERIAL
660
661 config TARGET_BCMCYGNUS
662 bool "Support bcmcygnus"
663 select CPU_V7A
664 select GPIO_EXTRA_HEADER
665 select IPROC
666 imply BCM_SF2_ETH
667 imply BCM_SF2_ETH_GMAC
668 imply CMD_HASH
669 imply CRC32_VERIFY
670 imply FAT_WRITE
671 imply HASH_VERIFY
672 imply NETDEVICES
673
674 config TARGET_BCMNS2
675 bool "Support Broadcom Northstar2"
676 select ARM64
677 select GPIO_EXTRA_HEADER
678 help
679 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
680 ARMv8 Cortex-A57 processors targeting a broad range of networking
681 applications.
682
683 config TARGET_BCMNS3
684 bool "Support Broadcom NS3"
685 select ARM64
686 select BOARD_LATE_INIT
687 help
688 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
689 ARMv8 Cortex-A72 processors targeting a broad range of networking
690 applications.
691
692 config ARCH_EXYNOS
693 bool "Samsung EXYNOS"
694 select DM
695 select DM_GPIO
696 select DM_I2C
697 select DM_KEYBOARD
698 select DM_SERIAL
699 select DM_SPI
700 select DM_SPI_FLASH
701 select SPI
702 select GPIO_EXTRA_HEADER
703 imply SYS_THUMB_BUILD
704 imply CMD_DM
705 imply FAT_WRITE
706
707 config ARCH_S5PC1XX
708 bool "Samsung S5PC1XX"
709 select CPU_V7A
710 select DM
711 select DM_GPIO
712 select DM_I2C
713 select DM_SERIAL
714 select GPIO_EXTRA_HEADER
715 imply CMD_DM
716
717 config ARCH_HIGHBANK
718 bool "Calxeda Highbank"
719 select CPU_V7A
720 select PL01X_SERIAL
721 select DM
722 select DM_SERIAL
723 select OF_CONTROL
724 select CLK
725 select CLK_CCF
726 select AHCI
727 select PHYS_64BIT
728 select TIMER
729 select SP804_TIMER
730 imply OF_HAS_PRIOR_STAGE
731
732 config ARCH_INTEGRATOR
733 bool "ARM Ltd. Integrator family"
734 select DM
735 select DM_SERIAL
736 select GPIO_EXTRA_HEADER
737 select PL01X_SERIAL
738 imply CMD_DM
739
740 config ARCH_IPQ40XX
741 bool "Qualcomm IPQ40xx SoCs"
742 select CPU_V7A
743 select DM
744 select DM_GPIO
745 select DM_SERIAL
746 select DM_RESET
747 select GPIO_EXTRA_HEADER
748 select MSM_SMEM
749 select PINCTRL
750 select CLK
751 select SMEM
752 select OF_CONTROL
753 imply CMD_DM
754
755 config ARCH_KEYSTONE
756 bool "TI Keystone"
757 select CMD_POWEROFF
758 select CPU_V7A
759 select DDR_SPD
760 select SUPPORT_SPL
761 select SYS_ARCH_TIMER
762 select SYS_THUMB_BUILD
763 imply CMD_MTDPARTS
764 imply CMD_SAVES
765 imply FIT
766
767 config ARCH_K3
768 bool "Texas Instruments' K3 Architecture"
769 select SPL
770 select SUPPORT_SPL
771 select FIT
772
773 config ARCH_OMAP2PLUS
774 bool "TI OMAP2+"
775 select CPU_V7A
776 select GPIO_EXTRA_HEADER
777 select SPL_BOARD_INIT if SPL
778 select SPL_STACK_R if SPL
779 select SUPPORT_SPL
780 imply TI_SYSC if DM && OF_CONTROL
781 imply FIT
782 imply SPL_SEPARATE_BSS
783
784 config ARCH_MESON
785 bool "Amlogic Meson"
786 select GPIO_EXTRA_HEADER
787 imply DISTRO_DEFAULTS
788 imply DM_RNG
789 help
790 Support for the Meson SoC family developed by Amlogic Inc.,
791 targeted at media players and tablet computers. We currently
792 support the S905 (GXBaby) 64-bit SoC.
793
794 config ARCH_MEDIATEK
795 bool "MediaTek SoCs"
796 select DM
797 select GPIO_EXTRA_HEADER
798 select OF_CONTROL
799 select SPL_DM if SPL
800 select SPL_LIBCOMMON_SUPPORT if SPL
801 select SPL_LIBGENERIC_SUPPORT if SPL
802 select SPL_OF_CONTROL if SPL
803 select SUPPORT_SPL
804 help
805 Support for the MediaTek SoCs family developed by MediaTek Inc.
806 Please refer to doc/README.mediatek for more information.
807
808 config ARCH_LPC32XX
809 bool "NXP LPC32xx platform"
810 select CPU_ARM926EJS
811 select DM
812 select DM_GPIO
813 select DM_SERIAL
814 select GPIO_EXTRA_HEADER
815 select SPL_DM if SPL
816 select SUPPORT_SPL
817 imply CMD_DM
818
819 config ARCH_IMX8
820 bool "NXP i.MX8 platform"
821 select ARM64
822 select SYS_FSL_HAS_SEC
823 select SYS_FSL_SEC_COMPAT_4
824 select SYS_FSL_SEC_LE
825 select DM
826 select DM_EVENT
827 select GPIO_EXTRA_HEADER
828 select MACH_IMX
829 select OF_CONTROL
830 select ENABLE_ARM_SOC_BOOT0_HOOK
831
832 config ARCH_IMX8M
833 bool "NXP i.MX8M platform"
834 select ARM64
835 select GPIO_EXTRA_HEADER
836 select MACH_IMX
837 select SYS_FSL_HAS_SEC
838 select SYS_FSL_SEC_COMPAT_4
839 select SYS_FSL_SEC_LE
840 select SYS_I2C_MXC
841 select DM
842 select DM_EVENT if CLK
843 select SUPPORT_SPL
844 imply CMD_DM
845
846 config ARCH_IMX8ULP
847 bool "NXP i.MX8ULP platform"
848 select ARM64
849 select DM
850 select DM_EVENT
851 select MACH_IMX
852 select OF_CONTROL
853 select SUPPORT_SPL
854 select GPIO_EXTRA_HEADER
855 select MISC
856 select IMX_SENTINEL
857 imply CMD_DM
858
859 config ARCH_IMX9
860 bool "NXP i.MX9 platform"
861 select ARM64
862 select DM
863 select DM_EVENT
864 select MACH_IMX
865 select SUPPORT_SPL
866 select GPIO_EXTRA_HEADER
867 select MISC
868 select IMX_SENTINEL
869 imply CMD_DM
870
871 config ARCH_IMXRT
872 bool "NXP i.MXRT platform"
873 select CPU_V7M
874 select DM
875 select DM_SERIAL
876 select GPIO_EXTRA_HEADER
877 select MACH_IMX
878 select SUPPORT_SPL
879 imply CMD_DM
880
881 config ARCH_MX23
882 bool "NXP i.MX23 family"
883 select CPU_ARM926EJS
884 select GPIO_EXTRA_HEADER
885 select MACH_IMX
886 select PL011_SERIAL
887 select SUPPORT_SPL
888
889 config ARCH_MX28
890 bool "NXP i.MX28 family"
891 select CPU_ARM926EJS
892 select GPIO_EXTRA_HEADER
893 select PL011_SERIAL
894 select MACH_IMX
895 select SUPPORT_SPL
896
897 config ARCH_MX31
898 bool "NXP i.MX31 family"
899 select CPU_ARM1136
900 select GPIO_EXTRA_HEADER
901 select MACH_IMX
902
903 config ARCH_MX7ULP
904 bool "NXP MX7ULP"
905 select BOARD_POSTCLK_INIT
906 select CPU_V7A
907 select GPIO_EXTRA_HEADER
908 select MACH_IMX
909 select SYS_FSL_HAS_SEC
910 select SYS_FSL_SEC_COMPAT_4
911 select SYS_FSL_SEC_LE
912 select ROM_UNIFIED_SECTIONS
913 imply MXC_GPIO
914 imply SYS_THUMB_BUILD
915
916 config ARCH_MX7
917 bool "Freescale MX7"
918 select ARCH_MISC_INIT
919 select CPU_V7A
920 select GPIO_EXTRA_HEADER
921 select MACH_IMX
922 select MXC_GPT_HCLK
923 select SYS_FSL_HAS_SEC
924 select SYS_FSL_SEC_COMPAT_4
925 select SYS_FSL_SEC_LE
926 imply BOARD_EARLY_INIT_F
927 imply MXC_GPIO
928 imply SYS_THUMB_BUILD
929
930 config ARCH_MX6
931 bool "Freescale MX6"
932 select BOARD_POSTCLK_INIT
933 select CPU_V7A
934 select GPIO_EXTRA_HEADER
935 select MACH_IMX
936 select MXC_GPT_HCLK
937 select SYS_FSL_HAS_SEC
938 select SYS_FSL_SEC_COMPAT_4
939 select SYS_FSL_SEC_LE
940 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
941 imply MXC_GPIO
942 imply SYS_THUMB_BUILD
943 imply SPL_SEPARATE_BSS
944
945 config ARCH_MX5
946 bool "Freescale MX5"
947 select BOARD_EARLY_INIT_F
948 select CPU_V7A
949 select GPIO_EXTRA_HEADER
950 select MACH_IMX
951 imply MXC_GPIO
952
953 config ARCH_NEXELL
954 bool "Nexell S5P4418/S5P6818 SoC"
955 select ENABLE_ARM_SOC_BOOT0_HOOK
956 select DM
957 select GPIO_EXTRA_HEADER
958
959 config ARCH_NPCM
960 bool "Support Nuvoton SoCs"
961 select DM
962 select OF_CONTROL
963 imply CMD_DM
964
965 config ARCH_APPLE
966 bool "Apple SoCs"
967 select ARM64
968 select CLK
969 select CMD_PCI
970 select CMD_USB
971 select DM
972 select DM_GPIO
973 select DM_KEYBOARD
974 select DM_MAILBOX
975 select DM_RESET
976 select DM_SERIAL
977 select DM_SPI
978 select DM_USB
979 select VIDEO
980 select IOMMU
981 select LINUX_KERNEL_IMAGE_HEADER
982 select OF_BOARD_SETUP
983 select OF_CONTROL
984 select PCI
985 select PINCTRL
986 select POSITION_INDEPENDENT
987 select POWER_DOMAIN
988 select REGMAP
989 select SPI
990 select SYSCON
991 select SYSRESET
992 select SYSRESET_WATCHDOG
993 select SYSRESET_WATCHDOG_AUTO
994 select USB
995 imply CMD_DM
996 imply CMD_GPT
997 imply DISTRO_DEFAULTS
998 imply OF_HAS_PRIOR_STAGE
999
1000 config ARCH_OWL
1001 bool "Actions Semi OWL SoCs"
1002 select DM
1003 select DM_SERIAL
1004 select GPIO_EXTRA_HEADER
1005 select OWL_SERIAL
1006 select CLK
1007 select CLK_OWL
1008 select OF_CONTROL
1009 select SYS_RELOC_GD_ENV_ADDR
1010 imply CMD_DM
1011
1012 config ARCH_QEMU
1013 bool "QEMU Virtual Platform"
1014 select DM
1015 select DM_SERIAL
1016 select OF_CONTROL
1017 select PL01X_SERIAL
1018 imply CMD_DM
1019 imply DM_RNG
1020 imply DM_RTC
1021 imply RTC_PL031
1022 imply OF_HAS_PRIOR_STAGE
1023
1024 config ARCH_RMOBILE
1025 bool "Renesas ARM SoCs"
1026 select DM
1027 select DM_SERIAL
1028 select GPIO_EXTRA_HEADER
1029 imply BOARD_EARLY_INIT_F
1030 imply CMD_DM
1031 imply FAT_WRITE
1032 imply SYS_THUMB_BUILD
1033 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1034
1035 config ARCH_SNAPDRAGON
1036 bool "Qualcomm Snapdragon SoCs"
1037 select ARM64
1038 select DM
1039 select DM_GPIO
1040 select DM_SERIAL
1041 select GPIO_EXTRA_HEADER
1042 select MSM_SMEM
1043 select OF_CONTROL
1044 select OF_SEPARATE
1045 select SMEM
1046 select SPMI
1047 imply CMD_DM
1048
1049 config ARCH_SOCFPGA
1050 bool "Altera SOCFPGA family"
1051 select ARCH_EARLY_INIT_R
1052 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1053 select ARM64 if TARGET_SOCFPGA_SOC64
1054 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1055 select DM
1056 select DM_SERIAL
1057 select GICV2
1058 select GPIO_EXTRA_HEADER
1059 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1060 select OF_CONTROL
1061 select SPL_DM_RESET if DM_RESET
1062 select SPL_DM_SERIAL
1063 select SPL_LIBCOMMON_SUPPORT
1064 select SPL_LIBGENERIC_SUPPORT
1065 select SPL_OF_CONTROL
1066 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1067 select SPL_SERIAL
1068 select SPL_SYSRESET
1069 select SPL_WATCHDOG
1070 select SUPPORT_SPL
1071 select SYS_NS16550
1072 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1073 select SYSRESET
1074 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1075 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1076 imply CMD_DM
1077 imply CMD_MTDPARTS
1078 imply CRC32_VERIFY
1079 imply DM_SPI
1080 imply DM_SPI_FLASH
1081 imply FAT_WRITE
1082 imply SPL
1083 imply SPL_DM
1084 imply SPL_DM_SPI
1085 imply SPL_DM_SPI_FLASH
1086 imply SPL_LIBDISK_SUPPORT
1087 imply SPL_MMC
1088 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1089 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1090 imply SPL_SPI_FLASH_SUPPORT
1091 imply SPL_SPI
1092 imply L2X0_CACHE
1093
1094 config ARCH_SUNXI
1095 bool "Support sunxi (Allwinner) SoCs"
1096 select BINMAN
1097 select CMD_GPIO
1098 select CMD_MMC if MMC
1099 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1100 select CLK
1101 select DM
1102 select DM_GPIO
1103 select DM_I2C if I2C
1104 select DM_SPI if SPI
1105 select DM_SPI_FLASH if SPI
1106 select DM_KEYBOARD
1107 select DM_MMC if MMC
1108 select DM_SCSI if SCSI
1109 select DM_SERIAL
1110 select GPIO_EXTRA_HEADER
1111 select OF_BOARD_SETUP
1112 select OF_CONTROL
1113 select OF_SEPARATE
1114 select PINCTRL
1115 select SPECIFY_CONSOLE_INDEX
1116 select SPL_SEPARATE_BSS if SPL
1117 select SPL_STACK_R if SPL
1118 select SPL_SYS_MALLOC_SIMPLE if SPL
1119 select SPL_SYS_THUMB_BUILD if !ARM64
1120 select SUNXI_GPIO
1121 select SYS_NS16550
1122 select SYS_THUMB_BUILD if !ARM64
1123 select USB if DISTRO_DEFAULTS
1124 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1125 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1126 select SPL_USE_TINY_PRINTF
1127 select USE_PREBOOT
1128 select SYS_RELOC_GD_ENV_ADDR
1129 imply BOARD_LATE_INIT
1130 imply CMD_DM
1131 imply CMD_GPT
1132 imply CMD_UBI if MTD_RAW_NAND
1133 imply DISTRO_DEFAULTS
1134 imply FAT_WRITE
1135 imply FIT
1136 imply OF_LIBFDT_OVERLAY
1137 imply PRE_CONSOLE_BUFFER
1138 imply SPL_GPIO
1139 imply SPL_LIBCOMMON_SUPPORT
1140 imply SPL_LIBGENERIC_SUPPORT
1141 imply SPL_MMC if MMC
1142 imply SPL_POWER
1143 imply SPL_SERIAL
1144 imply SYSRESET
1145 imply SYSRESET_WATCHDOG
1146 imply SYSRESET_WATCHDOG_AUTO
1147 imply USB_GADGET
1148 imply WDT
1149
1150 config ARCH_U8500
1151 bool "ST-Ericsson U8500 Series"
1152 select CPU_V7A
1153 select DM
1154 select DM_GPIO
1155 select DM_MMC if MMC
1156 select DM_SERIAL
1157 select DM_USB_GADGET if DM_USB
1158 select OF_CONTROL
1159 select SYSRESET
1160 select TIMER
1161 imply AB8500_USB_PHY
1162 imply ARM_PL180_MMCI
1163 imply CLK
1164 imply DM_PMIC
1165 imply DM_RTC
1166 imply NOMADIK_GPIO
1167 imply NOMADIK_MTU_TIMER
1168 imply PHY
1169 imply PL01X_SERIAL
1170 imply PMIC_AB8500
1171 imply RTC_PL031
1172 imply SYS_THUMB_BUILD
1173 imply SYSRESET_SYSCON
1174
1175 config ARCH_VERSAL
1176 bool "Support Xilinx Versal Platform"
1177 select ARM64
1178 select CLK
1179 select DM
1180 select DM_MMC if MMC
1181 select DM_SERIAL
1182 select GICV3
1183 select OF_CONTROL
1184 select SOC_DEVICE
1185 imply BOARD_LATE_INIT
1186 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1187
1188 config ARCH_VERSAL_NET
1189 bool "Support Xilinx Versal NET Platform"
1190 select ARM64
1191 select CLK
1192 select DM
1193 select DM_MMC if MMC
1194 select DM_SERIAL
1195 select OF_CONTROL
1196 imply BOARD_LATE_INIT
1197 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1198
1199 config ARCH_VF610
1200 bool "Freescale Vybrid"
1201 select CPU_V7A
1202 select GPIO_EXTRA_HEADER
1203 select IOMUX_SHARE_CONF_REG
1204 select MACH_IMX
1205 select SYS_FSL_ERRATUM_ESDHC111
1206 imply CMD_MTDPARTS
1207 imply MTD_RAW_NAND
1208
1209 config ARCH_ZYNQ
1210 bool "Xilinx Zynq based platform"
1211 select ARM_TWD_TIMER
1212 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1213 select CLK
1214 select CLK_ZYNQ
1215 select CPU_V7A
1216 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1217 select DM
1218 select DM_MMC if MMC
1219 select DM_SERIAL
1220 select DM_SPI
1221 select DM_SPI_FLASH
1222 select OF_CONTROL
1223 select SPI
1224 select SPL_BOARD_INIT if SPL
1225 select SPL_CLK if SPL
1226 select SPL_DM if SPL
1227 select SPL_DM_SPI if SPL
1228 select SPL_DM_SPI_FLASH if SPL
1229 select SPL_OF_CONTROL if SPL
1230 select SPL_SEPARATE_BSS if SPL
1231 select SPL_TIMER if SPL
1232 select SUPPORT_SPL
1233 select TIMER
1234 imply BOARD_LATE_INIT
1235 imply CMD_CLK
1236 imply CMD_DM
1237 imply CMD_SPL
1238 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1239 imply FAT_WRITE
1240
1241 config ARCH_ZYNQMP_R5
1242 bool "Xilinx ZynqMP R5 based platform"
1243 select CLK
1244 select CPU_V7R
1245 select DM
1246 select DM_MMC if MMC
1247 select DM_SERIAL
1248 select OF_CONTROL
1249 imply CMD_DM
1250 imply DM_USB_GADGET
1251
1252 config ARCH_ZYNQMP
1253 bool "Xilinx ZynqMP based platform"
1254 select ARM64
1255 select CLK
1256 select DM
1257 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1258 imply DM_MAILBOX
1259 select DM_MMC if MMC
1260 select DM_SERIAL
1261 select DM_SPI if SPI
1262 select DM_SPI_FLASH if DM_SPI
1263 imply FIRMWARE
1264 select GICV2
1265 select OF_CONTROL
1266 select SPL_BOARD_INIT if SPL
1267 select SPL_CLK if SPL
1268 select SPL_DM if SPL
1269 select SPL_DM_SPI if SPI && SPL_DM
1270 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1271 select SPL_DM_MAILBOX if SPL
1272 imply SPL_FIRMWARE if SPL
1273 select SPL_SEPARATE_BSS if SPL
1274 select SUPPORT_SPL
1275 imply ZYNQMP_IPI if DM_MAILBOX
1276 select SOC_DEVICE
1277 imply BOARD_LATE_INIT
1278 imply CMD_DM
1279 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1280 imply FAT_WRITE
1281 imply MP
1282 imply DM_USB_GADGET
1283 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1284
1285 config ARCH_TEGRA
1286 bool "NVIDIA Tegra"
1287 select GPIO_EXTRA_HEADER
1288 imply DISTRO_DEFAULTS
1289 imply FAT_WRITE
1290 imply SPL_TIMER if SPL
1291
1292 config ARCH_VEXPRESS64
1293 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1294 select ARM64
1295 select DM
1296 select DM_SERIAL
1297 select PL01X_SERIAL
1298 select OF_CONTROL
1299 select CLK
1300 select BLK
1301 select MTD_NOR_FLASH if MTD
1302 select FLASH_CFI_DRIVER if MTD
1303 select ENV_IS_IN_FLASH if MTD
1304 imply DISTRO_DEFAULTS
1305
1306 config TARGET_CORSTONE1000
1307 bool "Support Corstone1000 Platform"
1308 select ARM64
1309 select PL01X_SERIAL
1310 select DM
1311
1312 config TARGET_TOTAL_COMPUTE
1313 bool "Support Total Compute Platform"
1314 select ARM64
1315 select PL01X_SERIAL
1316 select DM
1317 select DM_SERIAL
1318 select DM_MMC
1319 select DM_GPIO
1320
1321 config TARGET_LS2080A_EMU
1322 bool "Support ls2080a_emu"
1323 select ARCH_LS2080A
1324 select ARM64
1325 select ARMV8_MULTIENTRY
1326 select FSL_DDR_SYNC_REFRESH
1327 select GPIO_EXTRA_HEADER
1328 help
1329 Support for Freescale LS2080A_EMU platform.
1330 The LS2080A Development System (EMULATOR) is a pre-silicon
1331 development platform that supports the QorIQ LS2080A
1332 Layerscape Architecture processor.
1333
1334 config TARGET_LS1088AQDS
1335 bool "Support ls1088aqds"
1336 select ARCH_LS1088A
1337 select ARM64
1338 select ARMV8_MULTIENTRY
1339 select ARCH_SUPPORT_TFABOOT
1340 select BOARD_LATE_INIT
1341 select GPIO_EXTRA_HEADER
1342 select SUPPORT_SPL
1343 select FSL_DDR_INTERACTIVE if !SD_BOOT
1344 help
1345 Support for NXP LS1088AQDS platform.
1346 The LS1088A Development System (QDS) is a high-performance
1347 development platform that supports the QorIQ LS1088A
1348 Layerscape Architecture processor.
1349
1350 config TARGET_LS2080AQDS
1351 bool "Support ls2080aqds"
1352 select ARCH_LS2080A
1353 select ARM64
1354 select ARMV8_MULTIENTRY
1355 select ARCH_SUPPORT_TFABOOT
1356 select BOARD_LATE_INIT
1357 select GPIO_EXTRA_HEADER
1358 select SUPPORT_SPL
1359 imply SCSI
1360 imply SCSI_AHCI
1361 select FSL_DDR_BIST
1362 select FSL_DDR_INTERACTIVE if !SPL
1363 help
1364 Support for Freescale LS2080AQDS platform.
1365 The LS2080A Development System (QDS) is a high-performance
1366 development platform that supports the QorIQ LS2080A
1367 Layerscape Architecture processor.
1368
1369 config TARGET_LS2080ARDB
1370 bool "Support ls2080ardb"
1371 select ARCH_LS2080A
1372 select ARM64
1373 select ARMV8_MULTIENTRY
1374 select ARCH_SUPPORT_TFABOOT
1375 select BOARD_LATE_INIT
1376 select SUPPORT_SPL
1377 select FSL_DDR_BIST
1378 select FSL_DDR_INTERACTIVE if !SPL
1379 select GPIO_EXTRA_HEADER
1380 imply SCSI
1381 imply SCSI_AHCI
1382 help
1383 Support for Freescale LS2080ARDB platform.
1384 The LS2080A Reference design board (RDB) is a high-performance
1385 development platform that supports the QorIQ LS2080A
1386 Layerscape Architecture processor.
1387
1388 config TARGET_LS2081ARDB
1389 bool "Support ls2081ardb"
1390 select ARCH_LS2080A
1391 select ARM64
1392 select ARMV8_MULTIENTRY
1393 select BOARD_LATE_INIT
1394 select GPIO_EXTRA_HEADER
1395 select SUPPORT_SPL
1396 help
1397 Support for Freescale LS2081ARDB platform.
1398 The LS2081A Reference design board (RDB) is a high-performance
1399 development platform that supports the QorIQ LS2081A/LS2041A
1400 Layerscape Architecture processor.
1401
1402 config TARGET_LX2160ARDB
1403 bool "Support lx2160ardb"
1404 select ARCH_LX2160A
1405 select ARM64
1406 select ARMV8_MULTIENTRY
1407 select ARCH_SUPPORT_TFABOOT
1408 select BOARD_LATE_INIT
1409 select GPIO_EXTRA_HEADER
1410 help
1411 Support for NXP LX2160ARDB platform.
1412 The lx2160ardb (LX2160A Reference design board (RDB)
1413 is a high-performance development platform that supports the
1414 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1415
1416 config TARGET_LX2160AQDS
1417 bool "Support lx2160aqds"
1418 select ARCH_LX2160A
1419 select ARM64
1420 select ARMV8_MULTIENTRY
1421 select ARCH_SUPPORT_TFABOOT
1422 select BOARD_LATE_INIT
1423 select GPIO_EXTRA_HEADER
1424 help
1425 Support for NXP LX2160AQDS platform.
1426 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1427 is a high-performance development platform that supports the
1428 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1429
1430 config TARGET_LX2162AQDS
1431 bool "Support lx2162aqds"
1432 select ARCH_LX2162A
1433 select ARCH_MISC_INIT
1434 select ARM64
1435 select ARMV8_MULTIENTRY
1436 select ARCH_SUPPORT_TFABOOT
1437 select BOARD_LATE_INIT
1438 select GPIO_EXTRA_HEADER
1439 help
1440 Support for NXP LX2162AQDS platform.
1441 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1442
1443 config TARGET_HIKEY
1444 bool "Support HiKey 96boards Consumer Edition Platform"
1445 select ARM64
1446 select DM
1447 select DM_GPIO
1448 select DM_SERIAL
1449 select GPIO_EXTRA_HEADER
1450 select OF_CONTROL
1451 select PL01X_SERIAL
1452 select SPECIFY_CONSOLE_INDEX
1453 imply CMD_DM
1454 help
1455 Support for HiKey 96boards platform. It features a HI6220
1456 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1457
1458 config TARGET_HIKEY960
1459 bool "Support HiKey960 96boards Consumer Edition Platform"
1460 select ARM64
1461 select DM
1462 select DM_SERIAL
1463 select GPIO_EXTRA_HEADER
1464 select OF_CONTROL
1465 select PL01X_SERIAL
1466 imply CMD_DM
1467 help
1468 Support for HiKey960 96boards platform. It features a HI3660
1469 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1470
1471 config TARGET_POPLAR
1472 bool "Support Poplar 96boards Enterprise Edition Platform"
1473 select ARM64
1474 select DM
1475 select DM_SERIAL
1476 select GPIO_EXTRA_HEADER
1477 select OF_CONTROL
1478 select PL01X_SERIAL
1479 imply CMD_DM
1480 help
1481 Support for Poplar 96boards EE platform. It features a HI3798cv200
1482 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1483 making it capable of running any commercial set-top solution based on
1484 Linux or Android.
1485
1486 config TARGET_LS1012AQDS
1487 bool "Support ls1012aqds"
1488 select ARCH_LS1012A
1489 select ARM64
1490 select ARCH_SUPPORT_TFABOOT
1491 select BOARD_LATE_INIT
1492 select GPIO_EXTRA_HEADER
1493 help
1494 Support for Freescale LS1012AQDS platform.
1495 The LS1012A Development System (QDS) is a high-performance
1496 development platform that supports the QorIQ LS1012A
1497 Layerscape Architecture processor.
1498
1499 config TARGET_LS1012ARDB
1500 bool "Support ls1012ardb"
1501 select ARCH_LS1012A
1502 select ARM64
1503 select ARCH_SUPPORT_TFABOOT
1504 select BOARD_LATE_INIT
1505 select GPIO_EXTRA_HEADER
1506 imply SCSI
1507 imply SCSI_AHCI
1508 help
1509 Support for Freescale LS1012ARDB platform.
1510 The LS1012A Reference design board (RDB) is a high-performance
1511 development platform that supports the QorIQ LS1012A
1512 Layerscape Architecture processor.
1513
1514 config TARGET_LS1012A2G5RDB
1515 bool "Support ls1012a2g5rdb"
1516 select ARCH_LS1012A
1517 select ARM64
1518 select ARCH_SUPPORT_TFABOOT
1519 select BOARD_LATE_INIT
1520 select GPIO_EXTRA_HEADER
1521 imply SCSI
1522 help
1523 Support for Freescale LS1012A2G5RDB platform.
1524 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1525 development platform that supports the QorIQ LS1012A
1526 Layerscape Architecture processor.
1527
1528 config TARGET_LS1012AFRWY
1529 bool "Support ls1012afrwy"
1530 select ARCH_LS1012A
1531 select ARM64
1532 select ARCH_SUPPORT_TFABOOT
1533 select BOARD_LATE_INIT
1534 select GPIO_EXTRA_HEADER
1535 imply SCSI
1536 imply SCSI_AHCI
1537 help
1538 Support for Freescale LS1012AFRWY platform.
1539 The LS1012A FRWY board (FRWY) is a high-performance
1540 development platform that supports the QorIQ LS1012A
1541 Layerscape Architecture processor.
1542
1543 config TARGET_LS1012AFRDM
1544 bool "Support ls1012afrdm"
1545 select ARCH_LS1012A
1546 select ARM64
1547 select ARCH_SUPPORT_TFABOOT
1548 select GPIO_EXTRA_HEADER
1549 help
1550 Support for Freescale LS1012AFRDM platform.
1551 The LS1012A Freedom board (FRDM) is a high-performance
1552 development platform that supports the QorIQ LS1012A
1553 Layerscape Architecture processor.
1554
1555 config TARGET_LS1028AQDS
1556 bool "Support ls1028aqds"
1557 select ARCH_LS1028A
1558 select ARM64
1559 select ARMV8_MULTIENTRY
1560 select ARCH_SUPPORT_TFABOOT
1561 select BOARD_LATE_INIT
1562 select GPIO_EXTRA_HEADER
1563 help
1564 Support for Freescale LS1028AQDS platform
1565 The LS1028A Development System (QDS) is a high-performance
1566 development platform that supports the QorIQ LS1028A
1567 Layerscape Architecture processor.
1568
1569 config TARGET_LS1028ARDB
1570 bool "Support ls1028ardb"
1571 select ARCH_LS1028A
1572 select ARM64
1573 select ARMV8_MULTIENTRY
1574 select ARCH_SUPPORT_TFABOOT
1575 select BOARD_LATE_INIT
1576 select GPIO_EXTRA_HEADER
1577 help
1578 Support for Freescale LS1028ARDB platform
1579 The LS1028A Development System (RDB) is a high-performance
1580 development platform that supports the QorIQ LS1028A
1581 Layerscape Architecture processor.
1582
1583 config TARGET_LS1088ARDB
1584 bool "Support ls1088ardb"
1585 select ARCH_LS1088A
1586 select ARM64
1587 select ARMV8_MULTIENTRY
1588 select ARCH_SUPPORT_TFABOOT
1589 select BOARD_LATE_INIT
1590 select SUPPORT_SPL
1591 select FSL_DDR_INTERACTIVE if !SD_BOOT
1592 select GPIO_EXTRA_HEADER
1593 help
1594 Support for NXP LS1088ARDB platform.
1595 The LS1088A Reference design board (RDB) is a high-performance
1596 development platform that supports the QorIQ LS1088A
1597 Layerscape Architecture processor.
1598
1599 config TARGET_LS1021AQDS
1600 bool "Support ls1021aqds"
1601 select ARCH_LS1021A
1602 select ARCH_SUPPORT_PSCI
1603 select BOARD_EARLY_INIT_F
1604 select BOARD_LATE_INIT
1605 select CPU_V7A
1606 select CPU_V7_HAS_NONSEC
1607 select CPU_V7_HAS_VIRT
1608 select LS1_DEEP_SLEEP
1609 select PEN_ADDR_BIG_ENDIAN
1610 select SUPPORT_SPL
1611 select SYS_FSL_DDR
1612 select FSL_DDR_INTERACTIVE
1613 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1614 select GPIO_EXTRA_HEADER
1615 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1616 imply SCSI
1617
1618 config TARGET_LS1021ATWR
1619 bool "Support ls1021atwr"
1620 select ARCH_LS1021A
1621 select ARCH_SUPPORT_PSCI
1622 select BOARD_EARLY_INIT_F
1623 select BOARD_LATE_INIT
1624 select CPU_V7A
1625 select CPU_V7_HAS_NONSEC
1626 select CPU_V7_HAS_VIRT
1627 select LS1_DEEP_SLEEP
1628 select PEN_ADDR_BIG_ENDIAN
1629 select SUPPORT_SPL
1630 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1631 select GPIO_EXTRA_HEADER
1632 imply SCSI
1633
1634 config TARGET_PG_WCOM_SELI8
1635 bool "Support Hitachi-Powergrids SELI8 service unit card"
1636 select ARCH_LS1021A
1637 select ARCH_SUPPORT_PSCI
1638 select BOARD_EARLY_INIT_F
1639 select BOARD_LATE_INIT
1640 select CPU_V7A
1641 select CPU_V7_HAS_NONSEC
1642 select CPU_V7_HAS_VIRT
1643 select SYS_FSL_DDR
1644 select FSL_DDR_INTERACTIVE
1645 select GPIO_EXTRA_HEADER
1646 select VENDOR_KM
1647 imply SCSI
1648 help
1649 Support for Hitachi-Powergrids SELI8 service unit card.
1650 SELI8 is a QorIQ LS1021a based service unit card used
1651 in XMC20 and FOX615 product families.
1652
1653 config TARGET_PG_WCOM_EXPU1
1654 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1655 select ARCH_LS1021A
1656 select ARCH_SUPPORT_PSCI
1657 select BOARD_EARLY_INIT_F
1658 select BOARD_LATE_INIT
1659 select CPU_V7A
1660 select CPU_V7_HAS_NONSEC
1661 select CPU_V7_HAS_VIRT
1662 select SYS_FSL_DDR
1663 select FSL_DDR_INTERACTIVE
1664 select VENDOR_KM
1665 imply SCSI
1666 help
1667 Support for Hitachi-Powergrids EXPU1 service unit card.
1668 EXPU1 is a QorIQ LS1021a based service unit card used
1669 in XMC20 and FOX615 product families.
1670
1671 config TARGET_LS1021ATSN
1672 bool "Support ls1021atsn"
1673 select ARCH_LS1021A
1674 select ARCH_SUPPORT_PSCI
1675 select BOARD_EARLY_INIT_F
1676 select BOARD_LATE_INIT
1677 select CPU_V7A
1678 select CPU_V7_HAS_NONSEC
1679 select CPU_V7_HAS_VIRT
1680 select LS1_DEEP_SLEEP
1681 select SUPPORT_SPL
1682 select GPIO_EXTRA_HEADER
1683 imply SCSI
1684
1685 config TARGET_LS1021AIOT
1686 bool "Support ls1021aiot"
1687 select ARCH_LS1021A
1688 select ARCH_SUPPORT_PSCI
1689 select BOARD_LATE_INIT
1690 select CPU_V7A
1691 select CPU_V7_HAS_NONSEC
1692 select CPU_V7_HAS_VIRT
1693 select PEN_ADDR_BIG_ENDIAN
1694 select SUPPORT_SPL
1695 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1696 select GPIO_EXTRA_HEADER
1697 imply SCSI
1698 help
1699 Support for Freescale LS1021AIOT platform.
1700 The LS1021A Freescale board (IOT) is a high-performance
1701 development platform that supports the QorIQ LS1021A
1702 Layerscape Architecture processor.
1703
1704 config TARGET_LS1043AQDS
1705 bool "Support ls1043aqds"
1706 select ARCH_LS1043A
1707 select ARM64
1708 select ARMV8_MULTIENTRY
1709 select ARCH_SUPPORT_TFABOOT
1710 select BOARD_EARLY_INIT_F
1711 select BOARD_LATE_INIT
1712 select SUPPORT_SPL
1713 select FSL_DDR_INTERACTIVE if !SPL
1714 select FSL_DSPI if !SPL_NO_DSPI
1715 select DM_SPI_FLASH if FSL_DSPI
1716 select GPIO_EXTRA_HEADER
1717 imply SCSI
1718 imply SCSI_AHCI
1719 help
1720 Support for Freescale LS1043AQDS platform.
1721
1722 config TARGET_LS1043ARDB
1723 bool "Support ls1043ardb"
1724 select ARCH_LS1043A
1725 select ARM64
1726 select ARMV8_MULTIENTRY
1727 select ARCH_SUPPORT_TFABOOT
1728 select BOARD_EARLY_INIT_F
1729 select BOARD_LATE_INIT
1730 select SUPPORT_SPL
1731 select FSL_DSPI if !SPL_NO_DSPI
1732 select DM_SPI_FLASH if FSL_DSPI
1733 select GPIO_EXTRA_HEADER
1734 help
1735 Support for Freescale LS1043ARDB platform.
1736
1737 config TARGET_LS1046AQDS
1738 bool "Support ls1046aqds"
1739 select ARCH_LS1046A
1740 select ARM64
1741 select ARMV8_MULTIENTRY
1742 select ARCH_SUPPORT_TFABOOT
1743 select BOARD_EARLY_INIT_F
1744 select BOARD_LATE_INIT
1745 select DM_SPI_FLASH if DM_SPI
1746 select SUPPORT_SPL
1747 select FSL_DDR_BIST if !SPL
1748 select FSL_DDR_INTERACTIVE if !SPL
1749 select FSL_DDR_INTERACTIVE if !SPL
1750 select GPIO_EXTRA_HEADER
1751 imply SCSI
1752 help
1753 Support for Freescale LS1046AQDS platform.
1754 The LS1046A Development System (QDS) is a high-performance
1755 development platform that supports the QorIQ LS1046A
1756 Layerscape Architecture processor.
1757
1758 config TARGET_LS1046ARDB
1759 bool "Support ls1046ardb"
1760 select ARCH_LS1046A
1761 select ARM64
1762 select ARMV8_MULTIENTRY
1763 select ARCH_SUPPORT_TFABOOT
1764 select BOARD_EARLY_INIT_F
1765 select BOARD_LATE_INIT
1766 select DM_SPI_FLASH if DM_SPI
1767 select POWER_MC34VR500
1768 select SUPPORT_SPL
1769 select FSL_DDR_BIST
1770 select FSL_DDR_INTERACTIVE if !SPL
1771 select GPIO_EXTRA_HEADER
1772 imply SCSI
1773 help
1774 Support for Freescale LS1046ARDB platform.
1775 The LS1046A Reference Design Board (RDB) is a high-performance
1776 development platform that supports the QorIQ LS1046A
1777 Layerscape Architecture processor.
1778
1779 config TARGET_LS1046AFRWY
1780 bool "Support ls1046afrwy"
1781 select ARCH_LS1046A
1782 select ARM64
1783 select ARMV8_MULTIENTRY
1784 select ARCH_SUPPORT_TFABOOT
1785 select BOARD_EARLY_INIT_F
1786 select BOARD_LATE_INIT
1787 select DM_SPI_FLASH if DM_SPI
1788 select GPIO_EXTRA_HEADER
1789 imply SCSI
1790 help
1791 Support for Freescale LS1046AFRWY platform.
1792 The LS1046A Freeway Board (FRWY) is a high-performance
1793 development platform that supports the QorIQ LS1046A
1794 Layerscape Architecture processor.
1795
1796 config TARGET_SL28
1797 bool "Support sl28"
1798 select ARCH_LS1028A
1799 select ARM64
1800 select ARMV8_MULTIENTRY
1801 select SUPPORT_SPL
1802 select BINMAN
1803 select DM
1804 select DM_GPIO
1805 select DM_I2C
1806 select DM_MMC
1807 select DM_SPI_FLASH
1808 select DM_MDIO
1809 select PCI
1810 select DM_RNG
1811 select DM_RTC
1812 select DM_SCSI
1813 select DM_SERIAL
1814 select DM_SPI
1815 select GPIO_EXTRA_HEADER
1816 select SPL_DM if SPL
1817 select SPL_DM_SPI if SPL
1818 select SPL_DM_SPI_FLASH if SPL
1819 select SPL_DM_I2C if SPL
1820 select SPL_DM_MMC if SPL
1821 select SPL_DM_SERIAL if SPL
1822 help
1823 Support for Kontron SMARC-sAL28 board.
1824
1825 config TARGET_TEN64
1826 bool "Support ten64"
1827 select ARCH_LS1088A
1828 select ARCH_MISC_INIT
1829 select ARM64
1830 select ARMV8_MULTIENTRY
1831 select ARCH_SUPPORT_TFABOOT
1832 select BOARD_LATE_INIT
1833 select SUPPORT_SPL
1834 select FSL_DDR_INTERACTIVE if !SD_BOOT
1835 select GPIO_EXTRA_HEADER
1836 help
1837 Support for Traverse Technologies Ten64 board, based
1838 on NXP LS1088A.
1839
1840 config ARCH_UNIPHIER
1841 bool "Socionext UniPhier SoCs"
1842 select BOARD_LATE_INIT
1843 select DM
1844 select DM_GPIO
1845 select DM_I2C
1846 select DM_MMC
1847 select DM_MTD
1848 select DM_RESET
1849 select DM_SERIAL
1850 select OF_BOARD_SETUP
1851 select OF_CONTROL
1852 select OF_LIBFDT
1853 select PINCTRL
1854 select SPL_BOARD_INIT if SPL
1855 select SPL_DM if SPL
1856 select SPL_LIBCOMMON_SUPPORT if SPL
1857 select SPL_LIBGENERIC_SUPPORT if SPL
1858 select SPL_OF_CONTROL if SPL
1859 select SPL_PINCTRL if SPL
1860 select SUPPORT_SPL
1861 imply CMD_DM
1862 imply DISTRO_DEFAULTS
1863 imply FAT_WRITE
1864 help
1865 Support for UniPhier SoC family developed by Socionext Inc.
1866 (formerly, System LSI Business Division of Panasonic Corporation)
1867
1868 config ARCH_SYNQUACER
1869 bool "Socionext SynQuacer SoCs"
1870 select ARM64
1871 select DM
1872 select GIC_V3
1873 select PSCI_RESET
1874 select SYSRESET
1875 select SYSRESET_PSCI
1876 select OF_CONTROL
1877 help
1878 Support for SynQuacer SoC family developed by Socionext Inc.
1879 This SoC is used on 96boards EE DeveloperBox.
1880
1881 config ARCH_STM32
1882 bool "Support STMicroelectronics STM32 MCU with cortex M"
1883 select CPU_V7M
1884 select DM
1885 select DM_SERIAL
1886 imply CMD_DM
1887
1888 config ARCH_STI
1889 bool "Support STMicroelectronics SoCs"
1890 select BLK
1891 select CPU_V7A
1892 select DM
1893 select DM_MMC
1894 select DM_RESET
1895 select DM_SERIAL
1896 imply CMD_DM
1897 help
1898 Support for STMicroelectronics STiH407/10 SoC family.
1899 This SoC is used on Linaro 96Board STiH410-B2260
1900
1901 config ARCH_STM32MP
1902 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1903 select ARCH_MISC_INIT
1904 select ARCH_SUPPORT_TFABOOT
1905 select BOARD_LATE_INIT
1906 select CLK
1907 select DM
1908 select DM_GPIO
1909 select DM_RESET
1910 select DM_SERIAL
1911 select MISC
1912 select OF_CONTROL
1913 select OF_LIBFDT
1914 select OF_SYSTEM_SETUP
1915 select PINCTRL
1916 select REGMAP
1917 select SYSCON
1918 select SYSRESET
1919 select SYS_THUMB_BUILD
1920 imply SPL_SYSRESET
1921 imply CMD_DM
1922 imply CMD_POWEROFF
1923 imply OF_LIBFDT_OVERLAY
1924 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1925 imply USE_PREBOOT
1926 imply TIMESTAMP
1927 help
1928 Support for STM32MP SoC family developed by STMicroelectronics,
1929 MPUs based on ARM cortex A core
1930 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1931 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1932 chain.
1933 SPL is the unsecure FSBL for the basic boot chain.
1934
1935 config ARCH_ROCKCHIP
1936 bool "Support Rockchip SoCs"
1937 select BLK
1938 select BINMAN if SPL_OPTEE || SPL
1939 select DM
1940 select DM_GPIO
1941 select DM_I2C
1942 select DM_MMC
1943 select DM_PWM
1944 select DM_REGULATOR
1945 select DM_SERIAL
1946 select DM_SPI
1947 select DM_SPI_FLASH
1948 select ENABLE_ARM_SOC_BOOT0_HOOK
1949 select OF_CONTROL
1950 select SPI
1951 select SPL_DM if SPL
1952 select SPL_DM_SPI if SPL
1953 select SPL_DM_SPI_FLASH if SPL
1954 select SYS_MALLOC_F
1955 select SYS_THUMB_BUILD if !ARM64
1956 imply ADC
1957 imply CMD_DM
1958 imply DEBUG_UART_BOARD_INIT
1959 imply DISTRO_DEFAULTS if !ROCKCHIP_RK3399
1960 imply BOOTSTD_DEFAULTS if !DISTRO_DEFAULTS
1961 imply FAT_WRITE
1962 imply SARADC_ROCKCHIP
1963 imply SPL_SYSRESET
1964 imply SPL_SYS_MALLOC_SIMPLE
1965 imply SYS_NS16550
1966 imply TPL_SYSRESET
1967 imply USB_FUNCTION_FASTBOOT
1968
1969 config ARCH_OCTEONTX
1970 bool "Support OcteonTX SoCs"
1971 select CLK
1972 select DM
1973 select GPIO_EXTRA_HEADER
1974 select ARM64
1975 select OF_CONTROL
1976 select OF_LIVE
1977 select BOARD_LATE_INIT
1978 select SYS_CACHE_SHIFT_7
1979 select SYS_PCI_64BIT if PCI
1980 imply OF_HAS_PRIOR_STAGE
1981
1982 config ARCH_OCTEONTX2
1983 bool "Support OcteonTX2 SoCs"
1984 select CLK
1985 select DM
1986 select GPIO_EXTRA_HEADER
1987 select ARM64
1988 select OF_CONTROL
1989 select OF_LIVE
1990 select BOARD_LATE_INIT
1991 select SYS_CACHE_SHIFT_7
1992 select SYS_PCI_64BIT if PCI
1993 imply OF_HAS_PRIOR_STAGE
1994
1995 config TARGET_THUNDERX_88XX
1996 bool "Support ThunderX 88xx"
1997 select ARM64
1998 select GPIO_EXTRA_HEADER
1999 select OF_CONTROL
2000 select PL01X_SERIAL
2001 select SYS_CACHE_SHIFT_7
2002
2003 config ARCH_ASPEED
2004 bool "Support Aspeed SoCs"
2005 select DM
2006 select OF_CONTROL
2007 imply CMD_DM
2008
2009 config TARGET_DURIAN
2010 bool "Support Phytium Durian Platform"
2011 select ARM64
2012 select GPIO_EXTRA_HEADER
2013 help
2014 Support for durian platform.
2015 It has 2GB Sdram, uart and pcie.
2016
2017 config TARGET_POMELO
2018 bool "Support Phytium Pomelo Platform"
2019 select ARM64
2020 select DM
2021 select AHCI
2022 select SCSI_AHCI
2023 select AHCI_PCI
2024 select BLK
2025 select PCI
2026 select DM_PCI
2027 select SCSI
2028 select DM_SCSI
2029 select DM_SERIAL
2030 imply CMD_PCI
2031 help
2032 Support for pomelo platform.
2033 It has 8GB Sdram, uart and pcie.
2034
2035 config TARGET_PRESIDIO_ASIC
2036 bool "Support Cortina Presidio ASIC Platform"
2037 select ARM64
2038 select GICV2
2039
2040 config TARGET_XENGUEST_ARM64
2041 bool "Xen guest ARM64"
2042 select ARM64
2043 select XEN
2044 select OF_CONTROL
2045 select LINUX_KERNEL_IMAGE_HEADER
2046 select XEN_SERIAL
2047 imply OF_HAS_PRIOR_STAGE
2048
2049 config ARCH_GXP
2050 bool "Support HPE GXP SoCs"
2051 select DM
2052 select OF_CONTROL
2053 imply CMD_DM
2054
2055 endchoice
2056
2057 config SUPPORT_PASSING_ATAGS
2058 bool "Support pre-devicetree ATAG-based booting"
2059 depends on !ARM64
2060 imply SETUP_MEMORY_TAGS
2061 help
2062 Support for booting older Linux kernels, using ATAGs rather than
2063 passing a devicetree. This is option is rarely used, and the
2064 semantics are defined at
2065 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2066
2067 config SETUP_MEMORY_TAGS
2068 bool "Pass memory size information via ATAG"
2069 depends on SUPPORT_PASSING_ATAGS
2070
2071 config CMDLINE_TAG
2072 bool "Pass Linux kernel cmdline via ATAG"
2073 depends on SUPPORT_PASSING_ATAGS
2074
2075 config INITRD_TAG
2076 bool "Pass initrd starting point and size via ATAG"
2077 depends on SUPPORT_PASSING_ATAGS
2078
2079 config REVISION_TAG
2080 bool "Pass system revision via ATAG"
2081 depends on SUPPORT_PASSING_ATAGS
2082
2083 config SERIAL_TAG
2084 bool "Pass system serial number via ATAG"
2085 depends on SUPPORT_PASSING_ATAGS
2086
2087 config STATIC_MACH_TYPE
2088 bool "Statically define the Machine ID number"
2089 default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2090 help
2091 When booting via ATAGs, enable this option if we know the correct
2092 machine ID number to use at compile time. Some systems will be
2093 passed the number dynamically by whatever loads U-Boot.
2094
2095 config MACH_TYPE
2096 int "Machine ID number"
2097 depends on STATIC_MACH_TYPE
2098 default 527 if TARGET_DS109
2099 default 1955 if TARGET_NOKIA_RX51
2100 default 3036 if TARGET_DS414
2101 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2102 help
2103 When booting via ATAGs, the machine type must be passed as a number.
2104 For the full list see https://www.arm.linux.org.uk/developer/machines
2105
2106 config ARCH_SUPPORT_TFABOOT
2107 bool
2108
2109 config TFABOOT
2110 bool "Support for booting from TF-A"
2111 depends on ARCH_SUPPORT_TFABOOT
2112 help
2113 Some platforms support the setup of secure registers (for instance
2114 for CPU errata handling) or provide secure services like PSCI.
2115 Those services could also be provided by other firmware parts
2116 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2117 does not need to (and cannot) execute this code.
2118 Enabling this option will make a U-Boot binary that is relying
2119 on other firmware layers to provide secure functionality.
2120
2121 config TI_SECURE_DEVICE
2122 bool "HS Device Type Support"
2123 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2124 help
2125 If a high secure (HS) device type is being used, this config
2126 must be set. This option impacts various aspects of the
2127 build system (to create signed boot images that can be
2128 authenticated) and the code. See the doc/README.ti-secure
2129 file for further details.
2130
2131 config SYS_KWD_CONFIG
2132 string "kwbimage config file path"
2133 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2134 default "arch/arm/mach-mvebu/kwbimage.cfg"
2135 help
2136 Path within the source directory to the kwbimage.cfg file to use
2137 when packaging the U-Boot image for use.
2138
2139 source "arch/arm/mach-apple/Kconfig"
2140
2141 source "arch/arm/mach-aspeed/Kconfig"
2142
2143 source "arch/arm/mach-at91/Kconfig"
2144
2145 source "arch/arm/mach-bcm283x/Kconfig"
2146
2147 source "arch/arm/mach-bcmbca/Kconfig"
2148
2149 source "arch/arm/mach-bcmstb/Kconfig"
2150
2151 source "arch/arm/mach-davinci/Kconfig"
2152
2153 source "arch/arm/mach-exynos/Kconfig"
2154
2155 source "arch/arm/mach-hpe/gxp/Kconfig"
2156
2157 source "arch/arm/mach-highbank/Kconfig"
2158
2159 source "arch/arm/mach-integrator/Kconfig"
2160
2161 source "arch/arm/mach-ipq40xx/Kconfig"
2162
2163 source "arch/arm/mach-k3/Kconfig"
2164
2165 source "arch/arm/mach-keystone/Kconfig"
2166
2167 source "arch/arm/mach-kirkwood/Kconfig"
2168
2169 source "arch/arm/mach-lpc32xx/Kconfig"
2170
2171 source "arch/arm/mach-mvebu/Kconfig"
2172
2173 source "arch/arm/mach-octeontx/Kconfig"
2174
2175 source "arch/arm/mach-octeontx2/Kconfig"
2176
2177 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2178
2179 source "arch/arm/mach-imx/mx3/Kconfig"
2180
2181 source "arch/arm/mach-imx/mx5/Kconfig"
2182
2183 source "arch/arm/mach-imx/mx6/Kconfig"
2184
2185 source "arch/arm/mach-imx/mx7/Kconfig"
2186
2187 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2188
2189 source "arch/arm/mach-imx/imx8/Kconfig"
2190
2191 source "arch/arm/mach-imx/imx8m/Kconfig"
2192
2193 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2194
2195 source "arch/arm/mach-imx/imx9/Kconfig"
2196
2197 source "arch/arm/mach-imx/imxrt/Kconfig"
2198
2199 source "arch/arm/mach-imx/mxs/Kconfig"
2200
2201 source "arch/arm/mach-omap2/Kconfig"
2202
2203 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2204
2205 source "arch/arm/mach-orion5x/Kconfig"
2206
2207 source "arch/arm/mach-owl/Kconfig"
2208
2209 source "arch/arm/mach-rmobile/Kconfig"
2210
2211 source "arch/arm/mach-meson/Kconfig"
2212
2213 source "arch/arm/mach-mediatek/Kconfig"
2214
2215 source "arch/arm/mach-qemu/Kconfig"
2216
2217 source "arch/arm/mach-rockchip/Kconfig"
2218
2219 source "arch/arm/mach-s5pc1xx/Kconfig"
2220
2221 source "arch/arm/mach-snapdragon/Kconfig"
2222
2223 source "arch/arm/mach-socfpga/Kconfig"
2224
2225 source "arch/arm/mach-sti/Kconfig"
2226
2227 source "arch/arm/mach-stm32/Kconfig"
2228
2229 source "arch/arm/mach-stm32mp/Kconfig"
2230
2231 source "arch/arm/mach-sunxi/Kconfig"
2232
2233 source "arch/arm/mach-tegra/Kconfig"
2234
2235 source "arch/arm/mach-u8500/Kconfig"
2236
2237 source "arch/arm/mach-uniphier/Kconfig"
2238
2239 source "arch/arm/cpu/armv7/vf610/Kconfig"
2240
2241 source "arch/arm/mach-zynq/Kconfig"
2242
2243 source "arch/arm/mach-zynqmp/Kconfig"
2244
2245 source "arch/arm/mach-versal/Kconfig"
2246
2247 source "arch/arm/mach-versal-net/Kconfig"
2248
2249 source "arch/arm/mach-zynqmp-r5/Kconfig"
2250
2251 source "arch/arm/cpu/armv7/Kconfig"
2252
2253 source "arch/arm/cpu/armv8/Kconfig"
2254
2255 source "arch/arm/mach-imx/Kconfig"
2256
2257 source "arch/arm/mach-nexell/Kconfig"
2258
2259 source "arch/arm/mach-npcm/Kconfig"
2260
2261 source "board/armltd/total_compute/Kconfig"
2262 source "board/armltd/corstone1000/Kconfig"
2263 source "board/bosch/shc/Kconfig"
2264 source "board/bosch/guardian/Kconfig"
2265 source "board/Marvell/octeontx/Kconfig"
2266 source "board/Marvell/octeontx2/Kconfig"
2267 source "board/armltd/vexpress/Kconfig"
2268 source "board/armltd/vexpress64/Kconfig"
2269 source "board/cortina/presidio-asic/Kconfig"
2270 source "board/broadcom/bcmns3/Kconfig"
2271 source "board/cavium/thunderx/Kconfig"
2272 source "board/eets/pdu001/Kconfig"
2273 source "board/emulation/qemu-arm/Kconfig"
2274 source "board/freescale/ls2080aqds/Kconfig"
2275 source "board/freescale/ls2080ardb/Kconfig"
2276 source "board/freescale/ls1088a/Kconfig"
2277 source "board/freescale/ls1028a/Kconfig"
2278 source "board/freescale/ls1021aqds/Kconfig"
2279 source "board/freescale/ls1043aqds/Kconfig"
2280 source "board/freescale/ls1021atwr/Kconfig"
2281 source "board/freescale/ls1021atsn/Kconfig"
2282 source "board/freescale/ls1021aiot/Kconfig"
2283 source "board/freescale/ls1046aqds/Kconfig"
2284 source "board/freescale/ls1043ardb/Kconfig"
2285 source "board/freescale/ls1046ardb/Kconfig"
2286 source "board/freescale/ls1046afrwy/Kconfig"
2287 source "board/freescale/ls1012aqds/Kconfig"
2288 source "board/freescale/ls1012ardb/Kconfig"
2289 source "board/freescale/ls1012afrdm/Kconfig"
2290 source "board/freescale/lx2160a/Kconfig"
2291 source "board/grinn/chiliboard/Kconfig"
2292 source "board/hisilicon/hikey/Kconfig"
2293 source "board/hisilicon/hikey960/Kconfig"
2294 source "board/hisilicon/poplar/Kconfig"
2295 source "board/isee/igep003x/Kconfig"
2296 source "board/kontron/sl28/Kconfig"
2297 source "board/myir/mys_6ulx/Kconfig"
2298 source "board/samsung/common/Kconfig"
2299 source "board/siemens/common/Kconfig"
2300 source "board/seeed/npi_imx6ull/Kconfig"
2301 source "board/socionext/developerbox/Kconfig"
2302 source "board/st/stv0991/Kconfig"
2303 source "board/tcl/sl50/Kconfig"
2304 source "board/traverse/ten64/Kconfig"
2305 source "board/variscite/dart_6ul/Kconfig"
2306 source "board/vscom/baltos/Kconfig"
2307 source "board/phytium/durian/Kconfig"
2308 source "board/phytium/pomelo/Kconfig"
2309 source "board/xen/xenguest_arm64/Kconfig"
2310
2311 source "arch/arm/Kconfig.debug"
2312
2313 endmenu