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1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12 config ARM64_CRC32
13 bool "Enable support for CRC32 instruction"
14 depends on ARM64
15 default y
16 help
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
20 newer.
21
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
25 help
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
32
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
35 depends on ARM64
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
38 help
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
44
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
48
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
51 depends on ARM64
52 depends on INIT_SP_RELATIVE
53 default 524288
54 help
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
59
60 config LINUX_KERNEL_IMAGE_HEADER
61 depends on ARM64
62 bool
63 help
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
69
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
72 hex
73 help
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
76
77 config GICV2
78 bool
79
80 config GICV3
81 bool
82
83 config GIC_V3_ITS
84 bool "ARM GICV3 ITS"
85 select IRQ
86 help
87 ARM GICV3 Interrupt translation service (ITS).
88 Basic support for programming locality specific peripheral
89 interrupts (LPI) configuration tables and enable LPI tables.
90 LPI configuration table can be used by u-boot or Linux.
91 ARM GICV3 has limitation, once the LPI table is enabled, LPI
92 configuration table can not be re-programmed, unless GICV3 reset.
93
94 config STATIC_RELA
95 bool
96 default y if ARM64
97
98 config DMA_ADDR_T_64BIT
99 bool
100 default y if ARM64
101
102 config HAS_VBAR
103 bool
104
105 config HAS_THUMB2
106 bool
107
108 config GPIO_EXTRA_HEADER
109 bool
110
111 # Used for compatibility with asm files copied from the kernel
112 config ARM_ASM_UNIFIED
113 bool
114 default y
115
116 # Used for compatibility with asm files copied from the kernel
117 config THUMB2_KERNEL
118 bool
119
120 config SYS_ICACHE_OFF
121 bool "Do not enable icache"
122 help
123 Do not enable instruction cache in U-Boot.
124
125 config SPL_SYS_ICACHE_OFF
126 bool "Do not enable icache in SPL"
127 depends on SPL
128 default SYS_ICACHE_OFF
129 help
130 Do not enable instruction cache in SPL.
131
132 config SYS_DCACHE_OFF
133 bool "Do not enable dcache"
134 help
135 Do not enable data cache in U-Boot.
136
137 config SPL_SYS_DCACHE_OFF
138 bool "Do not enable dcache in SPL"
139 depends on SPL
140 default SYS_DCACHE_OFF
141 help
142 Do not enable data cache in SPL.
143
144 config SYS_ARM_CACHE_CP15
145 bool "CP15 based cache enabling support"
146 help
147 Select this if your processor suports enabling caches by using
148 CP15 registers.
149
150 config SYS_ARM_MMU
151 bool "MMU-based Paged Memory Management Support"
152 select SYS_ARM_CACHE_CP15
153 help
154 Select if you want MMU-based virtualised addressing space
155 support via paged memory management.
156
157 config SYS_ARM_MPU
158 bool 'Use the ARM v7 PMSA Compliant MPU'
159 help
160 Some ARM systems without an MMU have instead a Memory Protection
161 Unit (MPU) that defines the type and permissions for regions of
162 memory.
163 If your CPU has an MPU then you should choose 'y' here unless you
164 know that you do not want to use the MPU.
165
166 # If set, the workarounds for these ARM errata are applied early during U-Boot
167 # startup. Note that in general these options force the workarounds to be
168 # applied; no CPU-type/version detection exists, unlike the similar options in
169 # the Linux kernel. Do not set these options unless they apply! Also note that
170 # the following can be machine-specific errata. These do have ability to
171 # provide rudimentary version and machine-specific checks, but expect no
172 # product checks:
173 # CONFIG_ARM_ERRATA_430973
174 # CONFIG_ARM_ERRATA_454179
175 # CONFIG_ARM_ERRATA_621766
176 # CONFIG_ARM_ERRATA_798870
177 # CONFIG_ARM_ERRATA_801819
178 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
179 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
180
181 config ARM_ERRATA_430973
182 bool
183
184 config ARM_ERRATA_454179
185 bool
186
187 config ARM_ERRATA_621766
188 bool
189
190 config ARM_ERRATA_716044
191 bool
192
193 config ARM_ERRATA_725233
194 bool
195
196 config ARM_ERRATA_742230
197 bool
198
199 config ARM_ERRATA_743622
200 bool
201
202 config ARM_ERRATA_751472
203 bool
204
205 config ARM_ERRATA_761320
206 bool
207
208 config ARM_ERRATA_773022
209 bool
210
211 config ARM_ERRATA_774769
212 bool
213
214 config ARM_ERRATA_794072
215 bool
216
217 config ARM_ERRATA_798870
218 bool
219
220 config ARM_ERRATA_801819
221 bool
222
223 config ARM_ERRATA_826974
224 bool
225
226 config ARM_ERRATA_828024
227 bool
228
229 config ARM_ERRATA_829520
230 bool
231
232 config ARM_ERRATA_833069
233 bool
234
235 config ARM_ERRATA_833471
236 bool
237
238 config ARM_ERRATA_845369
239 bool
240
241 config ARM_ERRATA_852421
242 bool
243
244 config ARM_ERRATA_852423
245 bool
246
247 config ARM_ERRATA_855873
248 bool
249
250 config ARM_CORTEX_A8_CVE_2017_5715
251 bool
252
253 config ARM_CORTEX_A15_CVE_2017_5715
254 bool
255
256 config CPU_ARM720T
257 bool
258 select SYS_CACHE_SHIFT_5
259 imply SYS_ARM_MMU
260
261 config CPU_ARM920T
262 bool
263 select SYS_CACHE_SHIFT_5
264 imply SYS_ARM_MMU
265
266 config CPU_ARM926EJS
267 bool
268 select SYS_CACHE_SHIFT_5
269 imply SYS_ARM_MMU
270
271 config CPU_ARM946ES
272 bool
273 select SYS_CACHE_SHIFT_5
274 imply SYS_ARM_MMU
275
276 config CPU_ARM1136
277 bool
278 select SYS_CACHE_SHIFT_5
279 imply SYS_ARM_MMU
280
281 config CPU_ARM1176
282 bool
283 select HAS_VBAR
284 select SYS_CACHE_SHIFT_5
285 imply SYS_ARM_MMU
286
287 config CPU_V7A
288 bool
289 select HAS_THUMB2
290 select HAS_VBAR
291 select SYS_CACHE_SHIFT_6
292 imply SYS_ARM_MMU
293
294 config CPU_V7M
295 bool
296 select HAS_THUMB2
297 select SYS_ARM_MPU
298 select SYS_CACHE_SHIFT_5
299 select SYS_THUMB_BUILD
300 select THUMB2_KERNEL
301
302 config CPU_V7R
303 bool
304 select HAS_THUMB2
305 select SYS_ARM_CACHE_CP15
306 select SYS_ARM_MPU
307 select SYS_CACHE_SHIFT_6
308
309 config CPU_PXA
310 bool
311 select SYS_CACHE_SHIFT_5
312 imply SYS_ARM_MMU
313
314 config CPU_PXA27X
315 bool
316 select CPU_PXA
317
318 config CPU_SA1100
319 bool
320 select SYS_CACHE_SHIFT_5
321 imply SYS_ARM_MMU
322
323 config SYS_CPU
324 default "arm720t" if CPU_ARM720T
325 default "arm920t" if CPU_ARM920T
326 default "arm926ejs" if CPU_ARM926EJS
327 default "arm946es" if CPU_ARM946ES
328 default "arm1136" if CPU_ARM1136
329 default "arm1176" if CPU_ARM1176
330 default "armv7" if CPU_V7A
331 default "armv7" if CPU_V7R
332 default "armv7m" if CPU_V7M
333 default "pxa" if CPU_PXA
334 default "sa1100" if CPU_SA1100
335 default "armv8" if ARM64
336
337 config SYS_ARM_ARCH
338 int
339 default 4 if CPU_ARM720T
340 default 4 if CPU_ARM920T
341 default 5 if CPU_ARM926EJS
342 default 5 if CPU_ARM946ES
343 default 6 if CPU_ARM1136
344 default 6 if CPU_ARM1176
345 default 7 if CPU_V7A
346 default 7 if CPU_V7M
347 default 7 if CPU_V7R
348 default 5 if CPU_PXA
349 default 4 if CPU_SA1100
350 default 8 if ARM64
351
352 choice
353 prompt "Select the ARM data write cache policy"
354 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
355 CPU_PXA || RZA1
356 default SYS_ARM_CACHE_WRITEBACK
357
358 config SYS_ARM_CACHE_WRITEBACK
359 bool "Write-back (WB)"
360 help
361 A write updates the cache only and marks the cache line as dirty.
362 External memory is updated only when the line is evicted or explicitly
363 cleaned.
364
365 config SYS_ARM_CACHE_WRITETHROUGH
366 bool "Write-through (WT)"
367 help
368 A write updates both the cache and the external memory system.
369 This does not mark the cache line as dirty.
370
371 config SYS_ARM_CACHE_WRITEALLOC
372 bool "Write allocation (WA)"
373 help
374 A cache line is allocated on a write miss. This means that executing a
375 store instruction on the processor might cause a burst read to occur.
376 There is a linefill to obtain the data for the cache line, before the
377 write is performed.
378 endchoice
379
380 config ARCH_CPU_INIT
381 bool "Enable ARCH_CPU_INIT"
382 help
383 Some architectures require a call to arch_cpu_init().
384 Say Y here to enable it
385
386 config SYS_ARCH_TIMER
387 bool "ARM Generic Timer support"
388 depends on CPU_V7A || ARM64
389 default y if ARM64
390 help
391 The ARM Generic Timer (aka arch-timer) provides an architected
392 interface to a timer source on an SoC.
393 It is mandatory for ARMv8 implementation and widely available
394 on ARMv7 systems.
395
396 config ARM_SMCCC
397 bool "Support for ARM SMC Calling Convention (SMCCC)"
398 depends on CPU_V7A || ARM64
399 select ARM_PSCI_FW
400 help
401 Say Y here if you want to enable ARM SMC Calling Convention.
402 This should be enabled if U-Boot needs to communicate with system
403 firmware (for example, PSCI) according to SMCCC.
404
405 config SEMIHOSTING
406 bool "support boot from semihosting"
407 help
408 In emulated environments, semihosting is a way for
409 the hosted environment to call out to the emulator to
410 retrieve files from the host machine.
411
412 config SYS_THUMB_BUILD
413 bool "Build U-Boot using the Thumb instruction set"
414 depends on !ARM64
415 help
416 Use this flag to build U-Boot using the Thumb instruction set for
417 ARM architectures. Thumb instruction set provides better code
418 density. For ARM architectures that support Thumb2 this flag will
419 result in Thumb2 code generated by GCC.
420
421 config SPL_SYS_THUMB_BUILD
422 bool "Build SPL using the Thumb instruction set"
423 default y if SYS_THUMB_BUILD
424 depends on !ARM64 && SPL
425 help
426 Use this flag to build SPL using the Thumb instruction set for
427 ARM architectures. Thumb instruction set provides better code
428 density. For ARM architectures that support Thumb2 this flag will
429 result in Thumb2 code generated by GCC.
430
431 config TPL_SYS_THUMB_BUILD
432 bool "Build TPL using the Thumb instruction set"
433 default y if SYS_THUMB_BUILD
434 depends on TPL && !ARM64
435 help
436 Use this flag to build TPL using the Thumb instruction set for
437 ARM architectures. Thumb instruction set provides better code
438 density. For ARM architectures that support Thumb2 this flag will
439 result in Thumb2 code generated by GCC.
440
441
442 config SYS_L2CACHE_OFF
443 bool "L2cache off"
444 help
445 If SoC does not support L2CACHE or one does not want to enable
446 L2CACHE, choose this option.
447
448 config ENABLE_ARM_SOC_BOOT0_HOOK
449 bool "prepare BOOT0 header"
450 help
451 If the SoC's BOOT0 requires a header area filled with (magic)
452 values, then choose this option, and create a file included as
453 <asm/arch/boot0.h> which contains the required assembler code.
454
455 config ARM_CORTEX_CPU_IS_UP
456 bool
457
458 config USE_ARCH_MEMCPY
459 bool "Use an assembly optimized implementation of memcpy"
460 default y if !ARM64
461 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
462 help
463 Enable the generation of an optimized version of memcpy.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
466
467 config SPL_USE_ARCH_MEMCPY
468 bool "Use an assembly optimized implementation of memcpy for SPL"
469 default y if USE_ARCH_MEMCPY
470 depends on SPL
471 help
472 Enable the generation of an optimized version of memcpy.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
475
476 config TPL_USE_ARCH_MEMCPY
477 bool "Use an assembly optimized implementation of memcpy for TPL"
478 default y if USE_ARCH_MEMCPY
479 depends on TPL
480 help
481 Enable the generation of an optimized version of memcpy.
482 Such an implementation may be faster under some conditions
483 but may increase the binary size.
484
485 config USE_ARCH_MEMMOVE
486 bool "Use an assembly optimized implementation of memmove" if !ARM64
487 default USE_ARCH_MEMCPY if ARM64
488 depends on ARM64
489 help
490 Enable the generation of an optimized version of memmove.
491 Such an implementation may be faster under some conditions
492 but may increase the binary size.
493
494 config SPL_USE_ARCH_MEMMOVE
495 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
496 default SPL_USE_ARCH_MEMCPY if ARM64
497 depends on SPL && ARM64
498 help
499 Enable the generation of an optimized version of memmove.
500 Such an implementation may be faster under some conditions
501 but may increase the binary size.
502
503 config TPL_USE_ARCH_MEMMOVE
504 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
505 default TPL_USE_ARCH_MEMCPY if ARM64
506 depends on TPL && ARM64
507 help
508 Enable the generation of an optimized version of memmove.
509 Such an implementation may be faster under some conditions
510 but may increase the binary size.
511
512 config USE_ARCH_MEMSET
513 bool "Use an assembly optimized implementation of memset"
514 default y if !ARM64
515 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
516 help
517 Enable the generation of an optimized version of memset.
518 Such an implementation may be faster under some conditions
519 but may increase the binary size.
520
521 config SPL_USE_ARCH_MEMSET
522 bool "Use an assembly optimized implementation of memset for SPL"
523 default y if USE_ARCH_MEMSET
524 depends on SPL
525 help
526 Enable the generation of an optimized version of memset.
527 Such an implementation may be faster under some conditions
528 but may increase the binary size.
529
530 config TPL_USE_ARCH_MEMSET
531 bool "Use an assembly optimized implementation of memset for TPL"
532 default y if USE_ARCH_MEMSET
533 depends on TPL
534 help
535 Enable the generation of an optimized version of memset.
536 Such an implementation may be faster under some conditions
537 but may increase the binary size.
538
539 config ARM64_SUPPORT_AARCH32
540 bool "ARM64 system support AArch32 execution state"
541 depends on ARM64
542 default y if !TARGET_THUNDERX_88XX
543 help
544 This ARM64 system supports AArch32 execution state.
545
546 choice
547 prompt "Target select"
548 default TARGET_HIKEY
549
550 config ARCH_AT91
551 bool "Atmel AT91"
552 select GPIO_EXTRA_HEADER
553 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
554 select SPL_SEPARATE_BSS if SPL
555
556 config ARCH_DAVINCI
557 bool "TI DaVinci"
558 select CPU_ARM926EJS
559 select GPIO_EXTRA_HEADER
560 select SPL_DM_SPI if SPL
561 imply CMD_SAVES
562 help
563 Support for TI's DaVinci platform.
564
565 config ARCH_KIRKWOOD
566 bool "Marvell Kirkwood"
567 select ARCH_MISC_INIT
568 select BOARD_EARLY_INIT_F
569 select CPU_ARM926EJS
570 select GPIO_EXTRA_HEADER
571
572 config ARCH_MVEBU
573 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
574 select DM
575 select DM_ETH
576 select DM_SERIAL
577 select DM_SPI
578 select DM_SPI_FLASH
579 select GPIO_EXTRA_HEADER
580 select SPL_DM_SPI if SPL
581 select SPL_DM_SPI_FLASH if SPL
582 select OF_CONTROL
583 select OF_SEPARATE
584 select SPI
585 imply CMD_DM
586
587 config ARCH_ORION5X
588 bool "Marvell Orion"
589 select CPU_ARM926EJS
590 select GPIO_EXTRA_HEADER
591
592 config TARGET_STV0991
593 bool "Support stv0991"
594 select CPU_V7A
595 select DM
596 select DM_SERIAL
597 select DM_SPI
598 select DM_SPI_FLASH
599 select GPIO_EXTRA_HEADER
600 select PL01X_SERIAL
601 select SPI
602 select SPI_FLASH
603 imply CMD_DM
604
605 config ARCH_BCM283X
606 bool "Broadcom BCM283X family"
607 select DM
608 select DM_GPIO
609 select DM_SERIAL
610 select GPIO_EXTRA_HEADER
611 select OF_CONTROL
612 select PL01X_SERIAL
613 select SERIAL_SEARCH_ALL
614 imply CMD_DM
615 imply FAT_WRITE
616
617 config ARCH_BCM63158
618 bool "Broadcom BCM63158 family"
619 select DM
620 select OF_CONTROL
621 imply CMD_DM
622
623 config ARCH_BCM68360
624 bool "Broadcom BCM68360 family"
625 select DM
626 select OF_CONTROL
627 imply CMD_DM
628
629 config ARCH_BCM6858
630 bool "Broadcom BCM6858 family"
631 select DM
632 select OF_CONTROL
633 imply CMD_DM
634
635 config ARCH_BCMSTB
636 bool "Broadcom BCM7XXX family"
637 select CPU_V7A
638 select DM
639 select GPIO_EXTRA_HEADER
640 select OF_CONTROL
641 imply CMD_DM
642 imply OF_HAS_PRIOR_STAGE
643 help
644 This enables support for Broadcom ARM-based set-top box
645 chipsets, including the 7445 family of chips.
646
647 config TARGET_VEXPRESS_CA9X4
648 bool "Support vexpress_ca9x4"
649 select CPU_V7A
650 select PL011_SERIAL
651
652 config TARGET_BCMCYGNUS
653 bool "Support bcmcygnus"
654 select CPU_V7A
655 select GPIO_EXTRA_HEADER
656 imply BCM_SF2_ETH
657 imply BCM_SF2_ETH_GMAC
658 imply CMD_HASH
659 imply CRC32_VERIFY
660 imply FAT_WRITE
661 imply HASH_VERIFY
662 imply NETDEVICES
663
664 config TARGET_BCMNS2
665 bool "Support Broadcom Northstar2"
666 select ARM64
667 select GPIO_EXTRA_HEADER
668 help
669 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
670 ARMv8 Cortex-A57 processors targeting a broad range of networking
671 applications.
672
673 config TARGET_BCMNS3
674 bool "Support Broadcom NS3"
675 select ARM64
676 select BOARD_LATE_INIT
677 help
678 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
679 ARMv8 Cortex-A72 processors targeting a broad range of networking
680 applications.
681
682 config ARCH_EXYNOS
683 bool "Samsung EXYNOS"
684 select DM
685 select DM_GPIO
686 select DM_I2C
687 select DM_ETH
688 select DM_KEYBOARD
689 select DM_SERIAL
690 select DM_SPI
691 select DM_SPI_FLASH
692 select SPI
693 select GPIO_EXTRA_HEADER
694 imply SYS_THUMB_BUILD
695 imply CMD_DM
696 imply FAT_WRITE
697
698 config ARCH_S5PC1XX
699 bool "Samsung S5PC1XX"
700 select CPU_V7A
701 select DM
702 select DM_GPIO
703 select DM_I2C
704 select DM_SERIAL
705 select GPIO_EXTRA_HEADER
706 imply CMD_DM
707
708 config ARCH_HIGHBANK
709 bool "Calxeda Highbank"
710 select CPU_V7A
711 select PL01X_SERIAL
712 select DM
713 select DM_SERIAL
714 select OF_CONTROL
715 select CLK
716 select CLK_CCF
717 select AHCI
718 select DM_ETH
719 select PHYS_64BIT
720 imply OF_HAS_PRIOR_STAGE
721
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
724 select DM
725 select DM_SERIAL
726 select GPIO_EXTRA_HEADER
727 select PL01X_SERIAL
728 imply CMD_DM
729
730 config ARCH_IPQ40XX
731 bool "Qualcomm IPQ40xx SoCs"
732 select CPU_V7A
733 select DM
734 select DM_GPIO
735 select DM_SERIAL
736 select DM_RESET
737 select GPIO_EXTRA_HEADER
738 select MSM_SMEM
739 select PINCTRL
740 select CLK
741 select SMEM
742 select OF_CONTROL
743 imply CMD_DM
744
745 config ARCH_KEYSTONE
746 bool "TI Keystone"
747 select CMD_POWEROFF
748 select CPU_V7A
749 select DDR_SPD
750 select GPIO_EXTRA_HEADER
751 select SUPPORT_SPL
752 select SYS_ARCH_TIMER
753 select SYS_THUMB_BUILD
754 imply CMD_MTDPARTS
755 imply CMD_SAVES
756 imply FIT
757
758 config ARCH_K3
759 bool "Texas Instruments' K3 Architecture"
760 select SPL
761 select SUPPORT_SPL
762 select FIT
763
764 config ARCH_OMAP2PLUS
765 bool "TI OMAP2+"
766 select CPU_V7A
767 select GPIO_EXTRA_HEADER
768 select SPL_BOARD_INIT if SPL
769 select SPL_STACK_R if SPL
770 select SUPPORT_SPL
771 imply TI_SYSC if DM && OF_CONTROL
772 imply FIT
773
774 config ARCH_MESON
775 bool "Amlogic Meson"
776 select GPIO_EXTRA_HEADER
777 imply DISTRO_DEFAULTS
778 imply DM_RNG
779 help
780 Support for the Meson SoC family developed by Amlogic Inc.,
781 targeted at media players and tablet computers. We currently
782 support the S905 (GXBaby) 64-bit SoC.
783
784 config ARCH_MEDIATEK
785 bool "MediaTek SoCs"
786 select DM
787 select GPIO_EXTRA_HEADER
788 select OF_CONTROL
789 select SPL_DM if SPL
790 select SPL_LIBCOMMON_SUPPORT if SPL
791 select SPL_LIBGENERIC_SUPPORT if SPL
792 select SPL_OF_CONTROL if SPL
793 select SUPPORT_SPL
794 help
795 Support for the MediaTek SoCs family developed by MediaTek Inc.
796 Please refer to doc/README.mediatek for more information.
797
798 config ARCH_LPC32XX
799 bool "NXP LPC32xx platform"
800 select CPU_ARM926EJS
801 select DM
802 select DM_GPIO
803 select DM_SERIAL
804 select GPIO_EXTRA_HEADER
805 select SPL_DM if SPL
806 select SUPPORT_SPL
807 imply CMD_DM
808
809 config ARCH_IMX8
810 bool "NXP i.MX8 platform"
811 select ARM64
812 select DM
813 select GPIO_EXTRA_HEADER
814 select MACH_IMX
815 select OF_CONTROL
816 select ENABLE_ARM_SOC_BOOT0_HOOK
817
818 config ARCH_IMX8M
819 bool "NXP i.MX8M platform"
820 select ARM64
821 select GPIO_EXTRA_HEADER
822 select MACH_IMX
823 select SYS_FSL_HAS_SEC if IMX_HAB
824 select SYS_FSL_SEC_COMPAT_4
825 select SYS_FSL_SEC_LE
826 select SYS_I2C_MXC
827 select DM
828 select SUPPORT_SPL
829 imply CMD_DM
830
831 config ARCH_IMX8ULP
832 bool "NXP i.MX8ULP platform"
833 select ARM64
834 select DM
835 select MACH_IMX
836 select OF_CONTROL
837 select SUPPORT_SPL
838 select GPIO_EXTRA_HEADER
839 imply CMD_DM
840
841 config ARCH_IMXRT
842 bool "NXP i.MXRT platform"
843 select CPU_V7M
844 select DM
845 select DM_SERIAL
846 select GPIO_EXTRA_HEADER
847 select MACH_IMX
848 select SUPPORT_SPL
849 imply CMD_DM
850
851 config ARCH_MX23
852 bool "NXP i.MX23 family"
853 select CPU_ARM926EJS
854 select GPIO_EXTRA_HEADER
855 select MACH_IMX
856 select PL011_SERIAL
857 select SUPPORT_SPL
858
859 config ARCH_MX28
860 bool "NXP i.MX28 family"
861 select CPU_ARM926EJS
862 select GPIO_EXTRA_HEADER
863 select PL011_SERIAL
864 select MACH_IMX
865 select SUPPORT_SPL
866
867 config ARCH_MX31
868 bool "NXP i.MX31 family"
869 select CPU_ARM1136
870 select GPIO_EXTRA_HEADER
871 select MACH_IMX
872
873 config ARCH_MX7ULP
874 bool "NXP MX7ULP"
875 select CPU_V7A
876 select GPIO_EXTRA_HEADER
877 select MACH_IMX
878 select SYS_FSL_HAS_SEC if IMX_HAB
879 select SYS_FSL_SEC_COMPAT_4
880 select SYS_FSL_SEC_LE
881 select ROM_UNIFIED_SECTIONS
882 imply MXC_GPIO
883 imply SYS_THUMB_BUILD
884
885 config ARCH_MX7
886 bool "Freescale MX7"
887 select ARCH_MISC_INIT
888 select CPU_V7A
889 select GPIO_EXTRA_HEADER
890 select MACH_IMX
891 select SYS_FSL_HAS_SEC if IMX_HAB
892 select SYS_FSL_SEC_COMPAT_4
893 select SYS_FSL_SEC_LE
894 imply BOARD_EARLY_INIT_F
895 imply MXC_GPIO
896 imply SYS_THUMB_BUILD
897
898 config ARCH_MX6
899 bool "Freescale MX6"
900 select CPU_V7A
901 select GPIO_EXTRA_HEADER
902 select MACH_IMX
903 select SYS_FSL_HAS_SEC
904 select SYS_FSL_SEC_COMPAT_4
905 select SYS_FSL_SEC_LE
906 imply MXC_GPIO
907 imply SYS_THUMB_BUILD
908
909 if ARCH_MX6
910 config SPL_LDSCRIPT
911 default "arch/arm/mach-omap2/u-boot-spl.lds"
912 endif
913
914 config ARCH_MX5
915 bool "Freescale MX5"
916 select BOARD_EARLY_INIT_F
917 select CPU_V7A
918 select GPIO_EXTRA_HEADER
919 select MACH_IMX
920 imply MXC_GPIO
921
922 config ARCH_NEXELL
923 bool "Nexell S5P4418/S5P6818 SoC"
924 select ENABLE_ARM_SOC_BOOT0_HOOK
925 select DM
926 select GPIO_EXTRA_HEADER
927
928 config ARCH_APPLE
929 bool "Apple SoCs"
930 select ARM64
931 select BLK
932 select CLK
933 select CMD_USB
934 select DM
935 select DM_GPIO
936 select DM_KEYBOARD
937 select DM_SERIAL
938 select DM_USB
939 select DM_VIDEO
940 select IOMMU
941 select LINUX_KERNEL_IMAGE_HEADER
942 select OF_CONTROL
943 select PINCTRL
944 select POSITION_INDEPENDENT
945 select POWER_DOMAIN
946 select REGMAP
947 select SYSCON
948 select SYSRESET
949 select SYSRESET_WATCHDOG
950 select SYSRESET_WATCHDOG_AUTO
951 select USB
952 imply CMD_DM
953 imply CMD_GPT
954 imply DISTRO_DEFAULTS
955 imply OF_HAS_PRIOR_STAGE
956
957 config ARCH_OWL
958 bool "Actions Semi OWL SoCs"
959 select DM
960 select DM_ETH
961 select DM_SERIAL
962 select GPIO_EXTRA_HEADER
963 select OWL_SERIAL
964 select CLK
965 select CLK_OWL
966 select OF_CONTROL
967 select SYS_RELOC_GD_ENV_ADDR
968 imply CMD_DM
969
970 config ARCH_QEMU
971 bool "QEMU Virtual Platform"
972 select DM
973 select DM_SERIAL
974 select OF_CONTROL
975 select PL01X_SERIAL
976 imply CMD_DM
977 imply DM_RNG
978 imply DM_RTC
979 imply RTC_PL031
980 imply OF_HAS_PRIOR_STAGE
981
982 config ARCH_RMOBILE
983 bool "Renesas ARM SoCs"
984 select DM
985 select DM_SERIAL
986 select GPIO_EXTRA_HEADER
987 imply BOARD_EARLY_INIT_F
988 imply CMD_DM
989 imply FAT_WRITE
990 imply SYS_THUMB_BUILD
991 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
992
993 config ARCH_SNAPDRAGON
994 bool "Qualcomm Snapdragon SoCs"
995 select ARM64
996 select DM
997 select DM_GPIO
998 select DM_SERIAL
999 select GPIO_EXTRA_HEADER
1000 select MSM_SMEM
1001 select OF_CONTROL
1002 select OF_SEPARATE
1003 select SMEM
1004 select SPMI
1005 imply CMD_DM
1006
1007 config ARCH_SOCFPGA
1008 bool "Altera SOCFPGA family"
1009 select ARCH_EARLY_INIT_R
1010 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1011 select ARM64 if TARGET_SOCFPGA_SOC64
1012 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1013 select DM
1014 select DM_SERIAL
1015 select GICV2
1016 select GPIO_EXTRA_HEADER
1017 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1018 select OF_CONTROL
1019 select SPL_DM_RESET if DM_RESET
1020 select SPL_DM_SERIAL
1021 select SPL_LIBCOMMON_SUPPORT
1022 select SPL_LIBGENERIC_SUPPORT
1023 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
1024 select SPL_OF_CONTROL
1025 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1026 select SPL_SERIAL
1027 select SPL_SYSRESET
1028 select SPL_WATCHDOG
1029 select SUPPORT_SPL
1030 select SYS_NS16550
1031 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1032 select SYSRESET
1033 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1034 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1035 imply CMD_DM
1036 imply CMD_MTDPARTS
1037 imply CRC32_VERIFY
1038 imply DM_SPI
1039 imply DM_SPI_FLASH
1040 imply FAT_WRITE
1041 imply SPL
1042 imply SPL_DM
1043 imply SPL_DM_SPI
1044 imply SPL_DM_SPI_FLASH
1045 imply SPL_LIBDISK_SUPPORT
1046 imply SPL_MMC
1047 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1048 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1049 imply SPL_SPI_FLASH_SUPPORT
1050 imply SPL_SPI
1051 imply L2X0_CACHE
1052
1053 config ARCH_SUNXI
1054 bool "Support sunxi (Allwinner) SoCs"
1055 select BINMAN
1056 select CMD_GPIO
1057 select CMD_MMC if MMC
1058 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1059 select CLK
1060 select DM
1061 select DM_ETH
1062 select DM_GPIO
1063 select DM_I2C if I2C
1064 select DM_KEYBOARD
1065 select DM_MMC if MMC
1066 select DM_SCSI if SCSI
1067 select DM_SERIAL
1068 select GPIO_EXTRA_HEADER
1069 select OF_BOARD_SETUP
1070 select OF_CONTROL
1071 select OF_SEPARATE
1072 select SPECIFY_CONSOLE_INDEX
1073 select SPL_SEPARATE_BSS if SPL
1074 select SPL_STACK_R if SPL
1075 select SPL_SYS_MALLOC_SIMPLE if SPL
1076 select SPL_SYS_THUMB_BUILD if !ARM64
1077 select SUNXI_GPIO
1078 select SYS_NS16550
1079 select SYS_THUMB_BUILD if !ARM64
1080 select USB if DISTRO_DEFAULTS
1081 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1082 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1083 select SPL_USE_TINY_PRINTF
1084 select USE_PREBOOT
1085 select SYS_RELOC_GD_ENV_ADDR
1086 imply BOARD_LATE_INIT
1087 imply CMD_DM
1088 imply CMD_GPT
1089 imply CMD_UBI if MTD_RAW_NAND
1090 imply DISTRO_DEFAULTS
1091 imply FAT_WRITE
1092 imply FIT
1093 imply OF_LIBFDT_OVERLAY
1094 imply PRE_CONSOLE_BUFFER
1095 imply SPL_GPIO
1096 imply SPL_LIBCOMMON_SUPPORT
1097 imply SPL_LIBGENERIC_SUPPORT
1098 imply SPL_MMC if MMC
1099 imply SPL_POWER
1100 imply SPL_SERIAL
1101 imply SYSRESET
1102 imply SYSRESET_WATCHDOG
1103 imply SYSRESET_WATCHDOG_AUTO
1104 imply USB_GADGET
1105 imply WDT
1106
1107 config ARCH_U8500
1108 bool "ST-Ericsson U8500 Series"
1109 select CPU_V7A
1110 select DM
1111 select DM_GPIO
1112 select DM_MMC if MMC
1113 select DM_SERIAL
1114 select DM_USB_GADGET if DM_USB
1115 select OF_CONTROL
1116 select SYSRESET
1117 select TIMER
1118 imply AB8500_USB_PHY
1119 imply ARM_PL180_MMCI
1120 imply CLK
1121 imply DM_PMIC
1122 imply DM_RTC
1123 imply NOMADIK_GPIO
1124 imply NOMADIK_MTU_TIMER
1125 imply PHY
1126 imply PL01X_SERIAL
1127 imply PMIC_AB8500
1128 imply RTC_PL031
1129 imply SYS_THUMB_BUILD
1130 imply SYSRESET_SYSCON
1131
1132 config ARCH_VERSAL
1133 bool "Support Xilinx Versal Platform"
1134 select ARM64
1135 select CLK
1136 select DM
1137 select DM_ETH if NET
1138 select DM_MMC if MMC
1139 select DM_SERIAL
1140 select GICV3
1141 select GPIO_EXTRA_HEADER
1142 select OF_CONTROL
1143 select SOC_DEVICE
1144 imply BOARD_LATE_INIT
1145 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1146
1147 config ARCH_VF610
1148 bool "Freescale Vybrid"
1149 select CPU_V7A
1150 select GPIO_EXTRA_HEADER
1151 select MACH_IMX
1152 select SYS_FSL_ERRATUM_ESDHC111
1153 imply CMD_MTDPARTS
1154 imply MTD_RAW_NAND
1155
1156 config ARCH_ZYNQ
1157 bool "Xilinx Zynq based platform"
1158 select CLK
1159 select CLK_ZYNQ
1160 select CPU_V7A
1161 select DM
1162 select DM_ETH if NET
1163 select DM_MMC if MMC
1164 select DM_SERIAL
1165 select DM_SPI
1166 select DM_SPI_FLASH
1167 select GPIO_EXTRA_HEADER
1168 select OF_CONTROL
1169 select SPI
1170 select SPL_BOARD_INIT if SPL
1171 select SPL_CLK if SPL
1172 select SPL_DM if SPL
1173 select SPL_DM_SPI if SPL
1174 select SPL_DM_SPI_FLASH if SPL
1175 select SPL_OF_CONTROL if SPL
1176 select SPL_SEPARATE_BSS if SPL
1177 select SUPPORT_SPL
1178 imply ARCH_EARLY_INIT_R
1179 imply BOARD_LATE_INIT
1180 imply CMD_CLK
1181 imply CMD_DM
1182 imply CMD_SPL
1183 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1184 imply FAT_WRITE
1185
1186 config ARCH_ZYNQMP_R5
1187 bool "Xilinx ZynqMP R5 based platform"
1188 select CLK
1189 select CPU_V7R
1190 select DM
1191 select DM_ETH if NET
1192 select DM_MMC if MMC
1193 select DM_SERIAL
1194 select GPIO_EXTRA_HEADER
1195 select OF_CONTROL
1196 imply CMD_DM
1197 imply DM_USB_GADGET
1198
1199 config ARCH_ZYNQMP
1200 bool "Xilinx ZynqMP based platform"
1201 select ARM64
1202 select CLK
1203 select DM
1204 select DM_ETH if NET
1205 select DM_MAILBOX
1206 select DM_MMC if MMC
1207 select DM_SERIAL
1208 select DM_SPI if SPI
1209 select DM_SPI_FLASH if DM_SPI
1210 select FIRMWARE
1211 select GICV2
1212 select GPIO_EXTRA_HEADER
1213 select OF_CONTROL
1214 select SPL_BOARD_INIT if SPL
1215 select SPL_CLK if SPL
1216 select SPL_DM if SPL
1217 select SPL_DM_SPI if SPI && SPL_DM
1218 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1219 select SPL_DM_MAILBOX if SPL
1220 select SPL_FIRMWARE if SPL
1221 select SPL_SEPARATE_BSS if SPL
1222 select SUPPORT_SPL
1223 select ZYNQMP_IPI
1224 select SOC_DEVICE
1225 imply BOARD_LATE_INIT
1226 imply CMD_DM
1227 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1228 imply FAT_WRITE
1229 imply MP
1230 imply DM_USB_GADGET
1231
1232 config ARCH_TEGRA
1233 bool "NVIDIA Tegra"
1234 select GPIO_EXTRA_HEADER
1235 imply DISTRO_DEFAULTS
1236 imply FAT_WRITE
1237
1238 config TARGET_VEXPRESS64_AEMV8A
1239 bool "Support vexpress_aemv8a"
1240 select ARM64
1241 select GPIO_EXTRA_HEADER
1242 select PL01X_SERIAL
1243
1244 config TARGET_VEXPRESS64_BASE_FVP
1245 bool "Support Versatile Express ARMv8a FVP BASE model"
1246 select ARM64
1247 select GPIO_EXTRA_HEADER
1248 select PL01X_SERIAL
1249 select SEMIHOSTING
1250
1251 config TARGET_VEXPRESS64_JUNO
1252 bool "Support Versatile Express Juno Development Platform"
1253 select ARM64
1254 select GPIO_EXTRA_HEADER
1255 select PL01X_SERIAL
1256 select DM
1257 select OF_CONTROL
1258 select CLK
1259 select DM_SERIAL
1260 select ARM_PSCI_FW
1261 select PSCI_RESET
1262 select DM_ETH
1263 select BLK
1264 select USB
1265 imply OF_HAS_PRIOR_STAGE
1266
1267 config TARGET_TOTAL_COMPUTE
1268 bool "Support Total Compute Platform"
1269 select ARM64
1270 select PL01X_SERIAL
1271 select DM
1272 select DM_SERIAL
1273 select DM_MMC
1274 select DM_GPIO
1275
1276 config TARGET_LS2080A_EMU
1277 bool "Support ls2080a_emu"
1278 select ARCH_LS2080A
1279 select ARM64
1280 select ARMV8_MULTIENTRY
1281 select FSL_DDR_SYNC_REFRESH
1282 select GPIO_EXTRA_HEADER
1283 help
1284 Support for Freescale LS2080A_EMU platform.
1285 The LS2080A Development System (EMULATOR) is a pre-silicon
1286 development platform that supports the QorIQ LS2080A
1287 Layerscape Architecture processor.
1288
1289 config TARGET_LS1088AQDS
1290 bool "Support ls1088aqds"
1291 select ARCH_LS1088A
1292 select ARM64
1293 select ARMV8_MULTIENTRY
1294 select ARCH_SUPPORT_TFABOOT
1295 select BOARD_LATE_INIT
1296 select GPIO_EXTRA_HEADER
1297 select SUPPORT_SPL
1298 select FSL_DDR_INTERACTIVE if !SD_BOOT
1299 help
1300 Support for NXP LS1088AQDS platform.
1301 The LS1088A Development System (QDS) is a high-performance
1302 development platform that supports the QorIQ LS1088A
1303 Layerscape Architecture processor.
1304
1305 config TARGET_LS2080AQDS
1306 bool "Support ls2080aqds"
1307 select ARCH_LS2080A
1308 select ARM64
1309 select ARMV8_MULTIENTRY
1310 select ARCH_SUPPORT_TFABOOT
1311 select BOARD_LATE_INIT
1312 select GPIO_EXTRA_HEADER
1313 select SUPPORT_SPL
1314 imply SCSI
1315 imply SCSI_AHCI
1316 select FSL_DDR_BIST
1317 select FSL_DDR_INTERACTIVE if !SPL
1318 help
1319 Support for Freescale LS2080AQDS platform.
1320 The LS2080A Development System (QDS) is a high-performance
1321 development platform that supports the QorIQ LS2080A
1322 Layerscape Architecture processor.
1323
1324 config TARGET_LS2080ARDB
1325 bool "Support ls2080ardb"
1326 select ARCH_LS2080A
1327 select ARM64
1328 select ARMV8_MULTIENTRY
1329 select ARCH_SUPPORT_TFABOOT
1330 select BOARD_LATE_INIT
1331 select SUPPORT_SPL
1332 select FSL_DDR_BIST
1333 select FSL_DDR_INTERACTIVE if !SPL
1334 select GPIO_EXTRA_HEADER
1335 imply SCSI
1336 imply SCSI_AHCI
1337 help
1338 Support for Freescale LS2080ARDB platform.
1339 The LS2080A Reference design board (RDB) is a high-performance
1340 development platform that supports the QorIQ LS2080A
1341 Layerscape Architecture processor.
1342
1343 config TARGET_LS2081ARDB
1344 bool "Support ls2081ardb"
1345 select ARCH_LS2080A
1346 select ARM64
1347 select ARMV8_MULTIENTRY
1348 select BOARD_LATE_INIT
1349 select GPIO_EXTRA_HEADER
1350 select SUPPORT_SPL
1351 help
1352 Support for Freescale LS2081ARDB platform.
1353 The LS2081A Reference design board (RDB) is a high-performance
1354 development platform that supports the QorIQ LS2081A/LS2041A
1355 Layerscape Architecture processor.
1356
1357 config TARGET_LX2160ARDB
1358 bool "Support lx2160ardb"
1359 select ARCH_LX2160A
1360 select ARM64
1361 select ARMV8_MULTIENTRY
1362 select ARCH_SUPPORT_TFABOOT
1363 select BOARD_LATE_INIT
1364 select GPIO_EXTRA_HEADER
1365 help
1366 Support for NXP LX2160ARDB platform.
1367 The lx2160ardb (LX2160A Reference design board (RDB)
1368 is a high-performance development platform that supports the
1369 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1370
1371 config TARGET_LX2160AQDS
1372 bool "Support lx2160aqds"
1373 select ARCH_LX2160A
1374 select ARM64
1375 select ARMV8_MULTIENTRY
1376 select ARCH_SUPPORT_TFABOOT
1377 select BOARD_LATE_INIT
1378 select GPIO_EXTRA_HEADER
1379 help
1380 Support for NXP LX2160AQDS platform.
1381 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1382 is a high-performance development platform that supports the
1383 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1384
1385 config TARGET_LX2162AQDS
1386 bool "Support lx2162aqds"
1387 select ARCH_LX2162A
1388 select ARCH_MISC_INIT
1389 select ARM64
1390 select ARMV8_MULTIENTRY
1391 select ARCH_SUPPORT_TFABOOT
1392 select BOARD_LATE_INIT
1393 select GPIO_EXTRA_HEADER
1394 help
1395 Support for NXP LX2162AQDS platform.
1396 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1397
1398 config TARGET_HIKEY
1399 bool "Support HiKey 96boards Consumer Edition Platform"
1400 select ARM64
1401 select DM
1402 select DM_GPIO
1403 select DM_SERIAL
1404 select GPIO_EXTRA_HEADER
1405 select OF_CONTROL
1406 select PL01X_SERIAL
1407 select SPECIFY_CONSOLE_INDEX
1408 imply CMD_DM
1409 help
1410 Support for HiKey 96boards platform. It features a HI6220
1411 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1412
1413 config TARGET_HIKEY960
1414 bool "Support HiKey960 96boards Consumer Edition Platform"
1415 select ARM64
1416 select DM
1417 select DM_SERIAL
1418 select GPIO_EXTRA_HEADER
1419 select OF_CONTROL
1420 select PL01X_SERIAL
1421 imply CMD_DM
1422 help
1423 Support for HiKey960 96boards platform. It features a HI3660
1424 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1425
1426 config TARGET_POPLAR
1427 bool "Support Poplar 96boards Enterprise Edition Platform"
1428 select ARM64
1429 select DM
1430 select DM_SERIAL
1431 select GPIO_EXTRA_HEADER
1432 select OF_CONTROL
1433 select PL01X_SERIAL
1434 imply CMD_DM
1435 help
1436 Support for Poplar 96boards EE platform. It features a HI3798cv200
1437 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1438 making it capable of running any commercial set-top solution based on
1439 Linux or Android.
1440
1441 config TARGET_LS1012AQDS
1442 bool "Support ls1012aqds"
1443 select ARCH_LS1012A
1444 select ARM64
1445 select ARCH_SUPPORT_TFABOOT
1446 select BOARD_LATE_INIT
1447 select GPIO_EXTRA_HEADER
1448 help
1449 Support for Freescale LS1012AQDS platform.
1450 The LS1012A Development System (QDS) is a high-performance
1451 development platform that supports the QorIQ LS1012A
1452 Layerscape Architecture processor.
1453
1454 config TARGET_LS1012ARDB
1455 bool "Support ls1012ardb"
1456 select ARCH_LS1012A
1457 select ARM64
1458 select ARCH_SUPPORT_TFABOOT
1459 select BOARD_LATE_INIT
1460 select GPIO_EXTRA_HEADER
1461 imply SCSI
1462 imply SCSI_AHCI
1463 help
1464 Support for Freescale LS1012ARDB platform.
1465 The LS1012A Reference design board (RDB) is a high-performance
1466 development platform that supports the QorIQ LS1012A
1467 Layerscape Architecture processor.
1468
1469 config TARGET_LS1012A2G5RDB
1470 bool "Support ls1012a2g5rdb"
1471 select ARCH_LS1012A
1472 select ARM64
1473 select ARCH_SUPPORT_TFABOOT
1474 select BOARD_LATE_INIT
1475 select GPIO_EXTRA_HEADER
1476 imply SCSI
1477 help
1478 Support for Freescale LS1012A2G5RDB platform.
1479 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1480 development platform that supports the QorIQ LS1012A
1481 Layerscape Architecture processor.
1482
1483 config TARGET_LS1012AFRWY
1484 bool "Support ls1012afrwy"
1485 select ARCH_LS1012A
1486 select ARM64
1487 select ARCH_SUPPORT_TFABOOT
1488 select BOARD_LATE_INIT
1489 select GPIO_EXTRA_HEADER
1490 imply SCSI
1491 imply SCSI_AHCI
1492 help
1493 Support for Freescale LS1012AFRWY platform.
1494 The LS1012A FRWY board (FRWY) is a high-performance
1495 development platform that supports the QorIQ LS1012A
1496 Layerscape Architecture processor.
1497
1498 config TARGET_LS1012AFRDM
1499 bool "Support ls1012afrdm"
1500 select ARCH_LS1012A
1501 select ARM64
1502 select ARCH_SUPPORT_TFABOOT
1503 select GPIO_EXTRA_HEADER
1504 help
1505 Support for Freescale LS1012AFRDM platform.
1506 The LS1012A Freedom board (FRDM) is a high-performance
1507 development platform that supports the QorIQ LS1012A
1508 Layerscape Architecture processor.
1509
1510 config TARGET_LS1028AQDS
1511 bool "Support ls1028aqds"
1512 select ARCH_LS1028A
1513 select ARM64
1514 select ARMV8_MULTIENTRY
1515 select ARCH_SUPPORT_TFABOOT
1516 select BOARD_LATE_INIT
1517 select GPIO_EXTRA_HEADER
1518 help
1519 Support for Freescale LS1028AQDS platform
1520 The LS1028A Development System (QDS) is a high-performance
1521 development platform that supports the QorIQ LS1028A
1522 Layerscape Architecture processor.
1523
1524 config TARGET_LS1028ARDB
1525 bool "Support ls1028ardb"
1526 select ARCH_LS1028A
1527 select ARM64
1528 select ARMV8_MULTIENTRY
1529 select ARCH_SUPPORT_TFABOOT
1530 select BOARD_LATE_INIT
1531 select GPIO_EXTRA_HEADER
1532 help
1533 Support for Freescale LS1028ARDB platform
1534 The LS1028A Development System (RDB) is a high-performance
1535 development platform that supports the QorIQ LS1028A
1536 Layerscape Architecture processor.
1537
1538 config TARGET_LS1088ARDB
1539 bool "Support ls1088ardb"
1540 select ARCH_LS1088A
1541 select ARM64
1542 select ARMV8_MULTIENTRY
1543 select ARCH_SUPPORT_TFABOOT
1544 select BOARD_LATE_INIT
1545 select SUPPORT_SPL
1546 select FSL_DDR_INTERACTIVE if !SD_BOOT
1547 select GPIO_EXTRA_HEADER
1548 help
1549 Support for NXP LS1088ARDB platform.
1550 The LS1088A Reference design board (RDB) is a high-performance
1551 development platform that supports the QorIQ LS1088A
1552 Layerscape Architecture processor.
1553
1554 config TARGET_LS1021AQDS
1555 bool "Support ls1021aqds"
1556 select ARCH_LS1021A
1557 select ARCH_SUPPORT_PSCI
1558 select BOARD_EARLY_INIT_F
1559 select BOARD_LATE_INIT
1560 select CPU_V7A
1561 select CPU_V7_HAS_NONSEC
1562 select CPU_V7_HAS_VIRT
1563 select LS1_DEEP_SLEEP
1564 select SUPPORT_SPL
1565 select SYS_FSL_DDR
1566 select FSL_DDR_INTERACTIVE
1567 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1568 select GPIO_EXTRA_HEADER
1569 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1570 imply SCSI
1571
1572 config TARGET_LS1021ATWR
1573 bool "Support ls1021atwr"
1574 select ARCH_LS1021A
1575 select ARCH_SUPPORT_PSCI
1576 select BOARD_EARLY_INIT_F
1577 select BOARD_LATE_INIT
1578 select CPU_V7A
1579 select CPU_V7_HAS_NONSEC
1580 select CPU_V7_HAS_VIRT
1581 select LS1_DEEP_SLEEP
1582 select SUPPORT_SPL
1583 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1584 select GPIO_EXTRA_HEADER
1585 imply SCSI
1586
1587 config TARGET_PG_WCOM_SELI8
1588 bool "Support Hitachi-Powergrids SELI8 service unit card"
1589 select ARCH_LS1021A
1590 select ARCH_SUPPORT_PSCI
1591 select BOARD_EARLY_INIT_F
1592 select BOARD_LATE_INIT
1593 select CPU_V7A
1594 select CPU_V7_HAS_NONSEC
1595 select CPU_V7_HAS_VIRT
1596 select SYS_FSL_DDR
1597 select FSL_DDR_INTERACTIVE
1598 select GPIO_EXTRA_HEADER
1599 select VENDOR_KM
1600 imply SCSI
1601 help
1602 Support for Hitachi-Powergrids SELI8 service unit card.
1603 SELI8 is a QorIQ LS1021a based service unit card used
1604 in XMC20 and FOX615 product families.
1605
1606 config TARGET_PG_WCOM_EXPU1
1607 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1608 select ARCH_LS1021A
1609 select ARCH_SUPPORT_PSCI
1610 select BOARD_EARLY_INIT_F
1611 select BOARD_LATE_INIT
1612 select CPU_V7A
1613 select CPU_V7_HAS_NONSEC
1614 select CPU_V7_HAS_VIRT
1615 select SYS_FSL_DDR
1616 select FSL_DDR_INTERACTIVE
1617 select VENDOR_KM
1618 imply SCSI
1619 help
1620 Support for Hitachi-Powergrids EXPU1 service unit card.
1621 EXPU1 is a QorIQ LS1021a based service unit card used
1622 in XMC20 and FOX615 product families.
1623
1624 config TARGET_LS1021ATSN
1625 bool "Support ls1021atsn"
1626 select ARCH_LS1021A
1627 select ARCH_SUPPORT_PSCI
1628 select BOARD_EARLY_INIT_F
1629 select BOARD_LATE_INIT
1630 select CPU_V7A
1631 select CPU_V7_HAS_NONSEC
1632 select CPU_V7_HAS_VIRT
1633 select LS1_DEEP_SLEEP
1634 select SUPPORT_SPL
1635 select GPIO_EXTRA_HEADER
1636 imply SCSI
1637
1638 config TARGET_LS1021AIOT
1639 bool "Support ls1021aiot"
1640 select ARCH_LS1021A
1641 select ARCH_SUPPORT_PSCI
1642 select BOARD_LATE_INIT
1643 select CPU_V7A
1644 select CPU_V7_HAS_NONSEC
1645 select CPU_V7_HAS_VIRT
1646 select SUPPORT_SPL
1647 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1648 select GPIO_EXTRA_HEADER
1649 imply SCSI
1650 help
1651 Support for Freescale LS1021AIOT platform.
1652 The LS1021A Freescale board (IOT) is a high-performance
1653 development platform that supports the QorIQ LS1021A
1654 Layerscape Architecture processor.
1655
1656 config TARGET_LS1043AQDS
1657 bool "Support ls1043aqds"
1658 select ARCH_LS1043A
1659 select ARM64
1660 select ARMV8_MULTIENTRY
1661 select ARCH_SUPPORT_TFABOOT
1662 select BOARD_EARLY_INIT_F
1663 select BOARD_LATE_INIT
1664 select SUPPORT_SPL
1665 select FSL_DDR_INTERACTIVE if !SPL
1666 select FSL_DSPI if !SPL_NO_DSPI
1667 select DM_SPI_FLASH if FSL_DSPI
1668 select GPIO_EXTRA_HEADER
1669 imply SCSI
1670 imply SCSI_AHCI
1671 help
1672 Support for Freescale LS1043AQDS platform.
1673
1674 config TARGET_LS1043ARDB
1675 bool "Support ls1043ardb"
1676 select ARCH_LS1043A
1677 select ARM64
1678 select ARMV8_MULTIENTRY
1679 select ARCH_SUPPORT_TFABOOT
1680 select BOARD_EARLY_INIT_F
1681 select BOARD_LATE_INIT
1682 select SUPPORT_SPL
1683 select FSL_DSPI if !SPL_NO_DSPI
1684 select DM_SPI_FLASH if FSL_DSPI
1685 select GPIO_EXTRA_HEADER
1686 help
1687 Support for Freescale LS1043ARDB platform.
1688
1689 config TARGET_LS1046AQDS
1690 bool "Support ls1046aqds"
1691 select ARCH_LS1046A
1692 select ARM64
1693 select ARMV8_MULTIENTRY
1694 select ARCH_SUPPORT_TFABOOT
1695 select BOARD_EARLY_INIT_F
1696 select BOARD_LATE_INIT
1697 select DM_SPI_FLASH if DM_SPI
1698 select SUPPORT_SPL
1699 select FSL_DDR_BIST if !SPL
1700 select FSL_DDR_INTERACTIVE if !SPL
1701 select FSL_DDR_INTERACTIVE if !SPL
1702 select GPIO_EXTRA_HEADER
1703 imply SCSI
1704 help
1705 Support for Freescale LS1046AQDS platform.
1706 The LS1046A Development System (QDS) is a high-performance
1707 development platform that supports the QorIQ LS1046A
1708 Layerscape Architecture processor.
1709
1710 config TARGET_LS1046ARDB
1711 bool "Support ls1046ardb"
1712 select ARCH_LS1046A
1713 select ARM64
1714 select ARMV8_MULTIENTRY
1715 select ARCH_SUPPORT_TFABOOT
1716 select BOARD_EARLY_INIT_F
1717 select BOARD_LATE_INIT
1718 select DM_SPI_FLASH if DM_SPI
1719 select POWER_MC34VR500
1720 select SUPPORT_SPL
1721 select FSL_DDR_BIST
1722 select FSL_DDR_INTERACTIVE if !SPL
1723 select GPIO_EXTRA_HEADER
1724 imply SCSI
1725 help
1726 Support for Freescale LS1046ARDB platform.
1727 The LS1046A Reference Design Board (RDB) is a high-performance
1728 development platform that supports the QorIQ LS1046A
1729 Layerscape Architecture processor.
1730
1731 config TARGET_LS1046AFRWY
1732 bool "Support ls1046afrwy"
1733 select ARCH_LS1046A
1734 select ARM64
1735 select ARMV8_MULTIENTRY
1736 select ARCH_SUPPORT_TFABOOT
1737 select BOARD_EARLY_INIT_F
1738 select BOARD_LATE_INIT
1739 select DM_SPI_FLASH if DM_SPI
1740 select GPIO_EXTRA_HEADER
1741 imply SCSI
1742 help
1743 Support for Freescale LS1046AFRWY platform.
1744 The LS1046A Freeway Board (FRWY) is a high-performance
1745 development platform that supports the QorIQ LS1046A
1746 Layerscape Architecture processor.
1747
1748 config TARGET_SL28
1749 bool "Support sl28"
1750 select ARCH_LS1028A
1751 select ARM64
1752 select ARMV8_MULTIENTRY
1753 select SUPPORT_SPL
1754 select BINMAN
1755 select DM
1756 select DM_GPIO
1757 select DM_I2C
1758 select DM_MMC
1759 select DM_SPI_FLASH
1760 select DM_ETH
1761 select DM_MDIO
1762 select PCI
1763 select DM_RNG
1764 select DM_RTC
1765 select DM_SCSI
1766 select DM_SERIAL
1767 select DM_SPI
1768 select GPIO_EXTRA_HEADER
1769 select SPL_DM if SPL
1770 select SPL_DM_SPI if SPL
1771 select SPL_DM_SPI_FLASH if SPL
1772 select SPL_DM_I2C if SPL
1773 select SPL_DM_MMC if SPL
1774 select SPL_DM_SERIAL if SPL
1775 help
1776 Support for Kontron SMARC-sAL28 board.
1777
1778 config TARGET_COLIBRI_PXA270
1779 bool "Support colibri_pxa270"
1780 select CPU_PXA27X
1781 select GPIO_EXTRA_HEADER
1782
1783 config ARCH_UNIPHIER
1784 bool "Socionext UniPhier SoCs"
1785 select BOARD_LATE_INIT
1786 select DM
1787 select DM_ETH
1788 select DM_GPIO
1789 select DM_I2C
1790 select DM_MMC
1791 select DM_MTD
1792 select DM_RESET
1793 select DM_SERIAL
1794 select OF_BOARD_SETUP
1795 select OF_CONTROL
1796 select OF_LIBFDT
1797 select PINCTRL
1798 select SPL_BOARD_INIT if SPL
1799 select SPL_DM if SPL
1800 select SPL_LIBCOMMON_SUPPORT if SPL
1801 select SPL_LIBGENERIC_SUPPORT if SPL
1802 select SPL_OF_CONTROL if SPL
1803 select SPL_PINCTRL if SPL
1804 select SUPPORT_SPL
1805 imply CMD_DM
1806 imply DISTRO_DEFAULTS
1807 imply FAT_WRITE
1808 help
1809 Support for UniPhier SoC family developed by Socionext Inc.
1810 (formerly, System LSI Business Division of Panasonic Corporation)
1811
1812 config ARCH_SYNQUACER
1813 bool "Socionext SynQuacer SoCs"
1814 select ARM64
1815 select DM
1816 select GIC_V3
1817 select PSCI_RESET
1818 select SYSRESET
1819 select SYSRESET_PSCI
1820 select OF_CONTROL
1821 help
1822 Support for SynQuacer SoC family developed by Socionext Inc.
1823 This SoC is used on 96boards EE DeveloperBox.
1824
1825 config ARCH_STM32
1826 bool "Support STMicroelectronics STM32 MCU with cortex M"
1827 select CPU_V7M
1828 select DM
1829 select DM_SERIAL
1830 imply CMD_DM
1831
1832 config ARCH_STI
1833 bool "Support STMicrolectronics SoCs"
1834 select BLK
1835 select CPU_V7A
1836 select DM
1837 select DM_MMC
1838 select DM_RESET
1839 select DM_SERIAL
1840 imply CMD_DM
1841 help
1842 Support for STMicroelectronics STiH407/10 SoC family.
1843 This SoC is used on Linaro 96Board STiH410-B2260
1844
1845 config ARCH_STM32MP
1846 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1847 select ARCH_MISC_INIT
1848 select ARCH_SUPPORT_TFABOOT
1849 select BOARD_LATE_INIT
1850 select CLK
1851 select DM
1852 select DM_GPIO
1853 select DM_RESET
1854 select DM_SERIAL
1855 select MISC
1856 select OF_CONTROL
1857 select OF_LIBFDT
1858 select OF_SYSTEM_SETUP
1859 select PINCTRL
1860 select REGMAP
1861 select SUPPORT_SPL
1862 select SYSCON
1863 select SYSRESET
1864 select SYS_THUMB_BUILD
1865 imply SPL_SYSRESET
1866 imply CMD_DM
1867 imply CMD_POWEROFF
1868 imply OF_LIBFDT_OVERLAY
1869 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1870 imply USE_PREBOOT
1871 help
1872 Support for STM32MP SoC family developed by STMicroelectronics,
1873 MPUs based on ARM cortex A core
1874 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1875 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1876 chain.
1877 SPL is the unsecure FSBL for the basic boot chain.
1878
1879 config ARCH_ROCKCHIP
1880 bool "Support Rockchip SoCs"
1881 select BLK
1882 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1883 select DM
1884 select DM_GPIO
1885 select DM_I2C
1886 select DM_MMC
1887 select DM_PWM
1888 select DM_REGULATOR
1889 select DM_SERIAL
1890 select DM_SPI
1891 select DM_SPI_FLASH
1892 select ENABLE_ARM_SOC_BOOT0_HOOK
1893 select OF_CONTROL
1894 select SPI
1895 select SPL_DM if SPL
1896 select SPL_DM_SPI if SPL
1897 select SPL_DM_SPI_FLASH if SPL
1898 select SYS_MALLOC_F
1899 select SYS_THUMB_BUILD if !ARM64
1900 imply ADC
1901 imply CMD_DM
1902 imply DEBUG_UART_BOARD_INIT
1903 imply DISTRO_DEFAULTS
1904 imply FAT_WRITE
1905 imply SARADC_ROCKCHIP
1906 imply SPL_SYSRESET
1907 imply SPL_SYS_MALLOC_SIMPLE
1908 imply SYS_NS16550
1909 imply TPL_SYSRESET
1910 imply USB_FUNCTION_FASTBOOT
1911
1912 config ARCH_OCTEONTX
1913 bool "Support OcteonTX SoCs"
1914 select CLK
1915 select DM
1916 select GPIO_EXTRA_HEADER
1917 select ARM64
1918 select OF_CONTROL
1919 select OF_LIVE
1920 select BOARD_LATE_INIT
1921 select SYS_CACHE_SHIFT_7
1922 select SYS_PCI_64BIT if PCI
1923 imply OF_HAS_PRIOR_STAGE
1924
1925 config ARCH_OCTEONTX2
1926 bool "Support OcteonTX2 SoCs"
1927 select CLK
1928 select DM
1929 select GPIO_EXTRA_HEADER
1930 select ARM64
1931 select OF_CONTROL
1932 select OF_LIVE
1933 select BOARD_LATE_INIT
1934 select SYS_CACHE_SHIFT_7
1935 select SYS_PCI_64BIT if PCI
1936 imply OF_HAS_PRIOR_STAGE
1937
1938 config TARGET_THUNDERX_88XX
1939 bool "Support ThunderX 88xx"
1940 select ARM64
1941 select GPIO_EXTRA_HEADER
1942 select OF_CONTROL
1943 select PL01X_SERIAL
1944 select SYS_CACHE_SHIFT_7
1945
1946 config ARCH_ASPEED
1947 bool "Support Aspeed SoCs"
1948 select DM
1949 select OF_CONTROL
1950 imply CMD_DM
1951
1952 config TARGET_DURIAN
1953 bool "Support Phytium Durian Platform"
1954 select ARM64
1955 select GPIO_EXTRA_HEADER
1956 help
1957 Support for durian platform.
1958 It has 2GB Sdram, uart and pcie.
1959
1960 config TARGET_PRESIDIO_ASIC
1961 bool "Support Cortina Presidio ASIC Platform"
1962 select ARM64
1963 select GICV2
1964
1965 config TARGET_XENGUEST_ARM64
1966 bool "Xen guest ARM64"
1967 select ARM64
1968 select XEN
1969 select OF_CONTROL
1970 select LINUX_KERNEL_IMAGE_HEADER
1971 select XEN_SERIAL
1972 select SSCANF
1973 imply OF_HAS_PRIOR_STAGE
1974
1975 endchoice
1976
1977 config SUPPORT_PASSING_ATAGS
1978 bool "Support pre-devicetree ATAG-based booting"
1979 depends on !ARM64
1980 imply SETUP_MEMORY_TAGS
1981 help
1982 Support for booting older Linux kernels, using ATAGs rather than
1983 passing a devicetree. This is option is rarely used, and the
1984 semantics are defined at
1985 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1986
1987 config SETUP_MEMORY_TAGS
1988 bool "Pass memory size information via ATAG"
1989 depends on SUPPORT_PASSING_ATAGS
1990
1991 config CMDLINE_TAG
1992 bool "Pass Linux kernel cmdline via ATAG"
1993 depends on SUPPORT_PASSING_ATAGS
1994
1995 config INITRD_TAG
1996 bool "Pass initrd starting point and size via ATAG"
1997 depends on SUPPORT_PASSING_ATAGS
1998
1999 config REVISION_TAG
2000 bool "Pass system revision via ATAG"
2001 depends on SUPPORT_PASSING_ATAGS
2002
2003 config SERIAL_TAG
2004 bool "Pass system serial number via ATAG"
2005 depends on SUPPORT_PASSING_ATAGS
2006
2007 config STATIC_MACH_TYPE
2008 bool "Statically define the Machine ID number"
2009 help
2010 When booting via ATAGs, enable this option if we know the correct
2011 machine ID number to use at compile time. Some systems will be
2012 passed the number dynamically by whatever loads U-Boot.
2013
2014 config MACH_TYPE
2015 int "Machine ID number"
2016 depends on STATIC_MACH_TYPE
2017 help
2018 When booting via ATAGs, the machine type must be passed as a number.
2019 For the full list see https://www.arm.linux.org.uk/developer/machines
2020
2021 config ARCH_SUPPORT_TFABOOT
2022 bool
2023
2024 config TFABOOT
2025 bool "Support for booting from TF-A"
2026 depends on ARCH_SUPPORT_TFABOOT
2027 help
2028 Some platforms support the setup of secure registers (for instance
2029 for CPU errata handling) or provide secure services like PSCI.
2030 Those services could also be provided by other firmware parts
2031 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2032 does not need to (and cannot) execute this code.
2033 Enabling this option will make a U-Boot binary that is relying
2034 on other firmware layers to provide secure functionality.
2035
2036 config TI_SECURE_DEVICE
2037 bool "HS Device Type Support"
2038 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2039 help
2040 If a high secure (HS) device type is being used, this config
2041 must be set. This option impacts various aspects of the
2042 build system (to create signed boot images that can be
2043 authenticated) and the code. See the doc/README.ti-secure
2044 file for further details.
2045
2046 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2047 config ISW_ENTRY_ADDR
2048 hex "Address in memory or XIP address of bootloader entry point"
2049 default 0x402F4000 if AM43XX
2050 default 0x402F0400 if AM33XX
2051 default 0x40301350 if OMAP54XX
2052 help
2053 After any reset, the boot ROM searches the boot media for a valid
2054 boot image. For non-XIP devices, the ROM then copies the image into
2055 internal memory. For all boot modes, after the ROM processes the
2056 boot image it eventually computes the entry point address depending
2057 on the device type (secure/non-secure), boot media (xip/non-xip) and
2058 image headers.
2059 endif
2060
2061 config SYS_KWD_CONFIG
2062 string "kwbimage config file path"
2063 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2064 default "arch/arm/mach-mvebu/kwbimage.cfg"
2065 help
2066 Path within the source directory to the kwbimage.cfg file to use
2067 when packaging the U-Boot image for use.
2068
2069 source "arch/arm/mach-apple/Kconfig"
2070
2071 source "arch/arm/mach-aspeed/Kconfig"
2072
2073 source "arch/arm/mach-at91/Kconfig"
2074
2075 source "arch/arm/mach-bcm283x/Kconfig"
2076
2077 source "arch/arm/mach-bcmstb/Kconfig"
2078
2079 source "arch/arm/mach-davinci/Kconfig"
2080
2081 source "arch/arm/mach-exynos/Kconfig"
2082
2083 source "arch/arm/mach-highbank/Kconfig"
2084
2085 source "arch/arm/mach-integrator/Kconfig"
2086
2087 source "arch/arm/mach-ipq40xx/Kconfig"
2088
2089 source "arch/arm/mach-k3/Kconfig"
2090
2091 source "arch/arm/mach-keystone/Kconfig"
2092
2093 source "arch/arm/mach-kirkwood/Kconfig"
2094
2095 source "arch/arm/mach-lpc32xx/Kconfig"
2096
2097 source "arch/arm/mach-mvebu/Kconfig"
2098
2099 source "arch/arm/mach-octeontx/Kconfig"
2100
2101 source "arch/arm/mach-octeontx2/Kconfig"
2102
2103 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2104
2105 source "arch/arm/mach-imx/mx3/Kconfig"
2106
2107 source "arch/arm/mach-imx/mx5/Kconfig"
2108
2109 source "arch/arm/mach-imx/mx6/Kconfig"
2110
2111 source "arch/arm/mach-imx/mx7/Kconfig"
2112
2113 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2114
2115 source "arch/arm/mach-imx/imx8/Kconfig"
2116
2117 source "arch/arm/mach-imx/imx8m/Kconfig"
2118
2119 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2120
2121 source "arch/arm/mach-imx/imxrt/Kconfig"
2122
2123 source "arch/arm/mach-imx/mxs/Kconfig"
2124
2125 source "arch/arm/mach-omap2/Kconfig"
2126
2127 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2128
2129 source "arch/arm/mach-orion5x/Kconfig"
2130
2131 source "arch/arm/mach-owl/Kconfig"
2132
2133 source "arch/arm/mach-rmobile/Kconfig"
2134
2135 source "arch/arm/mach-meson/Kconfig"
2136
2137 source "arch/arm/mach-mediatek/Kconfig"
2138
2139 source "arch/arm/mach-qemu/Kconfig"
2140
2141 source "arch/arm/mach-rockchip/Kconfig"
2142
2143 source "arch/arm/mach-s5pc1xx/Kconfig"
2144
2145 source "arch/arm/mach-snapdragon/Kconfig"
2146
2147 source "arch/arm/mach-socfpga/Kconfig"
2148
2149 source "arch/arm/mach-sti/Kconfig"
2150
2151 source "arch/arm/mach-stm32/Kconfig"
2152
2153 source "arch/arm/mach-stm32mp/Kconfig"
2154
2155 source "arch/arm/mach-sunxi/Kconfig"
2156
2157 source "arch/arm/mach-tegra/Kconfig"
2158
2159 source "arch/arm/mach-u8500/Kconfig"
2160
2161 source "arch/arm/mach-uniphier/Kconfig"
2162
2163 source "arch/arm/cpu/armv7/vf610/Kconfig"
2164
2165 source "arch/arm/mach-zynq/Kconfig"
2166
2167 source "arch/arm/mach-zynqmp/Kconfig"
2168
2169 source "arch/arm/mach-versal/Kconfig"
2170
2171 source "arch/arm/mach-zynqmp-r5/Kconfig"
2172
2173 source "arch/arm/cpu/armv7/Kconfig"
2174
2175 source "arch/arm/cpu/armv8/Kconfig"
2176
2177 source "arch/arm/mach-imx/Kconfig"
2178
2179 source "arch/arm/mach-nexell/Kconfig"
2180
2181 source "board/armltd/total_compute/Kconfig"
2182
2183 source "board/bosch/shc/Kconfig"
2184 source "board/bosch/guardian/Kconfig"
2185 source "board/Marvell/octeontx/Kconfig"
2186 source "board/Marvell/octeontx2/Kconfig"
2187 source "board/armltd/vexpress/Kconfig"
2188 source "board/armltd/vexpress64/Kconfig"
2189 source "board/cortina/presidio-asic/Kconfig"
2190 source "board/broadcom/bcm963158/Kconfig"
2191 source "board/broadcom/bcm968360bg/Kconfig"
2192 source "board/broadcom/bcm968580xref/Kconfig"
2193 source "board/broadcom/bcmns3/Kconfig"
2194 source "board/cavium/thunderx/Kconfig"
2195 source "board/eets/pdu001/Kconfig"
2196 source "board/emulation/qemu-arm/Kconfig"
2197 source "board/freescale/ls2080aqds/Kconfig"
2198 source "board/freescale/ls2080ardb/Kconfig"
2199 source "board/freescale/ls1088a/Kconfig"
2200 source "board/freescale/ls1028a/Kconfig"
2201 source "board/freescale/ls1021aqds/Kconfig"
2202 source "board/freescale/ls1043aqds/Kconfig"
2203 source "board/freescale/ls1021atwr/Kconfig"
2204 source "board/freescale/ls1021atsn/Kconfig"
2205 source "board/freescale/ls1021aiot/Kconfig"
2206 source "board/freescale/ls1046aqds/Kconfig"
2207 source "board/freescale/ls1043ardb/Kconfig"
2208 source "board/freescale/ls1046ardb/Kconfig"
2209 source "board/freescale/ls1046afrwy/Kconfig"
2210 source "board/freescale/ls1012aqds/Kconfig"
2211 source "board/freescale/ls1012ardb/Kconfig"
2212 source "board/freescale/ls1012afrdm/Kconfig"
2213 source "board/freescale/lx2160a/Kconfig"
2214 source "board/grinn/chiliboard/Kconfig"
2215 source "board/hisilicon/hikey/Kconfig"
2216 source "board/hisilicon/hikey960/Kconfig"
2217 source "board/hisilicon/poplar/Kconfig"
2218 source "board/isee/igep003x/Kconfig"
2219 source "board/kontron/sl28/Kconfig"
2220 source "board/myir/mys_6ulx/Kconfig"
2221 source "board/seeed/npi_imx6ull/Kconfig"
2222 source "board/socionext/developerbox/Kconfig"
2223 source "board/st/stv0991/Kconfig"
2224 source "board/tcl/sl50/Kconfig"
2225 source "board/toradex/colibri_pxa270/Kconfig"
2226 source "board/variscite/dart_6ul/Kconfig"
2227 source "board/vscom/baltos/Kconfig"
2228 source "board/phytium/durian/Kconfig"
2229 source "board/xen/xenguest_arm64/Kconfig"
2230 source "board/keymile/Kconfig"
2231
2232 source "arch/arm/Kconfig.debug"
2233
2234 endmenu
2235
2236 config SPL_LDSCRIPT
2237 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2238 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2239 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64