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[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11 imply SPL_SEPARATE_BSS
12
13 config ARM64_CRC32
14 bool "Enable support for CRC32 instruction"
15 depends on ARM64 && CC_IS_GCC
16 default y
17 help
18 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
19 This is faster than software crc32 calculation. This instruction may
20 not be present on all ARMv8.0, but is always present on ARMv8.1 and
21 newer.
22
23 config COUNTER_FREQUENCY
24 int "Timer clock frequency"
25 depends on ARM64 || CPU_V7A
26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
30 default 100000000 if ARCH_ZYNQMP
31 default 0
32 help
33 For platforms with ARMv8-A and ARMv7-A which features a system
34 counter, those platforms needs software to program the counter
35 frequency. Setup time clock frequency for certain platform.
36 0 means no need to configure the system counter frequency.
37 For platforms needs the frequency set in U-Boot with a
38 pre-defined value, should have the macro defined as a non-zero value.
39
40 config POSITION_INDEPENDENT
41 bool "Generate position-independent pre-relocation code"
42 depends on ARM64 || CPU_V7A
43 help
44 U-Boot expects to be linked to a specific hard-coded address, and to
45 be loaded to and run from that address. This option lifts that
46 restriction, thus allowing the code to be loaded to and executed from
47 almost any 4K aligned address. This logic relies on the relocation
48 information that is embedded in the binary to support U-Boot
49 relocating itself to the top-of-RAM later during execution.
50
51 config INIT_SP_RELATIVE
52 bool "Specify the early stack pointer relative to the .bss section"
53 depends on ARM64
54 default n if ARCH_QEMU
55 default y if POSITION_INDEPENDENT
56 help
57 U-Boot typically uses a hard-coded value for the stack pointer
58 before relocation. Enable this option to instead calculate the
59 initial SP at run-time. This is useful to avoid hard-coding addresses
60 into U-Boot, so that it can be loaded and executed at arbitrary
61 addresses and thus avoid using arbitrary addresses at runtime.
62
63 If this option is enabled, the early stack pointer is set to
64 &_bss_start with a offset value added. The offset is specified by
65 SYS_INIT_SP_BSS_OFFSET.
66
67 config SYS_INIT_SP_BSS_OFFSET
68 int "Early stack offset from the .bss base address"
69 depends on ARM64
70 depends on INIT_SP_RELATIVE
71 default 524288
72 help
73 This option's value is the offset added to &_bss_start in order to
74 calculate the stack pointer. This offset should be large enough so
75 that the early malloc region, global data (gd), and early stack usage
76 do not overlap any appended DTB.
77
78 config SPL_SYS_NO_VECTOR_TABLE
79 depends on SPL
80 bool
81
82 config LINUX_KERNEL_IMAGE_HEADER
83 depends on ARM64
84 bool
85 help
86 Place a Linux kernel image header at the start of the U-Boot binary.
87 The format of the header is described in the Linux kernel source at
88 Documentation/arm64/booting.txt. This feature is useful since the
89 image header reports the amount of memory (BSS and similar) that
90 U-Boot needs to use, but which isn't part of the binary.
91
92 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
93 depends on LINUX_KERNEL_IMAGE_HEADER
94 hex
95 help
96 The value subtracted from CONFIG_TEXT_BASE to calculate the
97 TEXT_OFFSET value written to the Linux kernel image header.
98
99 config GICV2
100 bool
101
102 config GICV3
103 bool
104
105 config GIC_V3_ITS
106 bool "ARM GICV3 ITS"
107 select IRQ
108 help
109 ARM GICV3 Interrupt translation service (ITS).
110 Basic support for programming locality specific peripheral
111 interrupts (LPI) configuration tables and enable LPI tables.
112 LPI configuration table can be used by u-boot or Linux.
113 ARM GICV3 has limitation, once the LPI table is enabled, LPI
114 configuration table can not be re-programmed, unless GICV3 reset.
115
116 config STATIC_RELA
117 bool
118 default y if ARM64
119
120 config DMA_ADDR_T_64BIT
121 bool
122 default y if ARM64
123
124 config HAS_VBAR
125 bool
126
127 config HAS_THUMB2
128 bool
129
130 config GPIO_EXTRA_HEADER
131 bool
132
133 # Used for compatibility with asm files copied from the kernel
134 config ARM_ASM_UNIFIED
135 bool
136 default y
137
138 # Used for compatibility with asm files copied from the kernel
139 config THUMB2_KERNEL
140 bool
141
142 config SYS_ICACHE_OFF
143 bool "Do not enable icache"
144 help
145 Do not enable instruction cache in U-Boot.
146
147 config SPL_SYS_ICACHE_OFF
148 bool "Do not enable icache in SPL"
149 depends on SPL
150 default SYS_ICACHE_OFF
151 help
152 Do not enable instruction cache in SPL.
153
154 config SYS_DCACHE_OFF
155 bool "Do not enable dcache"
156 help
157 Do not enable data cache in U-Boot.
158
159 config SPL_SYS_DCACHE_OFF
160 bool "Do not enable dcache in SPL"
161 depends on SPL
162 default SYS_DCACHE_OFF
163 help
164 Do not enable data cache in SPL.
165
166 config SYS_ARM_CACHE_CP15
167 bool "CP15 based cache enabling support"
168 help
169 Select this if your processor suports enabling caches by using
170 CP15 registers.
171
172 config SYS_ARM_MMU
173 bool "MMU-based Paged Memory Management Support"
174 select SYS_ARM_CACHE_CP15
175 help
176 Select if you want MMU-based virtualised addressing space
177 support via paged memory management.
178
179 config SYS_ARM_MPU
180 bool 'Use the ARM v7 PMSA Compliant MPU'
181 help
182 Some ARM systems without an MMU have instead a Memory Protection
183 Unit (MPU) that defines the type and permissions for regions of
184 memory.
185 If your CPU has an MPU then you should choose 'y' here unless you
186 know that you do not want to use the MPU.
187
188 # If set, the workarounds for these ARM errata are applied early during U-Boot
189 # startup. Note that in general these options force the workarounds to be
190 # applied; no CPU-type/version detection exists, unlike the similar options in
191 # the Linux kernel. Do not set these options unless they apply! Also note that
192 # the following can be machine-specific errata. These do have ability to
193 # provide rudimentary version and machine-specific checks, but expect no
194 # product checks:
195 # CONFIG_ARM_ERRATA_430973
196 # CONFIG_ARM_ERRATA_454179
197 # CONFIG_ARM_ERRATA_621766
198 # CONFIG_ARM_ERRATA_798870
199 # CONFIG_ARM_ERRATA_801819
200 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
201 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
202
203 config ARM_ERRATA_430973
204 bool
205
206 config ARM_ERRATA_454179
207 bool
208
209 config ARM_ERRATA_621766
210 bool
211
212 config ARM_ERRATA_716044
213 bool
214
215 config ARM_ERRATA_725233
216 bool
217
218 config ARM_ERRATA_742230
219 bool
220
221 config ARM_ERRATA_743622
222 bool
223
224 config ARM_ERRATA_751472
225 bool
226
227 config ARM_ERRATA_761320
228 bool
229
230 config ARM_ERRATA_773022
231 bool
232
233 config ARM_ERRATA_774769
234 bool
235
236 config ARM_ERRATA_794072
237 bool
238
239 config ARM_ERRATA_798870
240 bool
241
242 config ARM_ERRATA_801819
243 bool
244
245 config ARM_ERRATA_826974
246 bool
247
248 config ARM_ERRATA_828024
249 bool
250
251 config ARM_ERRATA_829520
252 bool
253
254 config ARM_ERRATA_833069
255 bool
256
257 config ARM_ERRATA_833471
258 bool
259
260 config ARM_ERRATA_845369
261 bool
262
263 config ARM_ERRATA_852421
264 bool
265
266 config ARM_ERRATA_852423
267 bool
268
269 config ARM_ERRATA_855873
270 bool
271
272 config ARM_CORTEX_A8_CVE_2017_5715
273 bool
274
275 config ARM_CORTEX_A15_CVE_2017_5715
276 bool
277
278 config CPU_ARM720T
279 bool
280 select SYS_CACHE_SHIFT_5
281 imply SYS_ARM_MMU
282
283 config CPU_ARM920T
284 bool
285 select SYS_CACHE_SHIFT_5
286 imply SYS_ARM_MMU
287
288 config CPU_ARM926EJS
289 bool
290 select SYS_CACHE_SHIFT_5
291 imply SYS_ARM_MMU
292 imply SPL_SEPARATE_BSS
293
294 config CPU_ARM946ES
295 bool
296 select SYS_CACHE_SHIFT_5
297 imply SYS_ARM_MMU
298
299 config CPU_ARM1136
300 bool
301 select SYS_CACHE_SHIFT_5
302 imply SYS_ARM_MMU
303 imply SPL_SEPARATE_BSS
304
305 config CPU_ARM1176
306 bool
307 select HAS_VBAR
308 select SYS_CACHE_SHIFT_5
309 imply SYS_ARM_MMU
310
311 config CPU_V7A
312 bool
313 select HAS_THUMB2
314 select HAS_VBAR
315 select SYS_CACHE_SHIFT_6
316 imply SYS_ARM_MMU
317
318 config CPU_V7M
319 bool
320 select HAS_THUMB2
321 select SYS_ARM_MPU
322 select SYS_CACHE_SHIFT_5
323 select SYS_THUMB_BUILD
324 select THUMB2_KERNEL
325
326 config CPU_V7R
327 bool
328 select HAS_THUMB2
329 select SYS_ARM_CACHE_CP15
330 select SYS_ARM_MPU
331 select SYS_CACHE_SHIFT_6
332
333 config SYS_CPU
334 default "arm720t" if CPU_ARM720T
335 default "arm920t" if CPU_ARM920T
336 default "arm926ejs" if CPU_ARM926EJS
337 default "arm946es" if CPU_ARM946ES
338 default "arm1136" if CPU_ARM1136
339 default "arm1176" if CPU_ARM1176
340 default "armv7" if CPU_V7A
341 default "armv7" if CPU_V7R
342 default "armv7m" if CPU_V7M
343 default "armv8" if ARM64
344
345 config SYS_ARM_ARCH
346 int
347 default 4 if CPU_ARM720T
348 default 4 if CPU_ARM920T
349 default 5 if CPU_ARM926EJS
350 default 5 if CPU_ARM946ES
351 default 6 if CPU_ARM1136
352 default 6 if CPU_ARM1176
353 default 7 if CPU_V7A
354 default 7 if CPU_V7M
355 default 7 if CPU_V7R
356 default 8 if ARM64
357
358 choice
359 prompt "Select the ARM data write cache policy"
360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMNS || RZA1
361 default SYS_ARM_CACHE_WRITEBACK
362
363 config SYS_ARM_CACHE_WRITEBACK
364 bool "Write-back (WB)"
365 help
366 A write updates the cache only and marks the cache line as dirty.
367 External memory is updated only when the line is evicted or explicitly
368 cleaned.
369
370 config SYS_ARM_CACHE_WRITETHROUGH
371 bool "Write-through (WT)"
372 help
373 A write updates both the cache and the external memory system.
374 This does not mark the cache line as dirty.
375
376 config SYS_ARM_CACHE_WRITEALLOC
377 bool "Write allocation (WA)"
378 help
379 A cache line is allocated on a write miss. This means that executing a
380 store instruction on the processor might cause a burst read to occur.
381 There is a linefill to obtain the data for the cache line, before the
382 write is performed.
383 endchoice
384
385 config ARCH_VERY_EARLY_INIT
386 bool
387
388 config SPL_ARCH_VERY_EARLY_INIT
389 bool
390
391 config ARCH_CPU_INIT
392 bool "Enable ARCH_CPU_INIT"
393 help
394 Some architectures require a call to arch_cpu_init().
395 Say Y here to enable it
396
397 config SYS_ARCH_TIMER
398 bool "ARM Generic Timer support"
399 depends on CPU_V7A || ARM64
400 default y if ARM64
401 help
402 The ARM Generic Timer (aka arch-timer) provides an architected
403 interface to a timer source on an SoC.
404 It is mandatory for ARMv8 implementation and widely available
405 on ARMv7 systems.
406
407 config ARM_SMCCC
408 bool "Support for ARM SMC Calling Convention (SMCCC)"
409 depends on CPU_V7A || ARM64
410 select ARM_PSCI_FW
411 help
412 Say Y here if you want to enable ARM SMC Calling Convention.
413 This should be enabled if U-Boot needs to communicate with system
414 firmware (for example, PSCI) according to SMCCC.
415
416 config SYS_THUMB_BUILD
417 bool "Build U-Boot using the Thumb instruction set"
418 depends on !ARM64
419 help
420 Use this flag to build U-Boot using the Thumb instruction set for
421 ARM architectures. Thumb instruction set provides better code
422 density. For ARM architectures that support Thumb2 this flag will
423 result in Thumb2 code generated by GCC.
424
425 config SPL_SYS_THUMB_BUILD
426 bool "Build SPL using the Thumb instruction set"
427 default y if SYS_THUMB_BUILD
428 depends on !ARM64 && SPL
429 help
430 Use this flag to build SPL using the Thumb instruction set for
431 ARM architectures. Thumb instruction set provides better code
432 density. For ARM architectures that support Thumb2 this flag will
433 result in Thumb2 code generated by GCC.
434
435 config TPL_SYS_THUMB_BUILD
436 bool "Build TPL using the Thumb instruction set"
437 default y if SYS_THUMB_BUILD
438 depends on TPL && !ARM64
439 help
440 Use this flag to build TPL using the Thumb instruction set for
441 ARM architectures. Thumb instruction set provides better code
442 density. For ARM architectures that support Thumb2 this flag will
443 result in Thumb2 code generated by GCC.
444
445 config SYS_L2_PL310
446 bool "ARM PL310 L2 cache controller"
447 help
448 Enable support for ARM PL310 L2 cache controller in U-Boot
449
450 config SPL_SYS_L2_PL310
451 bool "ARM PL310 L2 cache controller in SPL"
452 help
453 Enable support for ARM PL310 L2 cache controller in SPL
454
455 config SYS_L2CACHE_OFF
456 bool "L2cache off"
457 help
458 If SoC does not support L2CACHE or one does not want to enable
459 L2CACHE, choose this option.
460
461 config ENABLE_ARM_SOC_BOOT0_HOOK
462 bool "prepare BOOT0 header"
463 help
464 If the SoC's BOOT0 requires a header area filled with (magic)
465 values, then choose this option, and create a file included as
466 <asm/arch/boot0.h> which contains the required assembler code.
467
468 config USE_ARCH_MEMCPY
469 bool "Use an assembly optimized implementation of memcpy"
470 default y if !ARM64
471 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
472 help
473 Enable the generation of an optimized version of memcpy.
474 Such an implementation may be faster under some conditions
475 but may increase the binary size.
476
477 config SPL_USE_ARCH_MEMCPY
478 bool "Use an assembly optimized implementation of memcpy for SPL"
479 default y if USE_ARCH_MEMCPY
480 depends on SPL
481 help
482 Enable the generation of an optimized version of memcpy.
483 Such an implementation may be faster under some conditions
484 but may increase the binary size.
485
486 config TPL_USE_ARCH_MEMCPY
487 bool "Use an assembly optimized implementation of memcpy for TPL"
488 default y if USE_ARCH_MEMCPY
489 depends on TPL
490 help
491 Enable the generation of an optimized version of memcpy.
492 Such an implementation may be faster under some conditions
493 but may increase the binary size.
494
495 config USE_ARCH_MEMMOVE
496 bool "Use an assembly optimized implementation of memmove" if !ARM64
497 default USE_ARCH_MEMCPY if ARM64
498 depends on ARM64
499 help
500 Enable the generation of an optimized version of memmove.
501 Such an implementation may be faster under some conditions
502 but may increase the binary size.
503
504 config SPL_USE_ARCH_MEMMOVE
505 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
506 default SPL_USE_ARCH_MEMCPY if ARM64
507 depends on SPL && ARM64
508 help
509 Enable the generation of an optimized version of memmove.
510 Such an implementation may be faster under some conditions
511 but may increase the binary size.
512
513 config TPL_USE_ARCH_MEMMOVE
514 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
515 default TPL_USE_ARCH_MEMCPY if ARM64
516 depends on TPL && ARM64
517 help
518 Enable the generation of an optimized version of memmove.
519 Such an implementation may be faster under some conditions
520 but may increase the binary size.
521
522 config USE_ARCH_MEMSET
523 bool "Use an assembly optimized implementation of memset"
524 default y if !ARM64
525 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
526 help
527 Enable the generation of an optimized version of memset.
528 Such an implementation may be faster under some conditions
529 but may increase the binary size.
530
531 config SPL_USE_ARCH_MEMSET
532 bool "Use an assembly optimized implementation of memset for SPL"
533 default y if USE_ARCH_MEMSET
534 depends on SPL
535 help
536 Enable the generation of an optimized version of memset.
537 Such an implementation may be faster under some conditions
538 but may increase the binary size.
539
540 config TPL_USE_ARCH_MEMSET
541 bool "Use an assembly optimized implementation of memset for TPL"
542 default y if USE_ARCH_MEMSET
543 depends on TPL
544 help
545 Enable the generation of an optimized version of memset.
546 Such an implementation may be faster under some conditions
547 but may increase the binary size.
548
549 config ARM64_SUPPORT_AARCH32
550 bool "ARM64 system support AArch32 execution state"
551 depends on ARM64
552 default y if !TARGET_THUNDERX_88XX
553 help
554 This ARM64 system supports AArch32 execution state.
555
556 config IPROC
557 bool
558
559 config S5P
560 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX
561
562 choice
563 prompt "Target select"
564 default TARGET_HIKEY
565
566 config ARCH_AT91
567 bool "Atmel AT91"
568 select GPIO_EXTRA_HEADER
569 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
570 select SPL_SEPARATE_BSS if SPL
571
572 config ARCH_DAVINCI
573 bool "TI DaVinci"
574 select CPU_ARM926EJS
575 select GPIO_EXTRA_HEADER
576 select SPL_DM_SPI if SPL
577 imply CMD_SAVES
578 help
579 Support for TI's DaVinci platform.
580
581 config ARCH_HISTB
582 bool "Hisilicon HiSTB SoCs"
583 select DM
584 select DM_SERIAL
585 select OF_CONTROL
586 select PL01X_SERIAL
587 imply CMD_DM
588 help
589 Support for HiSTB SoCs.
590
591 config ARCH_KIRKWOOD
592 bool "Marvell Kirkwood"
593 select ARCH_MISC_INIT
594 select BOARD_EARLY_INIT_F
595 select CPU_ARM926EJS
596 select GPIO_EXTRA_HEADER
597 select TIMER
598
599 config ARCH_MVEBU
600 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
601 select ARCH_EARLY_INIT_R if ARM64
602 select DM
603 select DM_SERIAL
604 select DM_SPI
605 select DM_SPI_FLASH
606 select GPIO_EXTRA_HEADER
607 select SPL_DM_SPI if SPL
608 select SPL_DM_SPI_FLASH if SPL
609 select SPL_TIMER if SPL
610 select TIMER if !ARM64
611 select OF_CONTROL
612 select OF_SEPARATE
613 select SPI
614 imply CMD_DM
615
616 config ARCH_ORION5X
617 bool "Marvell Orion"
618 select CPU_ARM926EJS
619 select GPIO_EXTRA_HEADER
620 select SPL_SEPARATE_BSS if SPL
621 select TIMER
622
623 config TARGET_STV0991
624 bool "Support stv0991"
625 select CPU_V7A
626 select DM
627 select DM_SERIAL
628 select DM_SPI
629 select DM_SPI_FLASH
630 select GPIO_EXTRA_HEADER
631 select PL01X_SERIAL
632 select SPI
633 select SPI_FLASH
634 imply CMD_DM
635
636 config ARCH_BCM283X
637 bool "Broadcom BCM283X family"
638 select DM
639 select DM_GPIO
640 select DM_SERIAL
641 select GPIO_EXTRA_HEADER
642 select OF_CONTROL
643 select PL01X_SERIAL
644 select SERIAL_SEARCH_ALL
645 imply CMD_DM
646 imply FAT_WRITE
647
648 config ARCH_BCMSTB
649 bool "Broadcom BCM7XXX family"
650 select CPU_V7A
651 select DM
652 select GPIO_EXTRA_HEADER
653 select OF_CONTROL
654 imply CMD_DM
655 imply OF_HAS_PRIOR_STAGE
656 help
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
659
660 config ARCH_BCMBCA
661 bool "Broadcom broadband chip family"
662 select DM
663 select OF_CONTROL
664 imply CMD_DM
665
666 config TARGET_VEXPRESS_CA9X4
667 bool "Support vexpress_ca9x4"
668 select CPU_V7A
669 select PL011_SERIAL
670
671 config TARGET_BCMNS
672 bool "Support Broadcom Northstar"
673 select CPU_V7A
674 select DM
675 select DM_GPIO
676 select DM_SERIAL
677 select OF_CONTROL
678 select TIMER
679 select SYS_NS16550
680 select ARM_GLOBAL_TIMER
681 imply SYS_THUMB_BUILD
682 imply MTD_RAW_NAND
683 imply NAND_BRCMNAND
684 imply NAND_BRCMNAND_IPROC
685 help
686 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit
687 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094,
688 BCM5301x etc.
689
690 config TARGET_BCMNS2
691 bool "Support Broadcom Northstar2"
692 select ARM64
693 select GPIO_EXTRA_HEADER
694 help
695 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
696 ARMv8 Cortex-A57 processors targeting a broad range of networking
697 applications.
698
699 config TARGET_BCMNS3
700 bool "Support Broadcom NS3"
701 select ARM64
702 select BOARD_LATE_INIT
703 help
704 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
705 ARMv8 Cortex-A72 processors targeting a broad range of networking
706 applications.
707
708 config ARCH_EXYNOS
709 bool "Samsung EXYNOS"
710 select DM
711 select DM_GPIO
712 select DM_I2C
713 select DM_KEYBOARD
714 select DM_SERIAL
715 select DM_SPI
716 select DM_SPI_FLASH
717 select SPI
718 select GPIO_EXTRA_HEADER
719 imply SYS_THUMB_BUILD
720 imply CMD_DM
721 imply FAT_WRITE
722
723 config ARCH_S5PC1XX
724 bool "Samsung S5PC1XX"
725 select CPU_V7A
726 select DM
727 select DM_GPIO
728 select DM_I2C
729 select DM_SERIAL
730 select GPIO_EXTRA_HEADER
731 imply CMD_DM
732
733 config ARCH_HIGHBANK
734 bool "Calxeda Highbank"
735 select CPU_V7A
736 select PL01X_SERIAL
737 select DM
738 select DM_SERIAL
739 select OF_CONTROL
740 select CLK
741 select CLK_CCF
742 select AHCI
743 select PHYS_64BIT
744 select TIMER
745 select SP804_TIMER
746 imply OF_HAS_PRIOR_STAGE
747
748 config ARCH_INTEGRATOR
749 bool "ARM Ltd. Integrator family"
750 select DM
751 select DM_SERIAL
752 select GPIO_EXTRA_HEADER
753 select PL01X_SERIAL
754 imply CMD_DM
755
756 config ARCH_IPQ40XX
757 bool "Qualcomm IPQ40xx SoCs"
758 select CPU_V7A
759 select DM
760 select DM_GPIO
761 select DM_SERIAL
762 select DM_RESET
763 select GPIO_EXTRA_HEADER
764 select MSM_SMEM
765 select PINCTRL
766 select CLK
767 select SMEM
768 select OF_CONTROL
769 imply CMD_DM
770
771 config ARCH_KEYSTONE
772 bool "TI Keystone"
773 select CMD_POWEROFF
774 select CPU_V7A
775 select DDR_SPD
776 select SUPPORT_SPL
777 select SYS_ARCH_TIMER
778 select SYS_THUMB_BUILD
779 imply CMD_MTDPARTS
780 imply CMD_SAVES
781 imply FIT
782
783 config ARCH_K3
784 bool "Texas Instruments' K3 Architecture"
785 select SPL
786 select SUPPORT_SPL
787 select FIT
788 select REGEX
789 select FIT_SIGNATURE if ARM64
790
791 config ARCH_OMAP2PLUS
792 bool "TI OMAP2+"
793 select CPU_V7A
794 select GPIO_EXTRA_HEADER
795 select SPL_BOARD_INIT if SPL
796 select SPL_STACK_R if SPL
797 select SUPPORT_SPL
798 imply TI_SYSC if DM && OF_CONTROL
799 imply FIT
800 imply SPL_SEPARATE_BSS
801
802 config ARCH_MESON
803 bool "Amlogic Meson"
804 select GPIO_EXTRA_HEADER
805 imply DISTRO_DEFAULTS
806 imply DM_RNG
807 help
808 Support for the Meson SoC family developed by Amlogic Inc.,
809 targeted at media players and tablet computers. We currently
810 support the S905 (GXBaby) 64-bit SoC.
811
812 config ARCH_MEDIATEK
813 bool "MediaTek SoCs"
814 select DM
815 select GPIO_EXTRA_HEADER
816 select OF_CONTROL
817 select SPL_DM if SPL
818 select SPL_LIBCOMMON_SUPPORT if SPL
819 select SPL_LIBGENERIC_SUPPORT if SPL
820 select SPL_OF_CONTROL if SPL
821 select SUPPORT_SPL
822 help
823 Support for the MediaTek SoCs family developed by MediaTek Inc.
824 Please refer to doc/README.mediatek for more information.
825
826 config ARCH_LPC32XX
827 bool "NXP LPC32xx platform"
828 select CPU_ARM926EJS
829 select DM
830 select DM_GPIO
831 select DM_SERIAL
832 select GPIO_EXTRA_HEADER
833 select SPL_DM if SPL
834 select SUPPORT_SPL
835 imply CMD_DM
836
837 config ARCH_IMX8
838 bool "NXP i.MX8 platform"
839 select ARM64
840 select SYS_FSL_HAS_SEC
841 select SYS_FSL_SEC_COMPAT_4
842 select SYS_FSL_SEC_LE
843 select DM
844 select DM_EVENT
845 select GPIO_EXTRA_HEADER
846 select MACH_IMX
847 select OF_CONTROL
848 select ENABLE_ARM_SOC_BOOT0_HOOK
849
850 config ARCH_IMX8M
851 bool "NXP i.MX8M platform"
852 select ARM64
853 select GPIO_EXTRA_HEADER
854 select MACH_IMX
855 select SYS_FSL_HAS_SEC
856 select SYS_FSL_SEC_COMPAT_4
857 select SYS_FSL_SEC_LE
858 select SYS_I2C_MXC
859 select DM
860 select DM_EVENT if CLK
861 select SUPPORT_SPL
862 imply CMD_DM
863
864 config ARCH_IMX8ULP
865 bool "NXP i.MX8ULP platform"
866 select ARM64
867 select DM
868 select DM_EVENT
869 select MACH_IMX
870 select OF_CONTROL
871 select SUPPORT_SPL
872 select GPIO_EXTRA_HEADER
873 select MISC
874 select IMX_ELE
875 imply CMD_DM
876
877 config ARCH_IMX9
878 bool "NXP i.MX9 platform"
879 select ARM64
880 select DM
881 select DM_EVENT
882 select MACH_IMX
883 select SUPPORT_SPL
884 select GPIO_EXTRA_HEADER
885 select MISC
886 select IMX_ELE
887 imply CMD_DM
888
889 config ARCH_IMXRT
890 bool "NXP i.MXRT platform"
891 select CPU_V7M
892 select DM
893 select DM_SERIAL
894 select GPIO_EXTRA_HEADER
895 select MACH_IMX
896 select SUPPORT_SPL
897 imply CMD_DM
898
899 config ARCH_MX23
900 bool "NXP i.MX23 family"
901 select CPU_ARM926EJS
902 select GPIO_EXTRA_HEADER
903 select MACH_IMX
904 select SUPPORT_SPL
905
906 config ARCH_MX28
907 bool "NXP i.MX28 family"
908 select CPU_ARM926EJS
909 select GPIO_EXTRA_HEADER
910 select MACH_IMX
911 select SUPPORT_SPL
912
913 config ARCH_MX31
914 bool "NXP i.MX31 family"
915 select CPU_ARM1136
916 select GPIO_EXTRA_HEADER
917 select MACH_IMX
918
919 config ARCH_MX7ULP
920 bool "NXP MX7ULP"
921 select BOARD_POSTCLK_INIT
922 select CPU_V7A
923 select GPIO_EXTRA_HEADER
924 select MACH_IMX
925 select SYS_FSL_HAS_SEC
926 select SYS_FSL_SEC_COMPAT_4
927 select SYS_FSL_SEC_LE
928 select ROM_UNIFIED_SECTIONS
929 imply MXC_GPIO
930 imply SYS_THUMB_BUILD
931
932 config ARCH_MX7
933 bool "Freescale MX7"
934 select ARCH_MISC_INIT
935 select CPU_V7A
936 select GPIO_EXTRA_HEADER
937 select MACH_IMX
938 select MXC_GPT_HCLK
939 select SYS_FSL_HAS_SEC
940 select SYS_FSL_SEC_COMPAT_4
941 select SYS_FSL_SEC_LE
942 imply BOARD_EARLY_INIT_F
943 imply MXC_GPIO
944 imply SYS_THUMB_BUILD
945
946 config ARCH_MX6
947 bool "Freescale MX6"
948 select BOARD_POSTCLK_INIT
949 select CPU_V7A
950 select GPIO_EXTRA_HEADER
951 select MACH_IMX
952 select MXC_GPT_HCLK
953 select SYS_FSL_HAS_SEC
954 select SYS_FSL_SEC_COMPAT_4
955 select SYS_FSL_SEC_LE
956 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
957 imply MXC_GPIO
958 imply SYS_THUMB_BUILD
959 imply SPL_SEPARATE_BSS
960
961 config ARCH_MX5
962 bool "Freescale MX5"
963 select BOARD_EARLY_INIT_F
964 select CPU_V7A
965 select GPIO_EXTRA_HEADER
966 select MACH_IMX
967 imply MXC_GPIO
968
969 config ARCH_NEXELL
970 bool "Nexell S5P4418/S5P6818 SoC"
971 select ENABLE_ARM_SOC_BOOT0_HOOK
972 select DM
973 select GPIO_EXTRA_HEADER
974
975 config ARCH_NPCM
976 bool "Support Nuvoton SoCs"
977 select DM
978 select OF_CONTROL
979 imply CMD_DM
980
981 config ARCH_APPLE
982 bool "Apple SoCs"
983 select ARM64
984 select CLK
985 select CMD_PCI
986 select CMD_USB
987 select DM
988 select DM_GPIO
989 select DM_KEYBOARD
990 select DM_MAILBOX
991 select DM_RESET
992 select DM_SERIAL
993 select DM_SPI
994 select DM_USB
995 select VIDEO
996 select IOMMU
997 select LINUX_KERNEL_IMAGE_HEADER
998 select OF_BOARD_SETUP
999 select OF_CONTROL
1000 select PCI
1001 select PHY
1002 select PINCTRL
1003 select POSITION_INDEPENDENT
1004 select POWER_DOMAIN
1005 select REGMAP
1006 select SPI
1007 select SYSCON
1008 select SYSRESET
1009 select SYSRESET_WATCHDOG
1010 select SYSRESET_WATCHDOG_AUTO
1011 select USB
1012 imply CMD_DM
1013 imply CMD_GPT
1014 imply DISTRO_DEFAULTS
1015 imply OF_HAS_PRIOR_STAGE
1016
1017 config ARCH_OWL
1018 bool "Actions Semi OWL SoCs"
1019 select DM
1020 select DM_SERIAL
1021 select GPIO_EXTRA_HEADER
1022 select OWL_SERIAL
1023 select CLK
1024 select CLK_OWL
1025 select OF_CONTROL
1026 select SYS_RELOC_GD_ENV_ADDR
1027 imply CMD_DM
1028
1029 config ARCH_QEMU
1030 bool "QEMU Virtual Platform"
1031 select DM
1032 select DM_SERIAL
1033 select OF_CONTROL
1034 select PL01X_SERIAL
1035 imply CMD_DM
1036 imply DM_RNG
1037 imply DM_RTC
1038 imply RTC_PL031
1039 imply OF_HAS_PRIOR_STAGE
1040 imply VIDEO
1041 imply VIDEO_BOCHS
1042 imply SYS_WHITE_ON_BLACK
1043 imply SYS_CONSOLE_IS_IN_ENV
1044 imply PRE_CONSOLE_BUFFER
1045 imply USB
1046 imply USB_XHCI_HCD
1047 imply USB_XHCI_PCI
1048 imply USB_KEYBOARD
1049 imply CMD_USB
1050
1051 config ARCH_RMOBILE
1052 bool "Renesas ARM SoCs"
1053 select DM
1054 select DM_SERIAL
1055 select GPIO_EXTRA_HEADER
1056 imply BOARD_EARLY_INIT_F
1057 imply CMD_DM
1058 imply FAT_WRITE
1059 imply SYS_THUMB_BUILD
1060 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
1061
1062 config ARCH_SNAPDRAGON
1063 bool "Qualcomm Snapdragon SoCs"
1064 select ARM64
1065 select DM
1066 select DM_GPIO
1067 select DM_SERIAL
1068 select GPIO_EXTRA_HEADER
1069 select MSM_SMEM
1070 select OF_CONTROL
1071 select OF_SEPARATE
1072 select SMEM
1073 select SPMI
1074 imply CMD_DM
1075
1076 config ARCH_SOCFPGA
1077 bool "Altera SOCFPGA family"
1078 select ARCH_EARLY_INIT_R
1079 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
1080 select ARM64 if TARGET_SOCFPGA_SOC64
1081 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1082 select DM
1083 select DM_SERIAL
1084 select GICV2
1085 select GPIO_EXTRA_HEADER
1086 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1087 select OF_CONTROL
1088 select SPL_DM_RESET if DM_RESET
1089 select SPL_DM_SERIAL
1090 select SPL_LIBCOMMON_SUPPORT
1091 select SPL_LIBGENERIC_SUPPORT
1092 select SPL_OF_CONTROL
1093 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1094 select SPL_SERIAL
1095 select SPL_SYSRESET
1096 select SPL_WATCHDOG
1097 select SUPPORT_SPL
1098 select SYS_NS16550
1099 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1100 select SYSRESET
1101 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1102 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1103 imply CMD_DM
1104 imply CMD_MTDPARTS
1105 imply CRC32_VERIFY
1106 imply DM_SPI
1107 imply DM_SPI_FLASH
1108 imply FAT_WRITE
1109 imply SPL
1110 imply SPL_DM
1111 imply SPL_DM_SPI
1112 imply SPL_DM_SPI_FLASH
1113 imply SPL_LIBDISK_SUPPORT
1114 imply SPL_MMC
1115 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1116 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1117 imply SPL_SPI_FLASH_SUPPORT
1118 imply SPL_SPI
1119 imply L2X0_CACHE
1120
1121 config ARCH_SUNXI
1122 bool "Support sunxi (Allwinner) SoCs"
1123 select BINMAN
1124 select CMD_GPIO
1125 select CMD_MMC if MMC
1126 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1127 select CLK
1128 select DM
1129 select DM_GPIO
1130 select DM_I2C if I2C
1131 select DM_SPI if SPI
1132 select DM_SPI_FLASH if SPI
1133 select DM_KEYBOARD
1134 select DM_MMC if MMC
1135 select DM_SCSI if SCSI
1136 select DM_SERIAL
1137 select GPIO_EXTRA_HEADER
1138 select OF_BOARD_SETUP
1139 select OF_CONTROL
1140 select OF_SEPARATE
1141 select PINCTRL
1142 select SPECIFY_CONSOLE_INDEX
1143 select SPL_SEPARATE_BSS if SPL
1144 select SPL_STACK_R if SPL
1145 select SPL_SYS_MALLOC_SIMPLE if SPL
1146 select SPL_SYS_THUMB_BUILD if !ARM64
1147 select SUNXI_GPIO
1148 select SYS_NS16550
1149 select SYS_THUMB_BUILD if !ARM64
1150 select USB if DISTRO_DEFAULTS
1151 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1152 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1153 select SPL_USE_TINY_PRINTF
1154 select USE_PREBOOT
1155 select SYS_RELOC_GD_ENV_ADDR
1156 imply BOARD_LATE_INIT
1157 imply CMD_DM
1158 imply CMD_GPT
1159 imply CMD_UBI if MTD_RAW_NAND
1160 imply DISTRO_DEFAULTS
1161 imply FAT_WRITE
1162 imply FIT
1163 imply OF_LIBFDT_OVERLAY
1164 imply PRE_CONSOLE_BUFFER
1165 imply SPL_GPIO
1166 imply SPL_LIBCOMMON_SUPPORT
1167 imply SPL_LIBGENERIC_SUPPORT
1168 imply SPL_MMC if MMC
1169 imply SPL_POWER
1170 imply SPL_SERIAL
1171 imply SYSRESET
1172 imply SYSRESET_WATCHDOG
1173 imply SYSRESET_WATCHDOG_AUTO
1174 imply USB_GADGET
1175 imply WDT
1176
1177 config ARCH_U8500
1178 bool "ST-Ericsson U8500 Series"
1179 select CPU_V7A
1180 select DM
1181 select DM_GPIO
1182 select DM_MMC if MMC
1183 select DM_SERIAL
1184 select DM_USB_GADGET if DM_USB
1185 select OF_CONTROL
1186 select SYSRESET
1187 select TIMER
1188 imply AB8500_USB_PHY
1189 imply ARM_PL180_MMCI
1190 imply CLK
1191 imply DM_PMIC
1192 imply DM_RTC
1193 imply NOMADIK_GPIO
1194 imply NOMADIK_MTU_TIMER
1195 imply PHY
1196 imply PL01X_SERIAL
1197 imply PMIC_AB8500
1198 imply RTC_PL031
1199 imply SYS_THUMB_BUILD
1200 imply SYSRESET_SYSCON
1201
1202 config ARCH_VERSAL
1203 bool "Support Xilinx Versal Platform"
1204 select ARM64
1205 select CLK
1206 select DM
1207 select DM_MMC if MMC
1208 select DM_SERIAL
1209 select GICV3
1210 select OF_CONTROL
1211 select SOC_DEVICE
1212 imply BOARD_LATE_INIT
1213 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1214
1215 config ARCH_VERSAL_NET
1216 bool "Support Xilinx Versal NET Platform"
1217 select ARM64
1218 select CLK
1219 select DM
1220 select DM_MMC if MMC
1221 select DM_SERIAL
1222 select OF_CONTROL
1223 imply BOARD_LATE_INIT
1224 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1225
1226 config ARCH_VF610
1227 bool "Freescale Vybrid"
1228 select CPU_V7A
1229 select GPIO_EXTRA_HEADER
1230 select IOMUX_SHARE_CONF_REG
1231 select MACH_IMX
1232 select SYS_FSL_ERRATUM_ESDHC111
1233 imply CMD_MTDPARTS
1234 imply MTD_RAW_NAND
1235
1236 config ARCH_ZYNQ
1237 bool "Xilinx Zynq based platform"
1238 select ARM_TWD_TIMER
1239 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA)
1240 select CLK
1241 select CLK_ZYNQ
1242 select CPU_V7A
1243 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1244 select DM
1245 select DM_MMC if MMC
1246 select DM_SERIAL
1247 select DM_SPI
1248 select DM_SPI_FLASH
1249 select OF_CONTROL
1250 select SPI
1251 select SPL_BOARD_INIT if SPL
1252 select SPL_CLK if SPL
1253 select SPL_DM if SPL
1254 select SPL_DM_SPI if SPL
1255 select SPL_DM_SPI_FLASH if SPL
1256 select SPL_OF_CONTROL if SPL
1257 select SPL_SEPARATE_BSS if SPL
1258 select SPL_TIMER if SPL
1259 select SUPPORT_SPL
1260 select TIMER
1261 imply BOARD_LATE_INIT
1262 imply CMD_CLK
1263 imply CMD_DM
1264 imply CMD_SPL
1265 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1266 imply FAT_WRITE
1267
1268 config ARCH_ZYNQMP_R5
1269 bool "Xilinx ZynqMP R5 based platform"
1270 select CLK
1271 select CPU_V7R
1272 select DM
1273 select DM_MMC if MMC
1274 select DM_SERIAL
1275 select OF_CONTROL
1276 imply CMD_DM
1277 imply DM_USB_GADGET
1278
1279 config ARCH_ZYNQMP
1280 bool "Xilinx ZynqMP based platform"
1281 select ARM64
1282 select CLK
1283 select DM
1284 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART
1285 imply DM_MAILBOX
1286 select DM_MMC if MMC
1287 select DM_SERIAL
1288 select DM_SPI if SPI
1289 select DM_SPI_FLASH if DM_SPI
1290 imply FIRMWARE
1291 select GICV2
1292 select OF_CONTROL
1293 select SPL_BOARD_INIT if SPL
1294 select SPL_CLK if SPL
1295 select SPL_DM if SPL
1296 select SPL_DM_SPI if SPI && SPL_DM
1297 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1298 select SPL_DM_MAILBOX if SPL
1299 imply SPL_FIRMWARE if SPL
1300 select SPL_SEPARATE_BSS if SPL
1301 select SUPPORT_SPL
1302 imply ZYNQMP_IPI if DM_MAILBOX
1303 select SOC_DEVICE
1304 imply BOARD_LATE_INIT
1305 imply CMD_DM
1306 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1307 imply FAT_WRITE
1308 imply MP
1309 imply DM_USB_GADGET
1310 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB
1311
1312 config ARCH_TEGRA
1313 bool "NVIDIA Tegra"
1314 select GPIO_EXTRA_HEADER
1315 imply DISTRO_DEFAULTS
1316 imply FAT_WRITE
1317 imply SPL_TIMER if SPL
1318
1319 config ARCH_VEXPRESS64
1320 bool "Support ARMv8 Arm Ltd. VExpress based boards and models"
1321 select ARM64
1322 select DM
1323 select DM_SERIAL
1324 select PL01X_SERIAL
1325 select OF_CONTROL
1326 select CLK
1327 select BLK
1328 select MTD_NOR_FLASH if MTD
1329 select FLASH_CFI_DRIVER if MTD
1330 select ENV_IS_IN_FLASH if MTD
1331 imply DISTRO_DEFAULTS
1332
1333 config TARGET_CORSTONE1000
1334 bool "Support Corstone1000 Platform"
1335 select ARM64
1336 select PL01X_SERIAL
1337 select DM
1338
1339 config TARGET_TOTAL_COMPUTE
1340 bool "Support Total Compute Platform"
1341 select ARM64
1342 select PL01X_SERIAL
1343 select DM
1344 select DM_SERIAL
1345 select DM_MMC
1346 select DM_GPIO
1347
1348 config TARGET_LS2080A_EMU
1349 bool "Support ls2080a_emu"
1350 select ARCH_LS2080A
1351 select ARM64
1352 select ARMV8_MULTIENTRY
1353 select FSL_DDR_SYNC_REFRESH
1354 select GPIO_EXTRA_HEADER
1355 help
1356 Support for Freescale LS2080A_EMU platform.
1357 The LS2080A Development System (EMULATOR) is a pre-silicon
1358 development platform that supports the QorIQ LS2080A
1359 Layerscape Architecture processor.
1360
1361 config TARGET_LS1088AQDS
1362 bool "Support ls1088aqds"
1363 select ARCH_LS1088A
1364 select ARM64
1365 select ARMV8_MULTIENTRY
1366 select ARCH_SUPPORT_TFABOOT
1367 select BOARD_LATE_INIT
1368 select GPIO_EXTRA_HEADER
1369 select SUPPORT_SPL
1370 select FSL_DDR_INTERACTIVE if !SD_BOOT
1371 help
1372 Support for NXP LS1088AQDS platform.
1373 The LS1088A Development System (QDS) is a high-performance
1374 development platform that supports the QorIQ LS1088A
1375 Layerscape Architecture processor.
1376
1377 config TARGET_LS2080AQDS
1378 bool "Support ls2080aqds"
1379 select ARCH_LS2080A
1380 select ARM64
1381 select ARMV8_MULTIENTRY
1382 select ARCH_SUPPORT_TFABOOT
1383 select BOARD_LATE_INIT
1384 select GPIO_EXTRA_HEADER
1385 select SUPPORT_SPL
1386 imply SCSI
1387 imply SCSI_AHCI
1388 select FSL_DDR_BIST
1389 select FSL_DDR_INTERACTIVE if !SPL
1390 help
1391 Support for Freescale LS2080AQDS platform.
1392 The LS2080A Development System (QDS) is a high-performance
1393 development platform that supports the QorIQ LS2080A
1394 Layerscape Architecture processor.
1395
1396 config TARGET_LS2080ARDB
1397 bool "Support ls2080ardb"
1398 select ARCH_LS2080A
1399 select ARM64
1400 select ARMV8_MULTIENTRY
1401 select ARCH_SUPPORT_TFABOOT
1402 select BOARD_LATE_INIT
1403 select SUPPORT_SPL
1404 select FSL_DDR_BIST
1405 select FSL_DDR_INTERACTIVE if !SPL
1406 select GPIO_EXTRA_HEADER
1407 imply SCSI
1408 imply SCSI_AHCI
1409 help
1410 Support for Freescale LS2080ARDB platform.
1411 The LS2080A Reference design board (RDB) is a high-performance
1412 development platform that supports the QorIQ LS2080A
1413 Layerscape Architecture processor.
1414
1415 config TARGET_LS2081ARDB
1416 bool "Support ls2081ardb"
1417 select ARCH_LS2080A
1418 select ARM64
1419 select ARMV8_MULTIENTRY
1420 select BOARD_LATE_INIT
1421 select GPIO_EXTRA_HEADER
1422 select SUPPORT_SPL
1423 help
1424 Support for Freescale LS2081ARDB platform.
1425 The LS2081A Reference design board (RDB) is a high-performance
1426 development platform that supports the QorIQ LS2081A/LS2041A
1427 Layerscape Architecture processor.
1428
1429 config TARGET_LX2160ARDB
1430 bool "Support lx2160ardb"
1431 select ARCH_LX2160A
1432 select ARM64
1433 select ARMV8_MULTIENTRY
1434 select ARCH_SUPPORT_TFABOOT
1435 select BOARD_LATE_INIT
1436 select GPIO_EXTRA_HEADER
1437 help
1438 Support for NXP LX2160ARDB platform.
1439 The lx2160ardb (LX2160A Reference design board (RDB)
1440 is a high-performance development platform that supports the
1441 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1442
1443 config TARGET_LX2160AQDS
1444 bool "Support lx2160aqds"
1445 select ARCH_LX2160A
1446 select ARM64
1447 select ARMV8_MULTIENTRY
1448 select ARCH_SUPPORT_TFABOOT
1449 select BOARD_LATE_INIT
1450 select GPIO_EXTRA_HEADER
1451 help
1452 Support for NXP LX2160AQDS platform.
1453 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1454 is a high-performance development platform that supports the
1455 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1456
1457 config TARGET_LX2162AQDS
1458 bool "Support lx2162aqds"
1459 select ARCH_LX2162A
1460 select ARCH_MISC_INIT
1461 select ARM64
1462 select ARMV8_MULTIENTRY
1463 select ARCH_SUPPORT_TFABOOT
1464 select BOARD_LATE_INIT
1465 select GPIO_EXTRA_HEADER
1466 help
1467 Support for NXP LX2162AQDS platform.
1468 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1469
1470 config TARGET_HIKEY
1471 bool "Support HiKey 96boards Consumer Edition Platform"
1472 select ARM64
1473 select DM
1474 select DM_GPIO
1475 select DM_SERIAL
1476 select GPIO_EXTRA_HEADER
1477 select OF_CONTROL
1478 select PL01X_SERIAL
1479 select SPECIFY_CONSOLE_INDEX
1480 imply CMD_DM
1481 help
1482 Support for HiKey 96boards platform. It features a HI6220
1483 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1484
1485 config TARGET_HIKEY960
1486 bool "Support HiKey960 96boards Consumer Edition Platform"
1487 select ARM64
1488 select DM
1489 select DM_SERIAL
1490 select GPIO_EXTRA_HEADER
1491 select OF_CONTROL
1492 select PL01X_SERIAL
1493 imply CMD_DM
1494 help
1495 Support for HiKey960 96boards platform. It features a HI3660
1496 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1497
1498 config TARGET_POPLAR
1499 bool "Support Poplar 96boards Enterprise Edition Platform"
1500 select ARM64
1501 select DM
1502 select DM_SERIAL
1503 select GPIO_EXTRA_HEADER
1504 select OF_CONTROL
1505 select PL01X_SERIAL
1506 imply CMD_DM
1507 help
1508 Support for Poplar 96boards EE platform. It features a HI3798cv200
1509 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1510 making it capable of running any commercial set-top solution based on
1511 Linux or Android.
1512
1513 config TARGET_LS1012AQDS
1514 bool "Support ls1012aqds"
1515 select ARCH_LS1012A
1516 select ARM64
1517 select ARCH_SUPPORT_TFABOOT
1518 select BOARD_LATE_INIT
1519 select GPIO_EXTRA_HEADER
1520 help
1521 Support for Freescale LS1012AQDS platform.
1522 The LS1012A Development System (QDS) is a high-performance
1523 development platform that supports the QorIQ LS1012A
1524 Layerscape Architecture processor.
1525
1526 config TARGET_LS1012ARDB
1527 bool "Support ls1012ardb"
1528 select ARCH_LS1012A
1529 select ARM64
1530 select ARCH_SUPPORT_TFABOOT
1531 select BOARD_LATE_INIT
1532 select GPIO_EXTRA_HEADER
1533 imply SCSI
1534 imply SCSI_AHCI
1535 help
1536 Support for Freescale LS1012ARDB platform.
1537 The LS1012A Reference design board (RDB) is a high-performance
1538 development platform that supports the QorIQ LS1012A
1539 Layerscape Architecture processor.
1540
1541 config TARGET_LS1012A2G5RDB
1542 bool "Support ls1012a2g5rdb"
1543 select ARCH_LS1012A
1544 select ARM64
1545 select ARCH_SUPPORT_TFABOOT
1546 select BOARD_LATE_INIT
1547 select GPIO_EXTRA_HEADER
1548 imply SCSI
1549 help
1550 Support for Freescale LS1012A2G5RDB platform.
1551 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1552 development platform that supports the QorIQ LS1012A
1553 Layerscape Architecture processor.
1554
1555 config TARGET_LS1012AFRWY
1556 bool "Support ls1012afrwy"
1557 select ARCH_LS1012A
1558 select ARM64
1559 select ARCH_SUPPORT_TFABOOT
1560 select BOARD_LATE_INIT
1561 select GPIO_EXTRA_HEADER
1562 imply SCSI
1563 imply SCSI_AHCI
1564 help
1565 Support for Freescale LS1012AFRWY platform.
1566 The LS1012A FRWY board (FRWY) is a high-performance
1567 development platform that supports the QorIQ LS1012A
1568 Layerscape Architecture processor.
1569
1570 config TARGET_LS1012AFRDM
1571 bool "Support ls1012afrdm"
1572 select ARCH_LS1012A
1573 select ARM64
1574 select ARCH_SUPPORT_TFABOOT
1575 select GPIO_EXTRA_HEADER
1576 help
1577 Support for Freescale LS1012AFRDM platform.
1578 The LS1012A Freedom board (FRDM) is a high-performance
1579 development platform that supports the QorIQ LS1012A
1580 Layerscape Architecture processor.
1581
1582 config TARGET_LS1028AQDS
1583 bool "Support ls1028aqds"
1584 select ARCH_LS1028A
1585 select ARM64
1586 select ARMV8_MULTIENTRY
1587 select ARCH_SUPPORT_TFABOOT
1588 select BOARD_LATE_INIT
1589 select GPIO_EXTRA_HEADER
1590 help
1591 Support for Freescale LS1028AQDS platform
1592 The LS1028A Development System (QDS) is a high-performance
1593 development platform that supports the QorIQ LS1028A
1594 Layerscape Architecture processor.
1595
1596 config TARGET_LS1028ARDB
1597 bool "Support ls1028ardb"
1598 select ARCH_LS1028A
1599 select ARM64
1600 select ARMV8_MULTIENTRY
1601 select ARCH_SUPPORT_TFABOOT
1602 select BOARD_LATE_INIT
1603 select GPIO_EXTRA_HEADER
1604 help
1605 Support for Freescale LS1028ARDB platform
1606 The LS1028A Development System (RDB) is a high-performance
1607 development platform that supports the QorIQ LS1028A
1608 Layerscape Architecture processor.
1609
1610 config TARGET_LS1088ARDB
1611 bool "Support ls1088ardb"
1612 select ARCH_LS1088A
1613 select ARM64
1614 select ARMV8_MULTIENTRY
1615 select ARCH_SUPPORT_TFABOOT
1616 select BOARD_LATE_INIT
1617 select SUPPORT_SPL
1618 select FSL_DDR_INTERACTIVE if !SD_BOOT
1619 select GPIO_EXTRA_HEADER
1620 help
1621 Support for NXP LS1088ARDB platform.
1622 The LS1088A Reference design board (RDB) is a high-performance
1623 development platform that supports the QorIQ LS1088A
1624 Layerscape Architecture processor.
1625
1626 config TARGET_LS1021AQDS
1627 bool "Support ls1021aqds"
1628 select ARCH_LS1021A
1629 select ARCH_SUPPORT_PSCI
1630 select BOARD_EARLY_INIT_F
1631 select BOARD_LATE_INIT
1632 select CPU_V7A
1633 select CPU_V7_HAS_NONSEC
1634 select CPU_V7_HAS_VIRT
1635 select LS1_DEEP_SLEEP
1636 select PEN_ADDR_BIG_ENDIAN
1637 select SUPPORT_SPL
1638 select SYS_FSL_DDR
1639 select FSL_DDR_INTERACTIVE
1640 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1641 select GPIO_EXTRA_HEADER
1642 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1643 imply SCSI
1644
1645 config TARGET_LS1021ATWR
1646 bool "Support ls1021atwr"
1647 select ARCH_LS1021A
1648 select ARCH_SUPPORT_PSCI
1649 select BOARD_EARLY_INIT_F
1650 select BOARD_LATE_INIT
1651 select CPU_V7A
1652 select CPU_V7_HAS_NONSEC
1653 select CPU_V7_HAS_VIRT
1654 select LS1_DEEP_SLEEP
1655 select PEN_ADDR_BIG_ENDIAN
1656 select SUPPORT_SPL
1657 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1658 select GPIO_EXTRA_HEADER
1659 imply SCSI
1660
1661 config TARGET_PG_WCOM_SELI8
1662 bool "Support Hitachi-Powergrids SELI8 service unit card"
1663 select ARCH_LS1021A
1664 select ARCH_SUPPORT_PSCI
1665 select BOARD_EARLY_INIT_F
1666 select BOARD_LATE_INIT
1667 select CPU_V7A
1668 select CPU_V7_HAS_NONSEC
1669 select CPU_V7_HAS_VIRT
1670 select SYS_FSL_DDR
1671 select FSL_DDR_INTERACTIVE
1672 select GPIO_EXTRA_HEADER
1673 select VENDOR_KM
1674 imply SCSI
1675 help
1676 Support for Hitachi-Powergrids SELI8 service unit card.
1677 SELI8 is a QorIQ LS1021a based service unit card used
1678 in XMC20 and FOX615 product families.
1679
1680 config TARGET_PG_WCOM_EXPU1
1681 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1682 select ARCH_LS1021A
1683 select ARCH_SUPPORT_PSCI
1684 select BOARD_EARLY_INIT_F
1685 select BOARD_LATE_INIT
1686 select CPU_V7A
1687 select CPU_V7_HAS_NONSEC
1688 select CPU_V7_HAS_VIRT
1689 select SYS_FSL_DDR
1690 select FSL_DDR_INTERACTIVE
1691 select VENDOR_KM
1692 imply SCSI
1693 help
1694 Support for Hitachi-Powergrids EXPU1 service unit card.
1695 EXPU1 is a QorIQ LS1021a based service unit card used
1696 in XMC20 and FOX615 product families.
1697
1698 config TARGET_LS1021ATSN
1699 bool "Support ls1021atsn"
1700 select ARCH_LS1021A
1701 select ARCH_SUPPORT_PSCI
1702 select BOARD_EARLY_INIT_F
1703 select BOARD_LATE_INIT
1704 select CPU_V7A
1705 select CPU_V7_HAS_NONSEC
1706 select CPU_V7_HAS_VIRT
1707 select LS1_DEEP_SLEEP
1708 select SUPPORT_SPL
1709 select GPIO_EXTRA_HEADER
1710 imply SCSI
1711
1712 config TARGET_LS1021AIOT
1713 bool "Support ls1021aiot"
1714 select ARCH_LS1021A
1715 select ARCH_SUPPORT_PSCI
1716 select BOARD_LATE_INIT
1717 select CPU_V7A
1718 select CPU_V7_HAS_NONSEC
1719 select CPU_V7_HAS_VIRT
1720 select PEN_ADDR_BIG_ENDIAN
1721 select SUPPORT_SPL
1722 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1723 select GPIO_EXTRA_HEADER
1724 imply SCSI
1725 help
1726 Support for Freescale LS1021AIOT platform.
1727 The LS1021A Freescale board (IOT) is a high-performance
1728 development platform that supports the QorIQ LS1021A
1729 Layerscape Architecture processor.
1730
1731 config TARGET_LS1043AQDS
1732 bool "Support ls1043aqds"
1733 select ARCH_LS1043A
1734 select ARM64
1735 select ARMV8_MULTIENTRY
1736 select ARCH_SUPPORT_TFABOOT
1737 select BOARD_EARLY_INIT_F
1738 select BOARD_LATE_INIT
1739 select SUPPORT_SPL
1740 select FSL_DDR_INTERACTIVE if !SPL
1741 select FSL_DSPI if !SPL_NO_DSPI
1742 select DM_SPI_FLASH if FSL_DSPI
1743 select GPIO_EXTRA_HEADER
1744 imply SCSI
1745 imply SCSI_AHCI
1746 help
1747 Support for Freescale LS1043AQDS platform.
1748
1749 config TARGET_LS1043ARDB
1750 bool "Support ls1043ardb"
1751 select ARCH_LS1043A
1752 select ARM64
1753 select ARMV8_MULTIENTRY
1754 select ARCH_SUPPORT_TFABOOT
1755 select BOARD_EARLY_INIT_F
1756 select BOARD_LATE_INIT
1757 select SUPPORT_SPL
1758 select FSL_DSPI if !SPL_NO_DSPI
1759 select DM_SPI_FLASH if FSL_DSPI
1760 select GPIO_EXTRA_HEADER
1761 help
1762 Support for Freescale LS1043ARDB platform.
1763
1764 config TARGET_LS1046AQDS
1765 bool "Support ls1046aqds"
1766 select ARCH_LS1046A
1767 select ARM64
1768 select ARMV8_MULTIENTRY
1769 select ARCH_SUPPORT_TFABOOT
1770 select BOARD_EARLY_INIT_F
1771 select BOARD_LATE_INIT
1772 select DM_SPI_FLASH if DM_SPI
1773 select SUPPORT_SPL
1774 select FSL_DDR_BIST if !SPL
1775 select FSL_DDR_INTERACTIVE if !SPL
1776 select FSL_DDR_INTERACTIVE if !SPL
1777 select GPIO_EXTRA_HEADER
1778 imply SCSI
1779 help
1780 Support for Freescale LS1046AQDS platform.
1781 The LS1046A Development System (QDS) is a high-performance
1782 development platform that supports the QorIQ LS1046A
1783 Layerscape Architecture processor.
1784
1785 config TARGET_LS1046ARDB
1786 bool "Support ls1046ardb"
1787 select ARCH_LS1046A
1788 select ARM64
1789 select ARMV8_MULTIENTRY
1790 select ARCH_SUPPORT_TFABOOT
1791 select BOARD_EARLY_INIT_F
1792 select BOARD_LATE_INIT
1793 select DM_SPI_FLASH if DM_SPI
1794 select POWER_MC34VR500
1795 select SUPPORT_SPL
1796 select FSL_DDR_BIST
1797 select FSL_DDR_INTERACTIVE if !SPL
1798 select GPIO_EXTRA_HEADER
1799 imply SCSI
1800 help
1801 Support for Freescale LS1046ARDB platform.
1802 The LS1046A Reference Design Board (RDB) is a high-performance
1803 development platform that supports the QorIQ LS1046A
1804 Layerscape Architecture processor.
1805
1806 config TARGET_LS1046AFRWY
1807 bool "Support ls1046afrwy"
1808 select ARCH_LS1046A
1809 select ARM64
1810 select ARMV8_MULTIENTRY
1811 select ARCH_SUPPORT_TFABOOT
1812 select BOARD_EARLY_INIT_F
1813 select BOARD_LATE_INIT
1814 select DM_SPI_FLASH if DM_SPI
1815 select GPIO_EXTRA_HEADER
1816 imply SCSI
1817 help
1818 Support for Freescale LS1046AFRWY platform.
1819 The LS1046A Freeway Board (FRWY) is a high-performance
1820 development platform that supports the QorIQ LS1046A
1821 Layerscape Architecture processor.
1822
1823 config TARGET_SL28
1824 bool "Support sl28"
1825 select ARCH_LS1028A
1826 select ARM64
1827 select ARMV8_MULTIENTRY
1828 select SUPPORT_SPL
1829 select BINMAN
1830 select DM
1831 select DM_GPIO
1832 select DM_I2C
1833 select DM_MMC
1834 select DM_SPI_FLASH
1835 select DM_MDIO
1836 select PCI
1837 select DM_RNG
1838 select DM_RTC
1839 select DM_SCSI
1840 select DM_SERIAL
1841 select DM_SPI
1842 select GPIO_EXTRA_HEADER
1843 select SPL_DM if SPL
1844 select SPL_DM_SPI if SPL
1845 select SPL_DM_SPI_FLASH if SPL
1846 select SPL_DM_I2C if SPL
1847 select SPL_DM_MMC if SPL
1848 select SPL_DM_SERIAL if SPL
1849 help
1850 Support for Kontron SMARC-sAL28 board.
1851
1852 config TARGET_TEN64
1853 bool "Support ten64"
1854 select ARCH_LS1088A
1855 select ARCH_MISC_INIT
1856 select ARM64
1857 select ARMV8_MULTIENTRY
1858 select ARCH_SUPPORT_TFABOOT
1859 select BOARD_LATE_INIT
1860 select SUPPORT_SPL
1861 select FSL_DDR_INTERACTIVE if !SD_BOOT
1862 select GPIO_EXTRA_HEADER
1863 help
1864 Support for Traverse Technologies Ten64 board, based
1865 on NXP LS1088A.
1866
1867 config ARCH_UNIPHIER
1868 bool "Socionext UniPhier SoCs"
1869 select BOARD_LATE_INIT
1870 select DM
1871 select DM_GPIO
1872 select DM_I2C
1873 select DM_MMC
1874 select DM_MTD
1875 select DM_RESET
1876 select DM_SERIAL
1877 select OF_BOARD_SETUP
1878 select OF_CONTROL
1879 select OF_LIBFDT
1880 select PINCTRL
1881 select SPL_BOARD_INIT if SPL
1882 select SPL_DM if SPL
1883 select SPL_LIBCOMMON_SUPPORT if SPL
1884 select SPL_LIBGENERIC_SUPPORT if SPL
1885 select SPL_OF_CONTROL if SPL
1886 select SPL_PINCTRL if SPL
1887 select SUPPORT_SPL
1888 imply CMD_DM
1889 imply DISTRO_DEFAULTS
1890 imply FAT_WRITE
1891 help
1892 Support for UniPhier SoC family developed by Socionext Inc.
1893 (formerly, System LSI Business Division of Panasonic Corporation)
1894
1895 config ARCH_SYNQUACER
1896 bool "Socionext SynQuacer SoCs"
1897 select ARM64
1898 select DM
1899 select GIC_V3
1900 select PSCI_RESET
1901 select SYSRESET
1902 select SYSRESET_PSCI
1903 select OF_CONTROL
1904 help
1905 Support for SynQuacer SoC family developed by Socionext Inc.
1906 This SoC is used on 96boards EE DeveloperBox.
1907
1908 config ARCH_STM32
1909 bool "Support STMicroelectronics STM32 MCU with cortex M"
1910 select CPU_V7M
1911 select DM
1912 select DM_SERIAL
1913 imply CMD_DM
1914
1915 config ARCH_STI
1916 bool "Support STMicroelectronics SoCs"
1917 select BLK
1918 select CPU_V7A
1919 select DM
1920 select DM_MMC
1921 select DM_RESET
1922 select DM_SERIAL
1923 imply CMD_DM
1924 help
1925 Support for STMicroelectronics STiH407/10 SoC family.
1926 This SoC is used on Linaro 96Board STiH410-B2260
1927
1928 config ARCH_STM32MP
1929 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1930 select ARCH_MISC_INIT
1931 select ARCH_SUPPORT_TFABOOT
1932 select BOARD_LATE_INIT
1933 select CLK
1934 select DM
1935 select DM_GPIO
1936 select DM_RESET
1937 select DM_SERIAL
1938 select MISC
1939 select OF_CONTROL
1940 select OF_LIBFDT
1941 select OF_SYSTEM_SETUP
1942 select PINCTRL
1943 select REGMAP
1944 select SYSCON
1945 select SYSRESET
1946 select SYS_THUMB_BUILD
1947 imply SPL_SYSRESET
1948 imply CMD_DM
1949 imply CMD_POWEROFF
1950 imply OF_LIBFDT_OVERLAY
1951 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1952 imply USE_PREBOOT
1953 imply TIMESTAMP
1954 help
1955 Support for STM32MP SoC family developed by STMicroelectronics,
1956 MPUs based on ARM cortex A core
1957 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1958 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1959 chain.
1960 SPL is the unsecure FSBL for the basic boot chain.
1961
1962 config ARCH_ROCKCHIP
1963 bool "Support Rockchip SoCs"
1964 select BLK
1965 select BINMAN if SPL_OPTEE || SPL
1966 select DM
1967 select DM_GPIO
1968 select DM_I2C
1969 select DM_MMC
1970 select DM_PWM
1971 select DM_REGULATOR
1972 select DM_SERIAL
1973 select DM_SPI
1974 select DM_SPI_FLASH
1975 select ENABLE_ARM_SOC_BOOT0_HOOK
1976 select OF_CONTROL
1977 select SPI
1978 select SPL_DM if SPL
1979 select SPL_DM_SPI if SPL
1980 select SPL_DM_SPI_FLASH if SPL
1981 select SYS_MALLOC_F
1982 select SYS_THUMB_BUILD if !ARM64
1983 imply ADC
1984 imply CMD_DM
1985 imply DEBUG_UART_BOARD_INIT
1986 imply BOOTSTD_DEFAULTS
1987 imply FAT_WRITE
1988 imply SARADC_ROCKCHIP
1989 imply SPL_SYSRESET
1990 imply SPL_SYS_MALLOC_SIMPLE
1991 imply SYS_NS16550
1992 imply TPL_SYSRESET
1993 imply USB_FUNCTION_FASTBOOT
1994
1995 config ARCH_OCTEONTX
1996 bool "Support OcteonTX SoCs"
1997 select CLK
1998 select DM
1999 select GPIO_EXTRA_HEADER
2000 select ARM64
2001 select OF_CONTROL
2002 select OF_LIVE
2003 select BOARD_LATE_INIT
2004 select SYS_CACHE_SHIFT_7
2005 select SYS_PCI_64BIT if PCI
2006 imply OF_HAS_PRIOR_STAGE
2007
2008 config ARCH_OCTEONTX2
2009 bool "Support OcteonTX2 SoCs"
2010 select CLK
2011 select DM
2012 select GPIO_EXTRA_HEADER
2013 select ARM64
2014 select OF_CONTROL
2015 select OF_LIVE
2016 select BOARD_LATE_INIT
2017 select SYS_CACHE_SHIFT_7
2018 select SYS_PCI_64BIT if PCI
2019 imply OF_HAS_PRIOR_STAGE
2020
2021 config TARGET_THUNDERX_88XX
2022 bool "Support ThunderX 88xx"
2023 select ARM64
2024 select GPIO_EXTRA_HEADER
2025 select OF_CONTROL
2026 select PL01X_SERIAL
2027 select SYS_CACHE_SHIFT_7
2028
2029 config ARCH_ASPEED
2030 bool "Support Aspeed SoCs"
2031 select DM
2032 select OF_CONTROL
2033 imply CMD_DM
2034
2035 config TARGET_DURIAN
2036 bool "Support Phytium Durian Platform"
2037 select ARM64
2038 select GPIO_EXTRA_HEADER
2039 help
2040 Support for durian platform.
2041 It has 2GB Sdram, uart and pcie.
2042
2043 config TARGET_POMELO
2044 bool "Support Phytium Pomelo Platform"
2045 select ARM64
2046 select DM
2047 select AHCI
2048 select SCSI_AHCI
2049 select AHCI_PCI
2050 select BLK
2051 select PCI
2052 select DM_PCI
2053 select SCSI
2054 select DM_SCSI
2055 select DM_SERIAL
2056 imply CMD_PCI
2057 help
2058 Support for pomelo platform.
2059 It has 8GB Sdram, uart and pcie.
2060
2061 config TARGET_PRESIDIO_ASIC
2062 bool "Support Cortina Presidio ASIC Platform"
2063 select ARM64
2064 select GICV2
2065
2066 config TARGET_XENGUEST_ARM64
2067 bool "Xen guest ARM64"
2068 select ARM64
2069 select XEN
2070 select OF_CONTROL
2071 select LINUX_KERNEL_IMAGE_HEADER
2072 select XEN_SERIAL
2073 imply OF_HAS_PRIOR_STAGE
2074
2075 config ARCH_GXP
2076 bool "Support HPE GXP SoCs"
2077 select DM
2078 select OF_CONTROL
2079 imply CMD_DM
2080
2081 endchoice
2082
2083 config SUPPORT_PASSING_ATAGS
2084 bool "Support pre-devicetree ATAG-based booting"
2085 depends on !ARM64
2086 imply SETUP_MEMORY_TAGS
2087 help
2088 Support for booting older Linux kernels, using ATAGs rather than
2089 passing a devicetree. This is option is rarely used, and the
2090 semantics are defined at
2091 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
2092
2093 config SETUP_MEMORY_TAGS
2094 bool "Pass memory size information via ATAG"
2095 depends on SUPPORT_PASSING_ATAGS
2096
2097 config CMDLINE_TAG
2098 bool "Pass Linux kernel cmdline via ATAG"
2099 depends on SUPPORT_PASSING_ATAGS
2100
2101 config INITRD_TAG
2102 bool "Pass initrd starting point and size via ATAG"
2103 depends on SUPPORT_PASSING_ATAGS
2104
2105 config REVISION_TAG
2106 bool "Pass system revision via ATAG"
2107 depends on SUPPORT_PASSING_ATAGS
2108
2109 config SERIAL_TAG
2110 bool "Pass system serial number via ATAG"
2111 depends on SUPPORT_PASSING_ATAGS
2112
2113 config STATIC_MACH_TYPE
2114 bool "Statically define the Machine ID number"
2115 default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2116 help
2117 When booting via ATAGs, enable this option if we know the correct
2118 machine ID number to use at compile time. Some systems will be
2119 passed the number dynamically by whatever loads U-Boot.
2120
2121 config MACH_TYPE
2122 int "Machine ID number"
2123 depends on STATIC_MACH_TYPE
2124 default 527 if TARGET_DS109
2125 default 1955 if TARGET_NOKIA_RX51
2126 default 3036 if TARGET_DS414
2127 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac"
2128 help
2129 When booting via ATAGs, the machine type must be passed as a number.
2130 For the full list see https://www.arm.linux.org.uk/developer/machines
2131
2132 config ARCH_SUPPORT_TFABOOT
2133 bool
2134
2135 config TFABOOT
2136 bool "Support for booting from TF-A"
2137 depends on ARCH_SUPPORT_TFABOOT
2138 help
2139 Some platforms support the setup of secure registers (for instance
2140 for CPU errata handling) or provide secure services like PSCI.
2141 Those services could also be provided by other firmware parts
2142 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
2143 does not need to (and cannot) execute this code.
2144 Enabling this option will make a U-Boot binary that is relying
2145 on other firmware layers to provide secure functionality.
2146
2147 config TI_SECURE_DEVICE
2148 bool "HS Device Type Support"
2149 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2150 help
2151 If a high secure (HS) device type is being used, this config
2152 must be set. This option impacts various aspects of the
2153 build system (to create signed boot images that can be
2154 authenticated) and the code. See the doc/README.ti-secure
2155 file for further details.
2156
2157 config SYS_KWD_CONFIG
2158 string "kwbimage config file path"
2159 depends on ARCH_KIRKWOOD || ARCH_MVEBU
2160 default "arch/arm/mach-mvebu/kwbimage.cfg"
2161 help
2162 Path within the source directory to the kwbimage.cfg file to use
2163 when packaging the U-Boot image for use.
2164
2165 source "arch/arm/mach-apple/Kconfig"
2166
2167 source "arch/arm/mach-aspeed/Kconfig"
2168
2169 source "arch/arm/mach-at91/Kconfig"
2170
2171 source "arch/arm/mach-bcm283x/Kconfig"
2172
2173 source "arch/arm/mach-bcmbca/Kconfig"
2174
2175 source "arch/arm/mach-bcmstb/Kconfig"
2176
2177 source "arch/arm/mach-davinci/Kconfig"
2178
2179 source "arch/arm/mach-exynos/Kconfig"
2180
2181 source "arch/arm/mach-hpe/gxp/Kconfig"
2182
2183 source "arch/arm/mach-highbank/Kconfig"
2184
2185 source "arch/arm/mach-histb/Kconfig"
2186
2187 source "arch/arm/mach-integrator/Kconfig"
2188
2189 source "arch/arm/mach-ipq40xx/Kconfig"
2190
2191 source "arch/arm/mach-k3/Kconfig"
2192
2193 source "arch/arm/mach-keystone/Kconfig"
2194
2195 source "arch/arm/mach-kirkwood/Kconfig"
2196
2197 source "arch/arm/mach-lpc32xx/Kconfig"
2198
2199 source "arch/arm/mach-mvebu/Kconfig"
2200
2201 source "arch/arm/mach-octeontx/Kconfig"
2202
2203 source "arch/arm/mach-octeontx2/Kconfig"
2204
2205 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2206
2207 source "arch/arm/mach-imx/mx3/Kconfig"
2208
2209 source "arch/arm/mach-imx/mx5/Kconfig"
2210
2211 source "arch/arm/mach-imx/mx6/Kconfig"
2212
2213 source "arch/arm/mach-imx/mx7/Kconfig"
2214
2215 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2216
2217 source "arch/arm/mach-imx/imx8/Kconfig"
2218
2219 source "arch/arm/mach-imx/imx8m/Kconfig"
2220
2221 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2222
2223 source "arch/arm/mach-imx/imx9/Kconfig"
2224
2225 source "arch/arm/mach-imx/imxrt/Kconfig"
2226
2227 source "arch/arm/mach-imx/mxs/Kconfig"
2228
2229 source "arch/arm/mach-omap2/Kconfig"
2230
2231 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2232
2233 source "arch/arm/mach-orion5x/Kconfig"
2234
2235 source "arch/arm/mach-owl/Kconfig"
2236
2237 source "arch/arm/mach-rmobile/Kconfig"
2238
2239 source "arch/arm/mach-meson/Kconfig"
2240
2241 source "arch/arm/mach-mediatek/Kconfig"
2242
2243 source "arch/arm/mach-qemu/Kconfig"
2244
2245 source "arch/arm/mach-rockchip/Kconfig"
2246
2247 source "arch/arm/mach-s5pc1xx/Kconfig"
2248
2249 source "arch/arm/mach-snapdragon/Kconfig"
2250
2251 source "arch/arm/mach-socfpga/Kconfig"
2252
2253 source "arch/arm/mach-sti/Kconfig"
2254
2255 source "arch/arm/mach-stm32/Kconfig"
2256
2257 source "arch/arm/mach-stm32mp/Kconfig"
2258
2259 source "arch/arm/mach-sunxi/Kconfig"
2260
2261 source "arch/arm/mach-tegra/Kconfig"
2262
2263 source "arch/arm/mach-u8500/Kconfig"
2264
2265 source "arch/arm/mach-uniphier/Kconfig"
2266
2267 source "arch/arm/cpu/armv7/vf610/Kconfig"
2268
2269 source "arch/arm/mach-zynq/Kconfig"
2270
2271 source "arch/arm/mach-zynqmp/Kconfig"
2272
2273 source "arch/arm/mach-versal/Kconfig"
2274
2275 source "arch/arm/mach-versal-net/Kconfig"
2276
2277 source "arch/arm/mach-zynqmp-r5/Kconfig"
2278
2279 source "arch/arm/cpu/armv7/Kconfig"
2280
2281 source "arch/arm/cpu/armv8/Kconfig"
2282
2283 source "arch/arm/mach-imx/Kconfig"
2284
2285 source "arch/arm/mach-nexell/Kconfig"
2286
2287 source "arch/arm/mach-npcm/Kconfig"
2288
2289 source "board/armltd/total_compute/Kconfig"
2290 source "board/armltd/corstone1000/Kconfig"
2291 source "board/bosch/shc/Kconfig"
2292 source "board/bosch/guardian/Kconfig"
2293 source "board/Marvell/octeontx/Kconfig"
2294 source "board/Marvell/octeontx2/Kconfig"
2295 source "board/armltd/vexpress/Kconfig"
2296 source "board/armltd/vexpress64/Kconfig"
2297 source "board/cortina/presidio-asic/Kconfig"
2298 source "board/broadcom/bcmns/Kconfig"
2299 source "board/broadcom/bcmns3/Kconfig"
2300 source "board/cavium/thunderx/Kconfig"
2301 source "board/eets/pdu001/Kconfig"
2302 source "board/emulation/qemu-arm/Kconfig"
2303 source "board/freescale/ls2080aqds/Kconfig"
2304 source "board/freescale/ls2080ardb/Kconfig"
2305 source "board/freescale/ls1088a/Kconfig"
2306 source "board/freescale/ls1028a/Kconfig"
2307 source "board/freescale/ls1021aqds/Kconfig"
2308 source "board/freescale/ls1043aqds/Kconfig"
2309 source "board/freescale/ls1021atwr/Kconfig"
2310 source "board/freescale/ls1021atsn/Kconfig"
2311 source "board/freescale/ls1021aiot/Kconfig"
2312 source "board/freescale/ls1046aqds/Kconfig"
2313 source "board/freescale/ls1043ardb/Kconfig"
2314 source "board/freescale/ls1046ardb/Kconfig"
2315 source "board/freescale/ls1046afrwy/Kconfig"
2316 source "board/freescale/ls1012aqds/Kconfig"
2317 source "board/freescale/ls1012ardb/Kconfig"
2318 source "board/freescale/ls1012afrdm/Kconfig"
2319 source "board/freescale/lx2160a/Kconfig"
2320 source "board/grinn/chiliboard/Kconfig"
2321 source "board/hisilicon/hikey/Kconfig"
2322 source "board/hisilicon/hikey960/Kconfig"
2323 source "board/hisilicon/poplar/Kconfig"
2324 source "board/isee/igep003x/Kconfig"
2325 source "board/kontron/sl28/Kconfig"
2326 source "board/myir/mys_6ulx/Kconfig"
2327 source "board/samsung/common/Kconfig"
2328 source "board/siemens/common/Kconfig"
2329 source "board/seeed/npi_imx6ull/Kconfig"
2330 source "board/socionext/developerbox/Kconfig"
2331 source "board/st/stv0991/Kconfig"
2332 source "board/tcl/sl50/Kconfig"
2333 source "board/traverse/ten64/Kconfig"
2334 source "board/variscite/dart_6ul/Kconfig"
2335 source "board/vscom/baltos/Kconfig"
2336 source "board/phytium/durian/Kconfig"
2337 source "board/phytium/pomelo/Kconfig"
2338 source "board/xen/xenguest_arm64/Kconfig"
2339
2340 source "arch/arm/Kconfig.debug"
2341
2342 endmenu