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1 /*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22 #include "skeleton.dtsi"
23
24 / {
25 interrupt-parent = <&gic>;
26
27 aliases {
28 spi0 = &spi_0;
29 spi1 = &spi_1;
30 spi2 = &spi_2;
31 i2c0 = &i2c_0;
32 i2c1 = &i2c_1;
33 i2c2 = &i2c_2;
34 i2c3 = &i2c_3;
35 i2c4 = &i2c_4;
36 i2c5 = &i2c_5;
37 i2c6 = &i2c_6;
38 i2c7 = &i2c_7;
39 csis0 = &csis_0;
40 csis1 = &csis_1;
41 fimc0 = &fimc_0;
42 fimc1 = &fimc_1;
43 fimc2 = &fimc_2;
44 fimc3 = &fimc_3;
45 };
46
47 chipid@10000000 {
48 compatible = "samsung,exynos4210-chipid";
49 reg = <0x10000000 0x100>;
50 };
51
52 mipi_phy: video-phy@10020710 {
53 compatible = "samsung,s5pv210-mipi-video-phy";
54 reg = <0x10020710 8>;
55 #phy-cells = <1>;
56 };
57
58 pd_mfc: mfc-power-domain@10023C40 {
59 compatible = "samsung,exynos4210-pd";
60 reg = <0x10023C40 0x20>;
61 };
62
63 pd_g3d: g3d-power-domain@10023C60 {
64 compatible = "samsung,exynos4210-pd";
65 reg = <0x10023C60 0x20>;
66 };
67
68 pd_lcd0: lcd0-power-domain@10023C80 {
69 compatible = "samsung,exynos4210-pd";
70 reg = <0x10023C80 0x20>;
71 };
72
73 pd_tv: tv-power-domain@10023C20 {
74 compatible = "samsung,exynos4210-pd";
75 reg = <0x10023C20 0x20>;
76 };
77
78 pd_cam: cam-power-domain@10023C00 {
79 compatible = "samsung,exynos4210-pd";
80 reg = <0x10023C00 0x20>;
81 };
82
83 pd_gps: gps-power-domain@10023CE0 {
84 compatible = "samsung,exynos4210-pd";
85 reg = <0x10023CE0 0x20>;
86 };
87
88 gic: interrupt-controller@10490000 {
89 compatible = "arm,cortex-a9-gic";
90 #interrupt-cells = <3>;
91 interrupt-controller;
92 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
93 };
94
95 combiner: interrupt-controller@10440000 {
96 compatible = "samsung,exynos4210-combiner";
97 #interrupt-cells = <2>;
98 interrupt-controller;
99 reg = <0x10440000 0x1000>;
100 };
101
102 sys_reg: syscon@10010000 {
103 compatible = "samsung,exynos4-sysreg", "syscon";
104 reg = <0x10010000 0x400>;
105 };
106
107 camera {
108 compatible = "samsung,fimc", "simple-bus";
109 status = "disabled";
110 #address-cells = <1>;
111 #size-cells = <1>;
112 ranges;
113
114 clock_cam: clock-controller {
115 #clock-cells = <1>;
116 };
117
118 fimc_0: fimc@11800000 {
119 compatible = "samsung,exynos4210-fimc";
120 reg = <0x11800000 0x1000>;
121 interrupts = <0 84 0>;
122 clocks = <&clock 256>, <&clock 128>;
123 clock-names = "fimc", "sclk_fimc";
124 samsung,power-domain = <&pd_cam>;
125 samsung,sysreg = <&sys_reg>;
126 status = "disabled";
127 };
128
129 fimc_1: fimc@11810000 {
130 compatible = "samsung,exynos4210-fimc";
131 reg = <0x11810000 0x1000>;
132 interrupts = <0 85 0>;
133 clocks = <&clock 257>, <&clock 129>;
134 clock-names = "fimc", "sclk_fimc";
135 samsung,power-domain = <&pd_cam>;
136 samsung,sysreg = <&sys_reg>;
137 status = "disabled";
138 };
139
140 fimc_2: fimc@11820000 {
141 compatible = "samsung,exynos4210-fimc";
142 reg = <0x11820000 0x1000>;
143 interrupts = <0 86 0>;
144 clocks = <&clock 258>, <&clock 130>;
145 clock-names = "fimc", "sclk_fimc";
146 samsung,power-domain = <&pd_cam>;
147 samsung,sysreg = <&sys_reg>;
148 status = "disabled";
149 };
150
151 fimc_3: fimc@11830000 {
152 compatible = "samsung,exynos4210-fimc";
153 reg = <0x11830000 0x1000>;
154 interrupts = <0 87 0>;
155 clocks = <&clock 259>, <&clock 131>;
156 clock-names = "fimc", "sclk_fimc";
157 samsung,power-domain = <&pd_cam>;
158 samsung,sysreg = <&sys_reg>;
159 status = "disabled";
160 };
161
162 csis_0: csis@11880000 {
163 compatible = "samsung,exynos4210-csis";
164 reg = <0x11880000 0x4000>;
165 interrupts = <0 78 0>;
166 clocks = <&clock 260>, <&clock 134>;
167 clock-names = "csis", "sclk_csis";
168 bus-width = <4>;
169 samsung,power-domain = <&pd_cam>;
170 phys = <&mipi_phy 0>;
171 phy-names = "csis";
172 status = "disabled";
173 #address-cells = <1>;
174 #size-cells = <0>;
175 };
176
177 csis_1: csis@11890000 {
178 compatible = "samsung,exynos4210-csis";
179 reg = <0x11890000 0x4000>;
180 interrupts = <0 80 0>;
181 clocks = <&clock 261>, <&clock 135>;
182 clock-names = "csis", "sclk_csis";
183 bus-width = <2>;
184 samsung,power-domain = <&pd_cam>;
185 phys = <&mipi_phy 2>;
186 phy-names = "csis";
187 status = "disabled";
188 #address-cells = <1>;
189 #size-cells = <0>;
190 };
191 };
192
193 watchdog@10060000 {
194 compatible = "samsung,s3c2410-wdt";
195 reg = <0x10060000 0x100>;
196 interrupts = <0 43 0>;
197 clocks = <&clock 345>;
198 clock-names = "watchdog";
199 status = "disabled";
200 };
201
202 rtc@10070000 {
203 compatible = "samsung,s3c6410-rtc";
204 reg = <0x10070000 0x100>;
205 interrupts = <0 44 0>, <0 45 0>;
206 clocks = <&clock 346>;
207 clock-names = "rtc";
208 status = "disabled";
209 };
210
211 keypad@100A0000 {
212 compatible = "samsung,s5pv210-keypad";
213 reg = <0x100A0000 0x100>;
214 interrupts = <0 109 0>;
215 clocks = <&clock 347>;
216 clock-names = "keypad";
217 status = "disabled";
218 };
219
220 sdhci@12510000 {
221 compatible = "samsung,exynos4210-sdhci";
222 reg = <0x12510000 0x100>;
223 interrupts = <0 73 0>;
224 clocks = <&clock 297>, <&clock 145>;
225 clock-names = "hsmmc", "mmc_busclk.2";
226 status = "disabled";
227 };
228
229 sdhci@12520000 {
230 compatible = "samsung,exynos4210-sdhci";
231 reg = <0x12520000 0x100>;
232 interrupts = <0 74 0>;
233 clocks = <&clock 298>, <&clock 146>;
234 clock-names = "hsmmc", "mmc_busclk.2";
235 status = "disabled";
236 };
237
238 sdhci@12530000 {
239 compatible = "samsung,exynos4210-sdhci";
240 reg = <0x12530000 0x100>;
241 interrupts = <0 75 0>;
242 clocks = <&clock 299>, <&clock 147>;
243 clock-names = "hsmmc", "mmc_busclk.2";
244 status = "disabled";
245 };
246
247 sdhci@12540000 {
248 compatible = "samsung,exynos4210-sdhci";
249 reg = <0x12540000 0x100>;
250 interrupts = <0 76 0>;
251 clocks = <&clock 300>, <&clock 148>;
252 clock-names = "hsmmc", "mmc_busclk.2";
253 status = "disabled";
254 };
255
256 ehci@12580000 {
257 compatible = "samsung,exynos4210-ehci";
258 reg = <0x12580000 0x100>;
259 interrupts = <0 70 0>;
260 clocks = <&clock 304>;
261 clock-names = "usbhost";
262 status = "disabled";
263 };
264
265 ohci@12590000 {
266 compatible = "samsung,exynos4210-ohci";
267 reg = <0x12590000 0x100>;
268 interrupts = <0 70 0>;
269 clocks = <&clock 304>;
270 clock-names = "usbhost";
271 status = "disabled";
272 };
273
274 mfc: codec@13400000 {
275 compatible = "samsung,mfc-v5";
276 reg = <0x13400000 0x10000>;
277 interrupts = <0 94 0>;
278 samsung,power-domain = <&pd_mfc>;
279 clocks = <&clock 273>;
280 clock-names = "mfc";
281 status = "disabled";
282 };
283
284 serial@13800000 {
285 compatible = "samsung,exynos4210-uart";
286 reg = <0x13800000 0x100>;
287 interrupts = <0 52 0>;
288 clocks = <&clock 312>, <&clock 151>;
289 clock-names = "uart", "clk_uart_baud0";
290 status = "disabled";
291 };
292
293 serial@13810000 {
294 compatible = "samsung,exynos4210-uart";
295 reg = <0x13810000 0x100>;
296 interrupts = <0 53 0>;
297 clocks = <&clock 313>, <&clock 152>;
298 clock-names = "uart", "clk_uart_baud0";
299 status = "disabled";
300 };
301
302 serial@13820000 {
303 compatible = "samsung,exynos4210-uart";
304 reg = <0x13820000 0x100>;
305 interrupts = <0 54 0>;
306 clocks = <&clock 314>, <&clock 153>;
307 clock-names = "uart", "clk_uart_baud0";
308 status = "disabled";
309 };
310
311 serial@13830000 {
312 compatible = "samsung,exynos4210-uart";
313 reg = <0x13830000 0x100>;
314 interrupts = <0 55 0>;
315 clocks = <&clock 315>, <&clock 154>;
316 clock-names = "uart", "clk_uart_baud0";
317 status = "disabled";
318 };
319
320 i2c_0: i2c@13860000 {
321 #address-cells = <1>;
322 #size-cells = <0>;
323 compatible = "samsung,s3c2440-i2c";
324 reg = <0x13860000 0x100>;
325 interrupts = <0 58 0>;
326 clocks = <&clock 317>;
327 clock-names = "i2c";
328 pinctrl-names = "default";
329 pinctrl-0 = <&i2c0_bus>;
330 status = "disabled";
331 };
332
333 i2c_1: i2c@13870000 {
334 #address-cells = <1>;
335 #size-cells = <0>;
336 compatible = "samsung,s3c2440-i2c";
337 reg = <0x13870000 0x100>;
338 interrupts = <0 59 0>;
339 clocks = <&clock 318>;
340 clock-names = "i2c";
341 pinctrl-names = "default";
342 pinctrl-0 = <&i2c1_bus>;
343 status = "disabled";
344 };
345
346 i2c_2: i2c@13880000 {
347 #address-cells = <1>;
348 #size-cells = <0>;
349 compatible = "samsung,s3c2440-i2c";
350 reg = <0x13880000 0x100>;
351 interrupts = <0 60 0>;
352 clocks = <&clock 319>;
353 clock-names = "i2c";
354 status = "disabled";
355 };
356
357 i2c_3: i2c@13890000 {
358 #address-cells = <1>;
359 #size-cells = <0>;
360 compatible = "samsung,s3c2440-i2c";
361 reg = <0x13890000 0x100>;
362 interrupts = <0 61 0>;
363 clocks = <&clock 320>;
364 clock-names = "i2c";
365 status = "disabled";
366 };
367
368 i2c_4: i2c@138A0000 {
369 #address-cells = <1>;
370 #size-cells = <0>;
371 compatible = "samsung,s3c2440-i2c";
372 reg = <0x138A0000 0x100>;
373 interrupts = <0 62 0>;
374 clocks = <&clock 321>;
375 clock-names = "i2c";
376 status = "disabled";
377 };
378
379 i2c_5: i2c@138B0000 {
380 #address-cells = <1>;
381 #size-cells = <0>;
382 compatible = "samsung,s3c2440-i2c";
383 reg = <0x138B0000 0x100>;
384 interrupts = <0 63 0>;
385 clocks = <&clock 322>;
386 clock-names = "i2c";
387 status = "disabled";
388 };
389
390 i2c_6: i2c@138C0000 {
391 #address-cells = <1>;
392 #size-cells = <0>;
393 compatible = "samsung,s3c2440-i2c";
394 reg = <0x138C0000 0x100>;
395 interrupts = <0 64 0>;
396 clocks = <&clock 323>;
397 clock-names = "i2c";
398 status = "disabled";
399 };
400
401 i2c_7: i2c@138D0000 {
402 #address-cells = <1>;
403 #size-cells = <0>;
404 compatible = "samsung,s3c2440-i2c";
405 reg = <0x138D0000 0x100>;
406 interrupts = <0 65 0>;
407 clocks = <&clock 324>;
408 clock-names = "i2c";
409 status = "disabled";
410 };
411
412 spi_0: spi@13920000 {
413 compatible = "samsung,exynos4210-spi";
414 reg = <0x13920000 0x100>;
415 interrupts = <0 66 0>;
416 dmas = <&pdma0 7>, <&pdma0 6>;
417 dma-names = "tx", "rx";
418 #address-cells = <1>;
419 #size-cells = <0>;
420 clocks = <&clock 327>, <&clock 159>;
421 clock-names = "spi", "spi_busclk0";
422 pinctrl-names = "default";
423 pinctrl-0 = <&spi0_bus>;
424 status = "disabled";
425 };
426
427 spi_1: spi@13930000 {
428 compatible = "samsung,exynos4210-spi";
429 reg = <0x13930000 0x100>;
430 interrupts = <0 67 0>;
431 dmas = <&pdma1 7>, <&pdma1 6>;
432 dma-names = "tx", "rx";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 clocks = <&clock 328>, <&clock 160>;
436 clock-names = "spi", "spi_busclk0";
437 pinctrl-names = "default";
438 pinctrl-0 = <&spi1_bus>;
439 status = "disabled";
440 };
441
442 spi_2: spi@13940000 {
443 compatible = "samsung,exynos4210-spi";
444 reg = <0x13940000 0x100>;
445 interrupts = <0 68 0>;
446 dmas = <&pdma0 9>, <&pdma0 8>;
447 dma-names = "tx", "rx";
448 #address-cells = <1>;
449 #size-cells = <0>;
450 clocks = <&clock 329>, <&clock 161>;
451 clock-names = "spi", "spi_busclk0";
452 pinctrl-names = "default";
453 pinctrl-0 = <&spi2_bus>;
454 status = "disabled";
455 };
456
457 pwm@139D0000 {
458 compatible = "samsung,exynos4210-pwm";
459 reg = <0x139D0000 0x1000>;
460 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
461 clocks = <&clock 336>;
462 clock-names = "timers";
463 #pwm-cells = <2>;
464 status = "disabled";
465 };
466
467 amba {
468 #address-cells = <1>;
469 #size-cells = <1>;
470 compatible = "arm,amba-bus";
471 interrupt-parent = <&gic>;
472 ranges;
473
474 pdma0: pdma@12680000 {
475 compatible = "arm,pl330", "arm,primecell";
476 reg = <0x12680000 0x1000>;
477 interrupts = <0 35 0>;
478 clocks = <&clock 292>;
479 clock-names = "apb_pclk";
480 #dma-cells = <1>;
481 #dma-channels = <8>;
482 #dma-requests = <32>;
483 };
484
485 pdma1: pdma@12690000 {
486 compatible = "arm,pl330", "arm,primecell";
487 reg = <0x12690000 0x1000>;
488 interrupts = <0 36 0>;
489 clocks = <&clock 293>;
490 clock-names = "apb_pclk";
491 #dma-cells = <1>;
492 #dma-channels = <8>;
493 #dma-requests = <32>;
494 };
495
496 mdma1: mdma@12850000 {
497 compatible = "arm,pl330", "arm,primecell";
498 reg = <0x12850000 0x1000>;
499 interrupts = <0 34 0>;
500 clocks = <&clock 279>;
501 clock-names = "apb_pclk";
502 #dma-cells = <1>;
503 #dma-channels = <8>;
504 #dma-requests = <1>;
505 };
506 };
507
508 fimd: fimd@11c00000 {
509 compatible = "samsung,exynos4210-fimd";
510 interrupt-parent = <&combiner>;
511 reg = <0x11c00000 0x20000>;
512 interrupt-names = "fifo", "vsync", "lcd_sys";
513 interrupts = <11 0>, <11 1>, <11 2>;
514 clocks = <&clock 140>, <&clock 283>;
515 clock-names = "sclk_fimd", "fimd";
516 samsung,power-domain = <&pd_lcd0>;
517 status = "disabled";
518 };
519 };