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Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / arch / arm / boot / dts / rk3228-evb.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include "rk322x.dtsi"
6
7 / {
8 model = "Rockchip RK3228 Evaluation board";
9 compatible = "rockchip,rk3228-evb", "rockchip,rk3228";
10
11 memory@60000000 {
12 device_type = "memory";
13 reg = <0x60000000 0x40000000>;
14 };
15
16 vcc_phy: vcc-phy-regulator {
17 compatible = "regulator-fixed";
18 enable-active-high;
19 regulator-name = "vcc_phy";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
22 regulator-always-on;
23 regulator-boot-on;
24 };
25 };
26
27 &emmc {
28 cap-mmc-highspeed;
29 mmc-ddr-1_8v;
30 disable-wp;
31 non-removable;
32 status = "okay";
33 };
34
35 &gmac {
36 assigned-clocks = <&cru SCLK_MAC_SRC>;
37 assigned-clock-rates = <50000000>;
38 clock_in_out = "output";
39 phy-supply = <&vcc_phy>;
40 phy-mode = "rmii";
41 phy-handle = <&phy>;
42 status = "okay";
43
44 mdio {
45 compatible = "snps,dwmac-mdio";
46 #address-cells = <1>;
47 #size-cells = <0>;
48
49 phy: ethernet-phy@0 {
50 compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
51 reg = <0>;
52 clocks = <&cru SCLK_MAC_PHY>;
53 resets = <&cru SRST_MACPHY>;
54 phy-is-integrated;
55 };
56 };
57 };
58
59 &tsadc {
60 status = "okay";
61
62 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
63 rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
64 };
65
66 &uart2 {
67 status = "okay";
68 };