]>
git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/cpu/arm1176/tnetv107x/mux.c
ccc53141fdf2d20f44b6d8fb2a9c6a9a9f2d482a
2 * TNETV107X: Pinmux configuration
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <asm/arch/clock.h>
25 #include <asm/arch/mux.h>
27 #define MUX_MODE_1 0x00
28 #define MUX_MODE_2 0x04
29 #define MUX_MODE_3 0x0c
30 #define MUX_MODE_4 0x1c
34 static const struct pin_config pin_table
[] = {
36 TNETV107X_MUX_CFG(0, 0, MUX_MODE_1
),
37 TNETV107X_MUX_CFG(0, 0, MUX_MODE_2
),
38 TNETV107X_MUX_CFG(0, 5, MUX_MODE_1
),
39 TNETV107X_MUX_CFG(0, 5, MUX_MODE_2
),
40 TNETV107X_MUX_CFG(0, 10, MUX_MODE_1
),
41 TNETV107X_MUX_CFG(0, 10, MUX_MODE_2
),
42 TNETV107X_MUX_CFG(0, 15, MUX_MODE_1
),
43 TNETV107X_MUX_CFG(0, 15, MUX_MODE_2
),
44 TNETV107X_MUX_CFG(0, 20, MUX_MODE_1
),
45 TNETV107X_MUX_CFG(0, 20, MUX_MODE_2
),
46 TNETV107X_MUX_CFG(0, 25, MUX_MODE_1
),
47 TNETV107X_MUX_CFG(0, 25, MUX_MODE_2
),
48 TNETV107X_MUX_CFG(1, 0, MUX_MODE_1
),
49 TNETV107X_MUX_CFG(1, 0, MUX_MODE_2
),
50 TNETV107X_MUX_CFG(1, 5, MUX_MODE_1
),
51 TNETV107X_MUX_CFG(1, 5, MUX_MODE_2
),
52 TNETV107X_MUX_CFG(1, 10, MUX_MODE_1
),
53 TNETV107X_MUX_CFG(1, 10, MUX_MODE_2
),
54 TNETV107X_MUX_CFG(1, 15, MUX_MODE_1
),
55 TNETV107X_MUX_CFG(1, 15, MUX_MODE_2
),
56 TNETV107X_MUX_CFG(1, 20, MUX_MODE_1
),
57 TNETV107X_MUX_CFG(1, 20, MUX_MODE_2
),
58 TNETV107X_MUX_CFG(1, 25, MUX_MODE_1
),
59 TNETV107X_MUX_CFG(1, 25, MUX_MODE_2
),
60 TNETV107X_MUX_CFG(2, 0, MUX_MODE_1
),
61 TNETV107X_MUX_CFG(2, 0, MUX_MODE_2
),
62 TNETV107X_MUX_CFG(2, 5, MUX_MODE_1
),
63 TNETV107X_MUX_CFG(2, 5, MUX_MODE_2
),
64 TNETV107X_MUX_CFG(2, 10, MUX_MODE_1
),
65 TNETV107X_MUX_CFG(2, 10, MUX_MODE_2
),
66 TNETV107X_MUX_CFG(2, 15, MUX_MODE_1
),
67 TNETV107X_MUX_CFG(2, 15, MUX_MODE_2
),
68 TNETV107X_MUX_CFG(2, 20, MUX_MODE_1
),
69 TNETV107X_MUX_CFG(2, 20, MUX_MODE_2
),
70 TNETV107X_MUX_CFG(2, 25, MUX_MODE_1
),
71 TNETV107X_MUX_CFG(2, 25, MUX_MODE_2
),
72 TNETV107X_MUX_CFG(3, 0, MUX_MODE_1
),
73 TNETV107X_MUX_CFG(3, 0, MUX_MODE_2
),
74 TNETV107X_MUX_CFG(3, 0, MUX_MODE_4
),
75 TNETV107X_MUX_CFG(3, 5, MUX_MODE_1
),
76 TNETV107X_MUX_CFG(3, 5, MUX_MODE_2
),
77 TNETV107X_MUX_CFG(3, 5, MUX_MODE_4
),
78 TNETV107X_MUX_CFG(3, 10, MUX_MODE_1
),
79 TNETV107X_MUX_CFG(3, 10, MUX_MODE_2
),
80 TNETV107X_MUX_CFG(3, 10, MUX_MODE_4
),
81 TNETV107X_MUX_CFG(3, 15, MUX_MODE_1
),
82 TNETV107X_MUX_CFG(3, 15, MUX_MODE_2
),
83 TNETV107X_MUX_CFG(3, 15, MUX_MODE_4
),
84 TNETV107X_MUX_CFG(3, 20, MUX_MODE_1
),
85 TNETV107X_MUX_CFG(3, 20, MUX_MODE_2
),
86 TNETV107X_MUX_CFG(3, 20, MUX_MODE_4
),
87 TNETV107X_MUX_CFG(3, 25, MUX_MODE_1
),
88 TNETV107X_MUX_CFG(3, 25, MUX_MODE_2
),
89 TNETV107X_MUX_CFG(3, 25, MUX_MODE_4
),
90 TNETV107X_MUX_CFG(4, 0, MUX_MODE_1
),
91 TNETV107X_MUX_CFG(4, 0, MUX_MODE_2
),
92 TNETV107X_MUX_CFG(4, 0, MUX_MODE_4
),
93 TNETV107X_MUX_CFG(4, 5, MUX_MODE_1
),
94 TNETV107X_MUX_CFG(4, 10, MUX_MODE_1
),
95 TNETV107X_MUX_CFG(4, 15, MUX_MODE_1
),
96 TNETV107X_MUX_CFG(4, 15, MUX_MODE_4
),
97 TNETV107X_MUX_CFG(4, 20, MUX_MODE_1
),
98 TNETV107X_MUX_CFG(4, 20, MUX_MODE_3
),
99 TNETV107X_MUX_CFG(4, 25, MUX_MODE_1
),
100 TNETV107X_MUX_CFG(4, 25, MUX_MODE_4
),
101 TNETV107X_MUX_CFG(5, 0, MUX_MODE_1
),
102 TNETV107X_MUX_CFG(5, 0, MUX_MODE_4
),
103 TNETV107X_MUX_CFG(5, 5, MUX_MODE_1
),
104 TNETV107X_MUX_CFG(5, 5, MUX_MODE_4
),
105 TNETV107X_MUX_CFG(5, 10, MUX_MODE_1
),
106 TNETV107X_MUX_CFG(5, 10, MUX_MODE_4
),
107 TNETV107X_MUX_CFG(5, 15, MUX_MODE_1
),
108 TNETV107X_MUX_CFG(5, 15, MUX_MODE_4
),
109 TNETV107X_MUX_CFG(5, 20, MUX_MODE_1
),
110 TNETV107X_MUX_CFG(5, 20, MUX_MODE_4
),
111 TNETV107X_MUX_CFG(5, 25, MUX_MODE_1
),
112 TNETV107X_MUX_CFG(5, 25, MUX_MODE_4
),
113 TNETV107X_MUX_CFG(6, 0, MUX_MODE_1
),
114 TNETV107X_MUX_CFG(6, 0, MUX_MODE_4
),
115 TNETV107X_MUX_CFG(6, 5, MUX_MODE_1
),
116 TNETV107X_MUX_CFG(6, 5, MUX_MODE_4
),
117 TNETV107X_MUX_CFG(6, 10, MUX_MODE_1
),
118 TNETV107X_MUX_CFG(6, 10, MUX_MODE_4
),
119 TNETV107X_MUX_CFG(6, 15, MUX_MODE_1
),
120 TNETV107X_MUX_CFG(6, 15, MUX_MODE_4
),
121 TNETV107X_MUX_CFG(6, 20, MUX_MODE_1
),
122 TNETV107X_MUX_CFG(6, 20, MUX_MODE_4
),
123 TNETV107X_MUX_CFG(6, 25, MUX_MODE_1
),
124 TNETV107X_MUX_CFG(6, 25, MUX_MODE_4
),
125 TNETV107X_MUX_CFG(7, 0, MUX_MODE_1
),
126 TNETV107X_MUX_CFG(7, 0, MUX_MODE_4
),
127 TNETV107X_MUX_CFG(7, 5, MUX_MODE_1
),
128 TNETV107X_MUX_CFG(7, 5, MUX_MODE_4
),
129 TNETV107X_MUX_CFG(7, 10, MUX_MODE_1
),
130 TNETV107X_MUX_CFG(7, 10, MUX_MODE_4
),
131 TNETV107X_MUX_CFG(7, 15, MUX_MODE_1
),
132 TNETV107X_MUX_CFG(7, 15, MUX_MODE_2
),
133 TNETV107X_MUX_CFG(7, 20, MUX_MODE_1
),
134 TNETV107X_MUX_CFG(7, 20, MUX_MODE_2
),
135 TNETV107X_MUX_CFG(7, 25, MUX_MODE_1
),
136 TNETV107X_MUX_CFG(7, 25, MUX_MODE_2
),
137 TNETV107X_MUX_CFG(8, 0, MUX_MODE_1
),
138 TNETV107X_MUX_CFG(8, 0, MUX_MODE_2
),
139 TNETV107X_MUX_CFG(8, 5, MUX_MODE_1
),
140 TNETV107X_MUX_CFG(8, 5, MUX_MODE_2
),
141 TNETV107X_MUX_CFG(8, 5, MUX_MODE_4
),
142 TNETV107X_MUX_CFG(8, 10, MUX_MODE_1
),
143 TNETV107X_MUX_CFG(8, 10, MUX_MODE_2
),
144 TNETV107X_MUX_CFG(9, 0, MUX_MODE_1
),
145 TNETV107X_MUX_CFG(9, 0, MUX_MODE_2
),
146 TNETV107X_MUX_CFG(9, 0, MUX_MODE_4
),
147 TNETV107X_MUX_CFG(9, 5, MUX_MODE_1
),
148 TNETV107X_MUX_CFG(9, 5, MUX_MODE_2
),
149 TNETV107X_MUX_CFG(9, 5, MUX_MODE_4
),
150 TNETV107X_MUX_CFG(9, 10, MUX_MODE_1
),
151 TNETV107X_MUX_CFG(9, 10, MUX_MODE_2
),
152 TNETV107X_MUX_CFG(9, 10, MUX_MODE_4
),
153 TNETV107X_MUX_CFG(9, 15, MUX_MODE_1
),
154 TNETV107X_MUX_CFG(9, 15, MUX_MODE_2
),
155 TNETV107X_MUX_CFG(9, 15, MUX_MODE_4
),
156 TNETV107X_MUX_CFG(9, 20, MUX_MODE_1
),
157 TNETV107X_MUX_CFG(9, 20, MUX_MODE_2
),
158 TNETV107X_MUX_CFG(9, 20, MUX_MODE_4
),
159 TNETV107X_MUX_CFG(10, 0, MUX_MODE_1
),
160 TNETV107X_MUX_CFG(10, 0, MUX_MODE_2
),
161 TNETV107X_MUX_CFG(10, 5, MUX_MODE_1
),
162 TNETV107X_MUX_CFG(10, 5, MUX_MODE_2
),
163 TNETV107X_MUX_CFG(10, 10, MUX_MODE_1
),
164 TNETV107X_MUX_CFG(10, 10, MUX_MODE_2
),
165 TNETV107X_MUX_CFG(10, 15, MUX_MODE_1
),
166 TNETV107X_MUX_CFG(10, 15, MUX_MODE_2
),
167 TNETV107X_MUX_CFG(10, 20, MUX_MODE_1
),
168 TNETV107X_MUX_CFG(10, 20, MUX_MODE_2
),
169 TNETV107X_MUX_CFG(10, 25, MUX_MODE_1
),
170 TNETV107X_MUX_CFG(10, 25, MUX_MODE_2
),
171 TNETV107X_MUX_CFG(11, 0, MUX_MODE_1
),
172 TNETV107X_MUX_CFG(11, 5, MUX_MODE_1
),
173 TNETV107X_MUX_CFG(12, 0, MUX_MODE_1
),
174 TNETV107X_MUX_CFG(12, 5, MUX_MODE_1
),
175 TNETV107X_MUX_CFG(12, 10, MUX_MODE_1
),
176 TNETV107X_MUX_CFG(12, 15, MUX_MODE_1
),
177 TNETV107X_MUX_CFG(12, 20, MUX_MODE_1
),
178 TNETV107X_MUX_CFG(12, 25, MUX_MODE_1
),
179 TNETV107X_MUX_CFG(13, 0, MUX_MODE_1
),
180 TNETV107X_MUX_CFG(13, 5, MUX_MODE_1
),
181 TNETV107X_MUX_CFG(13, 10, MUX_MODE_1
),
182 TNETV107X_MUX_CFG(13, 15, MUX_MODE_1
),
183 TNETV107X_MUX_CFG(14, 0, MUX_MODE_1
),
184 TNETV107X_MUX_CFG(14, 5, MUX_MODE_1
),
185 TNETV107X_MUX_CFG(14, 10, MUX_MODE_1
),
186 TNETV107X_MUX_CFG(14, 15, MUX_MODE_1
),
187 TNETV107X_MUX_CFG(14, 20, MUX_MODE_1
),
188 TNETV107X_MUX_CFG(14, 25, MUX_MODE_1
),
189 TNETV107X_MUX_CFG(15, 0, MUX_MODE_1
),
190 TNETV107X_MUX_CFG(15, 0, MUX_MODE_2
),
191 TNETV107X_MUX_CFG(15, 5, MUX_MODE_1
),
192 TNETV107X_MUX_CFG(15, 5, MUX_MODE_2
),
193 TNETV107X_MUX_CFG(15, 10, MUX_MODE_1
),
194 TNETV107X_MUX_CFG(15, 15, MUX_MODE_1
),
195 TNETV107X_MUX_CFG(15, 20, MUX_MODE_1
),
196 TNETV107X_MUX_CFG(15, 25, MUX_MODE_1
),
197 TNETV107X_MUX_CFG(16, 0, MUX_MODE_1
),
198 TNETV107X_MUX_CFG(16, 5, MUX_MODE_1
),
199 TNETV107X_MUX_CFG(16, 10, MUX_MODE_1
),
200 TNETV107X_MUX_CFG(16, 10, MUX_MODE_2
),
201 TNETV107X_MUX_CFG(16, 10, MUX_MODE_3
),
202 TNETV107X_MUX_CFG(16, 15, MUX_MODE_1
),
203 TNETV107X_MUX_CFG(16, 15, MUX_MODE_2
),
204 TNETV107X_MUX_CFG(17, 0, MUX_MODE_1
),
205 TNETV107X_MUX_CFG(17, 0, MUX_MODE_2
),
206 TNETV107X_MUX_CFG(17, 0, MUX_MODE_3
),
207 TNETV107X_MUX_CFG(17, 5, MUX_MODE_1
),
208 TNETV107X_MUX_CFG(17, 5, MUX_MODE_2
),
209 TNETV107X_MUX_CFG(17, 5, MUX_MODE_3
),
210 TNETV107X_MUX_CFG(17, 10, MUX_MODE_1
),
211 TNETV107X_MUX_CFG(17, 10, MUX_MODE_2
),
212 TNETV107X_MUX_CFG(17, 10, MUX_MODE_3
),
213 TNETV107X_MUX_CFG(17, 15, MUX_MODE_1
),
214 TNETV107X_MUX_CFG(17, 15, MUX_MODE_2
),
215 TNETV107X_MUX_CFG(17, 15, MUX_MODE_3
),
216 TNETV107X_MUX_CFG(18, 0, MUX_MODE_1
),
217 TNETV107X_MUX_CFG(18, 0, MUX_MODE_2
),
218 TNETV107X_MUX_CFG(18, 0, MUX_MODE_3
),
219 TNETV107X_MUX_CFG(18, 5, MUX_MODE_1
),
220 TNETV107X_MUX_CFG(18, 5, MUX_MODE_2
),
221 TNETV107X_MUX_CFG(18, 5, MUX_MODE_3
),
222 TNETV107X_MUX_CFG(18, 10, MUX_MODE_1
),
223 TNETV107X_MUX_CFG(18, 10, MUX_MODE_2
),
224 TNETV107X_MUX_CFG(18, 10, MUX_MODE_3
),
225 TNETV107X_MUX_CFG(18, 15, MUX_MODE_1
),
226 TNETV107X_MUX_CFG(18, 15, MUX_MODE_2
),
227 TNETV107X_MUX_CFG(18, 15, MUX_MODE_3
),
228 TNETV107X_MUX_CFG(19, 0, MUX_MODE_1
),
229 TNETV107X_MUX_CFG(19, 5, MUX_MODE_1
),
230 TNETV107X_MUX_CFG(19, 10, MUX_MODE_1
),
231 TNETV107X_MUX_CFG(19, 15, MUX_MODE_1
),
232 TNETV107X_MUX_CFG(19, 20, MUX_MODE_1
),
233 TNETV107X_MUX_CFG(19, 25, MUX_MODE_1
),
234 TNETV107X_MUX_CFG(20, 0, MUX_MODE_1
),
235 TNETV107X_MUX_CFG(20, 5, MUX_MODE_1
),
236 TNETV107X_MUX_CFG(20, 10, MUX_MODE_1
),
237 TNETV107X_MUX_CFG(20, 15, MUX_MODE_1
),
238 TNETV107X_MUX_CFG(20, 15, MUX_MODE_3
),
239 TNETV107X_MUX_CFG(20, 20, MUX_MODE_1
),
240 TNETV107X_MUX_CFG(20, 25, MUX_MODE_1
),
241 TNETV107X_MUX_CFG(21, 0, MUX_MODE_1
),
242 TNETV107X_MUX_CFG(21, 5, MUX_MODE_1
),
243 TNETV107X_MUX_CFG(21, 10, MUX_MODE_1
),
244 TNETV107X_MUX_CFG(21, 15, MUX_MODE_1
),
245 TNETV107X_MUX_CFG(21, 20, MUX_MODE_1
),
246 TNETV107X_MUX_CFG(21, 25, MUX_MODE_1
),
247 TNETV107X_MUX_CFG(22, 0, MUX_MODE_1
),
248 TNETV107X_MUX_CFG(22, 5, MUX_MODE_1
),
249 TNETV107X_MUX_CFG(22, 5, MUX_MODE_3
),
250 TNETV107X_MUX_CFG(22, 10, MUX_MODE_1
),
251 TNETV107X_MUX_CFG(22, 10, MUX_MODE_3
),
252 TNETV107X_MUX_CFG(22, 15, MUX_MODE_1
),
253 TNETV107X_MUX_CFG(22, 15, MUX_MODE_2
),
254 TNETV107X_MUX_CFG(22, 15, MUX_MODE_3
),
255 TNETV107X_MUX_CFG(22, 20, MUX_MODE_1
),
256 TNETV107X_MUX_CFG(22, 20, MUX_MODE_3
),
257 TNETV107X_MUX_CFG(22, 25, MUX_MODE_1
),
258 TNETV107X_MUX_CFG(22, 25, MUX_MODE_3
),
259 TNETV107X_MUX_CFG(23, 0, MUX_MODE_1
),
260 TNETV107X_MUX_CFG(23, 0, MUX_MODE_3
),
261 TNETV107X_MUX_CFG(23, 5, MUX_MODE_1
),
262 TNETV107X_MUX_CFG(23, 5, MUX_MODE_3
),
263 TNETV107X_MUX_CFG(23, 10, MUX_MODE_1
),
264 TNETV107X_MUX_CFG(23, 10, MUX_MODE_3
),
265 TNETV107X_MUX_CFG(24, 0, MUX_MODE_1
),
266 TNETV107X_MUX_CFG(24, 0, MUX_MODE_2
),
267 TNETV107X_MUX_CFG(24, 5, MUX_MODE_1
),
268 TNETV107X_MUX_CFG(24, 5, MUX_MODE_2
),
269 TNETV107X_MUX_CFG(24, 10, MUX_MODE_1
),
270 TNETV107X_MUX_CFG(24, 10, MUX_MODE_2
),
271 TNETV107X_MUX_CFG(24, 10, MUX_MODE_3
),
272 TNETV107X_MUX_CFG(24, 15, MUX_MODE_1
),
273 TNETV107X_MUX_CFG(24, 15, MUX_MODE_2
),
274 TNETV107X_MUX_CFG(24, 15, MUX_MODE_3
),
275 TNETV107X_MUX_CFG(24, 20, MUX_MODE_1
),
276 TNETV107X_MUX_CFG(24, 20, MUX_MODE_2
),
277 TNETV107X_MUX_CFG(24, 25, MUX_MODE_1
),
278 TNETV107X_MUX_CFG(24, 25, MUX_MODE_2
),
279 TNETV107X_MUX_CFG(25, 0, MUX_MODE_1
),
280 TNETV107X_MUX_CFG(25, 0, MUX_MODE_2
),
281 TNETV107X_MUX_CFG(25, 0, MUX_MODE_3
),
282 TNETV107X_MUX_CFG(25, 5, MUX_MODE_1
),
283 TNETV107X_MUX_CFG(25, 5, MUX_MODE_2
),
284 TNETV107X_MUX_CFG(25, 5, MUX_MODE_3
),
285 TNETV107X_MUX_CFG(25, 10, MUX_MODE_1
),
286 TNETV107X_MUX_CFG(25, 10, MUX_MODE_2
),
287 TNETV107X_MUX_CFG(25, 10, MUX_MODE_3
),
288 TNETV107X_MUX_CFG(25, 15, MUX_MODE_1
),
289 TNETV107X_MUX_CFG(25, 15, MUX_MODE_2
),
290 TNETV107X_MUX_CFG(25, 15, MUX_MODE_3
),
291 TNETV107X_MUX_CFG(25, 15, MUX_MODE_4
),
292 TNETV107X_MUX_CFG(26, 0, MUX_MODE_1
),
293 TNETV107X_MUX_CFG(26, 5, MUX_MODE_1
),
294 TNETV107X_MUX_CFG(26, 10, MUX_MODE_1
),
295 TNETV107X_MUX_CFG(26, 10, MUX_MODE_2
),
296 TNETV107X_MUX_CFG(26, 15, MUX_MODE_1
),
297 TNETV107X_MUX_CFG(26, 15, MUX_MODE_2
),
298 TNETV107X_MUX_CFG(26, 20, MUX_MODE_1
),
299 TNETV107X_MUX_CFG(26, 20, MUX_MODE_2
),
300 TNETV107X_MUX_CFG(26, 25, MUX_MODE_1
),
301 TNETV107X_MUX_CFG(26, 25, MUX_MODE_2
),
304 const int pin_table_size
= sizeof(pin_table
) / sizeof(pin_table
[0]);
306 int mux_select_pin(short index
)
308 const struct pin_config
*cfg
;
309 unsigned long mask
, mode
, reg
;
311 if (index
>= pin_table_size
)
314 cfg
= &pin_table
[index
];
316 mask
= 0x1f << cfg
->mask_offset
;
317 mode
= cfg
->mode
<< cfg
->mask_offset
;
319 reg
= __raw_readl(TNETV107X_PINMUX(cfg
->reg_index
));
320 reg
= (reg
& ~mask
) | mode
;
321 __raw_writel(reg
, TNETV107X_PINMUX(cfg
->reg_index
));
326 int mux_select_pins(const short *pins
)
330 for (i
= 0; pins
[i
] >= 0; i
++)
331 ret
&= mux_select_pin(pins
[i
]);
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