arch/arm/cpu/arm925t/start.S

   1 /*
   2  *  armboot - Startup Code for ARM925 CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1510 from ARM920 code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij  <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <version.h>
  36
  37 #if defined(CONFIG_OMAP1510)
  38 #include <./configs/omap1510.h>
  39 #endif
  40
  41 /*
  42  *************************************************************************
  43  *
  44  * Jump vector table as in table 3.1 in [1]
  45  *
  46  *************************************************************************
  47  */
  48
  49
  50 .globl _start
  51 _start: b       reset
  52         ldr     pc, _undefined_instruction
  53         ldr     pc, _software_interrupt
  54         ldr     pc, _prefetch_abort
  55         ldr     pc, _data_abort
  56         ldr     pc, _not_used
  57         ldr     pc, _irq
  58         ldr     pc, _fiq
  59
  60 _undefined_instruction: .word undefined_instruction
  61 _software_interrupt:    .word software_interrupt
  62 _prefetch_abort:        .word prefetch_abort
  63 _data_abort:            .word data_abort
  64 _not_used:              .word not_used
  65 _irq:                   .word irq
  66 _fiq:                   .word fiq
  67
  68         .balignl 16,0xdeadbeef
  69
  70
  71 /*
  72  *************************************************************************
  73  *
  74  * Startup Code (reset vector)
  75  *
  76  * do important init only if we don't start from memory!
  77  * setup Memory and board specific bits prior to relocation.
  78  * relocate armboot to ram
  79  * setup stack
  80  *
  81  *************************************************************************
  82  */
  83
  84 .globl _TEXT_BASE
  85 _TEXT_BASE:
  86         .word   CONFIG_SYS_TEXT_BASE
  87
  88 /*
  89  * These are defined in the board-specific linker script.
  90  * Subtracting _start from them lets the linker put their
  91  * relative position in the executable instead of leaving
  92  * them null.
  93  */
  94 .globl _bss_start_ofs
  95 _bss_start_ofs:
  96         .word __bss_start - _start
  97
  98 .globl _bss_end_ofs
  99 _bss_end_ofs:
 100         .word _end - _start
 101
 102 #ifdef CONFIG_USE_IRQ
 103 /* IRQ stack memory (calculated at run-time) */
 104 .globl IRQ_STACK_START
 105 IRQ_STACK_START:
 106         .word   0x0badc0de
 107
 108 /* IRQ stack memory (calculated at run-time) */
 109 .globl FIQ_STACK_START
 110 FIQ_STACK_START:
 111         .word 0x0badc0de
 112 #endif
 113
 114 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 115 .globl IRQ_STACK_START_IN
 116 IRQ_STACK_START_IN:
 117         .word   0x0badc0de
 118
 119 /*
 120  * the actual reset code
 121  */
 122
 123 reset:
 124         /*
 125          * set the cpu to SVC32 mode
 126          */
 127         mrs     r0,cpsr
 128         bic     r0,r0,#0x1f
 129         orr     r0,r0,#0xd3
 130         msr     cpsr,r0
 131
 132         /*
 133          * Set up 925T mode
 134          */
 135         mov r1, #0x81               /* Set ARM925T configuration. */
 136         mcr p15, 0, r1, c15, c1, 0  /* Write ARM925T configuration register. */
 137
 138         /*
 139          * turn off the watchdog, unlock/diable sequence
 140          */
 141         mov  r1, #0xF5
 142         ldr  r0, =WDTIM_MODE
 143         strh r1, [r0]
 144         mov  r1, #0xA0
 145         strh r1, [r0]
 146
 147         /*
 148          * mask all IRQs by setting all bits in the INTMR - default
 149          */
 150         mov r1, #0xffffffff
 151         ldr r0, =REG_IHL1_MIR
 152         str r1, [r0]
 153         ldr r0, =REG_IHL2_MIR
 154         str r1, [r0]
 155
 156         /*
 157          * wait for dpll to lock
 158          */
 159         ldr  r0, =CK_DPLL1
 160         mov  r1, #0x10
 161         strh r1, [r0]
 162 poll1:
 163         ldrh r1, [r0]
 164         ands r1, r1, #0x01
 165         beq poll1
 166
 167         /*
 168          * we do sys-critical inits only at reboot,
 169          * not when booting from ram!
 170          */
 171 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 172         bl  cpu_init_crit
 173 #endif
 174
 175 /* Set stackpointer in internal RAM to call board_init_f */
 176 call_board_init_f:
 177         ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
 178         bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
 179         ldr     r0,=0x00000000
 180         bl      board_init_f
 181
 182 /*------------------------------------------------------------------------------*/
 183
 184 /*
 185  * void relocate_code (addr_sp, gd, addr_moni)
 186  *
 187  * This "function" does not return, instead it continues in RAM
 188  * after relocating the monitor code.
 189  *
 190  */
 191         .globl  relocate_code
 192 relocate_code:
 193         mov     r4, r0  /* save addr_sp */
 194         mov     r5, r1  /* save addr of gd */
 195         mov     r6, r2  /* save addr of destination */
 196
 197         /* Set up the stack                                                 */
 198 stack_setup:
 199         mov     sp, r4
 200
 201         adr     r0, _start
 202         cmp     r0, r6
 203         beq     clear_bss               /* skip relocation */
 204         mov     r1, r6                  /* r1 <- scratch for copy_loop */
 205         ldr     r3, _bss_start_ofs
 206         add     r2, r0, r3              /* r2 <- source end address         */
 207
 208 copy_loop:
 209         ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
 210         stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
 211         cmp     r0, r2                  /* until source end address [r2]    */
 212         blo     copy_loop
 213
 214 #ifndef CONFIG_PRELOADER
 215         /*
 216          * fix .rel.dyn relocations
 217          */
 218         ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 219         sub     r9, r6, r0              /* r9 <- relocation offset */
 220         ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 221         add     r10, r10, r0            /* r10 <- sym table in FLASH */
 222         ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 223         add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 224         ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 225         add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 226 fixloop:
 227         ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 228         add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 229         ldr     r1, [r2, #4]
 230         and     r7, r1, #0xff
 231         cmp     r7, #23                 /* relative fixup? */
 232         beq     fixrel
 233         cmp     r7, #2                  /* absolute fixup? */
 234         beq     fixabs
 235         /* ignore unknown type of fixup */
 236         b       fixnext
 237 fixabs:
 238         /* absolute fix: set location to (offset) symbol value */
 239         mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 240         add     r1, r10, r1             /* r1 <- address of symbol in table */
 241         ldr     r1, [r1, #4]            /* r1 <- symbol value */
 242         add     r1, r1, r9              /* r1 <- relocated sym addr */
 243         b       fixnext
 244 fixrel:
 245         /* relative fix: increase location by offset */
 246         ldr     r1, [r0]
 247         add     r1, r1, r9
 248 fixnext:
 249         str     r1, [r0]
 250         add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 251         cmp     r2, r3
 252         blo     fixloop
 253 #endif
 254
 255 clear_bss:
 256 #ifndef CONFIG_PRELOADER
 257         ldr     r0, _bss_start_ofs
 258         ldr     r1, _bss_end_ofs
 259         mov     r4, r6                  /* reloc addr */
 260         add     r0, r0, r4
 261         add     r1, r1, r4
 262         mov     r2, #0x00000000         /* clear                            */
 263
 264 clbss_l:str     r2, [r0]                /* clear loop...                    */
 265         add     r0, r0, #4
 266         cmp     r0, r1
 267         bne     clbss_l
 268
 269         bl coloured_LED_init
 270         bl red_LED_on
 271 #endif
 272
 273 /*
 274  * We are done. Do not return, instead branch to second part of board
 275  * initialization, now running from RAM.
 276  */
 277 #ifdef CONFIG_NAND_SPL
 278         ldr     r0, _nand_boot_ofs
 279         mov     pc, r0
 280
 281 _nand_boot_ofs:
 282         .word nand_boot
 283 #else
 284         ldr     r0, _board_init_r_ofs
 285         adr     r1, _start
 286         add     lr, r0, r1
 287         add     lr, lr, r9
 288         /* setup parameters for board_init_r */
 289         mov     r0, r5          /* gd_t */
 290         mov     r1, r6          /* dest_addr */
 291         /* jump to it ... */
 292         mov     pc, lr
 293
 294 _board_init_r_ofs:
 295         .word board_init_r - _start
 296 #endif
 297
 298 _rel_dyn_start_ofs:
 299         .word __rel_dyn_start - _start
 300 _rel_dyn_end_ofs:
 301         .word __rel_dyn_end - _start
 302 _dynsym_start_ofs:
 303         .word __dynsym_start - _start
 304
 305 /*
 306  *************************************************************************
 307  *
 308  * CPU_init_critical registers
 309  *
 310  * setup important registers
 311  * setup memory timing
 312  *
 313  *************************************************************************
 314  */
 315
 316
 317 cpu_init_crit:
 318         /*
 319          * flush v4 I/D caches
 320          */
 321         mov     r0, #0
 322         mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 323         mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 324
 325         /*
 326          * disable MMU stuff and caches
 327          */
 328         mrc     p15, 0, r0, c1, c0, 0
 329         bic     r0, r0, #0x00002300     @ clear bits 13, 9:8 (--V- --RS)
 330         bic     r0, r0, #0x00000087     @ clear bits 7, 2:0 (B--- -CAM)
 331         orr     r0, r0, #0x00000002     @ set bit 2 (A) Align
 332         orr     r0, r0, #0x00001000     @ set bit 12 (I) I-Cache
 333         mcr     p15, 0, r0, c1, c0, 0
 334
 335         /*
 336          * Go setup Memory and board specific bits prior to relocation.
 337          */
 338         mov     ip, lr          /* perserve link reg across call */
 339         bl      lowlevel_init   /* go setup pll,mux,memory */
 340         mov     lr, ip          /* restore link */
 341         mov     pc, lr          /* back to my caller */
 342 /*
 343  *************************************************************************
 344  *
 345  * Interrupt handling
 346  *
 347  *************************************************************************
 348  */
 349
 350 @
 351 @ IRQ stack frame.
 352 @
 353 #define S_FRAME_SIZE    72
 354
 355 #define S_OLD_R0        68
 356 #define S_PSR           64
 357 #define S_PC            60
 358 #define S_LR            56
 359 #define S_SP            52
 360
 361 #define S_IP            48
 362 #define S_FP            44
 363 #define S_R10           40
 364 #define S_R9            36
 365 #define S_R8            32
 366 #define S_R7            28
 367 #define S_R6            24
 368 #define S_R5            20
 369 #define S_R4            16
 370 #define S_R3            12
 371 #define S_R2            8
 372 #define S_R1            4
 373 #define S_R0            0
 374
 375 #define MODE_SVC 0x13
 376 #define I_BIT    0x80
 377
 378 /*
 379  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 380  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 381  */
 382
 383         .macro  bad_save_user_regs
 384         sub     sp, sp, #S_FRAME_SIZE           @ carve out a frame on current user stack
 385         stmia   sp, {r0 - r12}                  @ Save user registers (now in svc mode) r0-r12
 386
 387         ldr     r2, IRQ_STACK_START_IN
 388         ldmia   r2, {r2 - r3}                   @ get values for "aborted" pc and cpsr (into parm regs)
 389         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 390
 391         add     r5, sp, #S_SP
 392         mov     r1, lr
 393         stmia   r5, {r0 - r3}                   @ save sp_SVC, lr_SVC, pc, cpsr
 394         mov     r0, sp                          @ save current stack into r0 (param register)
 395         .endm
 396
 397         .macro  irq_save_user_regs
 398         sub     sp, sp, #S_FRAME_SIZE
 399         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 400         add     r8, sp, #S_PC                   @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 401         stmdb   r8, {sp, lr}^                   @ Calling SP, LR
 402         str     lr, [r8, #0]                    @ Save calling PC
 403         mrs     r6, spsr
 404         str     r6, [r8, #4]                    @ Save CPSR
 405         str     r0, [r8, #8]                    @ Save OLD_R0
 406         mov     r0, sp
 407         .endm
 408
 409         .macro  irq_restore_user_regs
 410         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 411         mov     r0, r0
 412         ldr     lr, [sp, #S_PC]                 @ Get PC
 413         add     sp, sp, #S_FRAME_SIZE
 414         subs    pc, lr, #4                      @ return & move spsr_svc into cpsr
 415         .endm
 416
 417         .macro get_bad_stack
 418         ldr     r13, IRQ_STACK_START_IN
 419
 420         str     lr, [r13]                       @ save caller lr in position 0 of saved stack
 421         mrs     lr, spsr                        @ get the spsr
 422         str     lr, [r13, #4]                   @ save spsr in position 1 of saved stack
 423
 424         mov     r13, #MODE_SVC                  @ prepare SVC-Mode
 425         @ msr   spsr_c, r13
 426         msr     spsr, r13                       @ switch modes, make sure moves will execute
 427         mov     lr, pc                          @ capture return pc
 428         movs    pc, lr                          @ jump to next instruction & switch modes.
 429         .endm
 430
 431         .macro get_irq_stack                    @ setup IRQ stack
 432         ldr     sp, IRQ_STACK_START
 433         .endm
 434
 435         .macro get_fiq_stack                    @ setup FIQ stack
 436         ldr     sp, FIQ_STACK_START
 437         .endm
 438
 439 /*
 440  * exception handlers
 441  */
 442         .align  5
 443 undefined_instruction:
 444         get_bad_stack
 445         bad_save_user_regs
 446         bl      do_undefined_instruction
 447
 448         .align  5
 449 software_interrupt:
 450         get_bad_stack
 451         bad_save_user_regs
 452         bl      do_software_interrupt
 453
 454         .align  5
 455 prefetch_abort:
 456         get_bad_stack
 457         bad_save_user_regs
 458         bl      do_prefetch_abort
 459
 460         .align  5
 461 data_abort:
 462         get_bad_stack
 463         bad_save_user_regs
 464         bl      do_data_abort
 465
 466         .align  5
 467 not_used:
 468         get_bad_stack
 469         bad_save_user_regs
 470         bl      do_not_used
 471
 472 #ifdef CONFIG_USE_IRQ
 473
 474         .align  5
 475 irq:
 476         get_irq_stack
 477         irq_save_user_regs
 478         bl      do_irq
 479         irq_restore_user_regs
 480
 481         .align  5
 482 fiq:
 483         get_fiq_stack
 484         /* someone ought to write a more effiction fiq_save_user_regs */
 485         irq_save_user_regs
 486         bl      do_fiq
 487         irq_restore_user_regs
 488
 489 #else
 490
 491         .align  5
 492 irq:
 493         get_bad_stack
 494         bad_save_user_regs
 495         bl      do_irq
 496
 497         .align  5
 498 fiq:
 499         get_bad_stack
 500         bad_save_user_regs
 501         bl      do_fiq
 502
 503 #endif
 504
 505         .align  5
 506 .globl reset_cpu
 507 reset_cpu:
 508         ldr     r1, rstctl1     /* get clkm1 reset ctl */
 509         mov     r3, #0x3        /* dsp_en + arm_rst = global reset */
 510         strh    r3, [r1]        /* force reset */
 511         mov     r0, r0
 512 _loop_forever:
 513         b       _loop_forever
 514 rstctl1:
 515         .word   0xfffece10