arch/arm/cpu/arm926ejs/at91/at91sam9261_devices.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <common.h>
  26 #include <asm/arch/at91_common.h>
  27 #include <asm/arch/at91_pmc.h>
  28 #include <asm/arch/gpio.h>
  29 #include <asm/arch/io.h>
  30
  31 void at91_serial0_hw_init(void)
  32 {
  33         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
  34
  35         at91_set_a_periph(AT91_PIO_PORTC, 8, 1);                /* TXD0 */
  36         at91_set_a_periph(AT91_PIO_PORTC, 9, 0);                /* RXD0 */
  37         writel(1 << AT91SAM9261_ID_US0, &pmc->pcer);
  38 }
  39
  40 void at91_serial1_hw_init(void)
  41 {
  42         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
  43
  44         at91_set_a_periph(AT91_PIO_PORTC, 12, 1);               /* TXD1 */
  45         at91_set_a_periph(AT91_PIO_PORTC, 13, 0);               /* RXD1 */
  46         writel(1 << AT91SAM9261_ID_US1, &pmc->pcer);
  47 }
  48
  49 void at91_serial2_hw_init(void)
  50 {
  51         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
  52
  53         at91_set_a_periph(AT91_PIO_PORTC, 14, 1);               /* TXD2 */
  54         at91_set_a_periph(AT91_PIO_PORTC, 15, 0);               /* RXD2 */
  55         writel(1 << AT91SAM9261_ID_US2, &pmc->pcer);
  56 }
  57
  58 void at91_serial3_hw_init(void)
  59 {
  60         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
  61
  62         at91_set_a_periph(AT91_PIO_PORTA, 9, 0);                /* DRXD */
  63         at91_set_a_periph(AT91_PIO_PORTA, 10, 1);               /* DTXD */
  64         writel(1 << AT91_ID_SYS, &pmc->pcer);
  65 }
  66
  67 void at91_serial_hw_init(void)
  68 {
  69 #ifdef CONFIG_USART0
  70         at91_serial0_hw_init();
  71 #endif
  72
  73 #ifdef CONFIG_USART1
  74         at91_serial1_hw_init();
  75 #endif
  76
  77 #ifdef CONFIG_USART2
  78         at91_serial2_hw_init();
  79 #endif
  80
  81 #ifdef CONFIG_USART3    /* DBGU */
  82         at91_serial3_hw_init();
  83 #endif
  84 }
  85
  86 #ifdef CONFIG_HAS_DATAFLASH
  87 void at91_spi0_hw_init(unsigned long cs_mask)
  88 {
  89         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
  90
  91         at91_set_a_periph(AT91_PIO_PORTA, 0, 0);        /* SPI0_MISO */
  92         at91_set_a_periph(AT91_PIO_PORTA, 1, 0);        /* SPI0_MOSI */
  93         at91_set_a_periph(AT91_PIO_PORTA, 2, 0);        /* SPI0_SPCK */
  94
  95         /* Enable clock */
  96         writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer);
  97
  98         if (cs_mask & (1 << 0)) {
  99                 at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
 100         }
 101         if (cs_mask & (1 << 1)) {
 102                 at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
 103         }
 104         if (cs_mask & (1 << 2)) {
 105                 at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
 106         }
 107         if (cs_mask & (1 << 3)) {
 108                 at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
 109         }
 110         if (cs_mask & (1 << 4)) {
 111                 at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
 112         }
 113         if (cs_mask & (1 << 5)) {
 114                 at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
 115         }
 116         if (cs_mask & (1 << 6)) {
 117                 at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
 118         }
 119         if (cs_mask & (1 << 7)) {
 120                 at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
 121         }
 122 }
 123
 124 void at91_spi1_hw_init(unsigned long cs_mask)
 125 {
 126         at91_pmc_t      *pmc    = (at91_pmc_t *) AT91_PMC_BASE;
 127
 128         at91_set_a_periph(AT91_PIO_PORTB, 30, 0);       /* SPI1_MISO */
 129         at91_set_a_periph(AT91_PIO_PORTB, 31, 0);       /* SPI1_MOSI */
 130         at91_set_a_periph(AT91_PIO_PORTB, 29, 0);       /* SPI1_SPCK */
 131
 132         /* Enable clock */
 133         writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer);
 134
 135         if (cs_mask & (1 << 0)) {
 136                 at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
 137         }
 138         if (cs_mask & (1 << 1)) {
 139                 at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
 140         }
 141         if (cs_mask & (1 << 2)) {
 142                 at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
 143         }
 144         if (cs_mask & (1 << 3)) {
 145                 at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
 146         }
 147         if (cs_mask & (1 << 4)) {
 148                 at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
 149         }
 150         if (cs_mask & (1 << 5)) {
 151                 at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
 152         }
 153         if (cs_mask & (1 << 6)) {
 154                 at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
 155         }
 156         if (cs_mask & (1 << 7)) {
 157                 at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
 158         }
 159 }
 160 #endif