arch/arm/cpu/arm926ejs/kirkwood/dram.c

   1 /*
   2  * (C) Copyright 2009
   3  * Marvell Semiconductor <www.marvell.com>
   4  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22  * MA 02110-1301 USA
  23  */
  24
  25 #include <config.h>
  26 #include <common.h>
  27 #include <asm/arch/kirkwood.h>
  28
  29 DECLARE_GLOBAL_DATA_PTR;
  30
  31 #define KW_REG_CPUCS_WIN_BAR(x)         (KW_REGISTER(0x1500) + (x * 0x08))
  32 #define KW_REG_CPUCS_WIN_SZ(x)          (KW_REGISTER(0x1504) + (x * 0x08))
  33 /*
  34  * kw_sdram_bar - reads SDRAM Base Address Register
  35  */
  36 u32 kw_sdram_bar(enum memory_bank bank)
  37 {
  38         u32 result = 0;
  39         u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  40
  41         if ((!enable) || (bank > BANK3))
  42                 return 0;
  43
  44         result = readl(KW_REG_CPUCS_WIN_BAR(bank));
  45         return result;
  46 }
  47
  48 /*
  49  * kw_sdram_bs - reads SDRAM Bank size
  50  */
  51 u32 kw_sdram_bs(enum memory_bank bank)
  52 {
  53         u32 result = 0;
  54         u32 enable = 0x01 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  55
  56         if ((!enable) || (bank > BANK3))
  57                 return 0;
  58         result = 0xff000000 & readl(KW_REG_CPUCS_WIN_SZ(bank));
  59         result += 0x01000000;
  60         return result;
  61 }
  62
  63 #ifndef CONFIG_SYS_BOARD_DRAM_INIT
  64 int dram_init(void)
  65 {
  66         int i;
  67
  68         gd->ram_size = 0;
  69         for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  70                 gd->bd->bi_dram[i].start = kw_sdram_bar(i);
  71                 gd->bd->bi_dram[i].size = kw_sdram_bs(i);
  72                 /*
  73                  * It is assumed that all memory banks are consecutive
  74                  * and without gaps.
  75                  * If the gap is found, ram_size will be reported for
  76                  * consecutive memory only
  77                  */
  78                 if (gd->bd->bi_dram[i].start != gd->ram_size)
  79                         break;
  80
  81                 gd->ram_size += gd->bd->bi_dram[i].size;
  82
  83         }
  84
  85         for (; i < CONFIG_NR_DRAM_BANKS; i++) {
  86                 /* If above loop terminated prematurely, we need to set
  87                  * remaining banks' start address & size as 0. Otherwise other
  88                  * u-boot functions and Linux kernel gets wrong values which
  89                  * could result in crash */
  90                 gd->bd->bi_dram[i].start = 0;
  91                 gd->bd->bi_dram[i].size = 0;
  92         }
  93
  94         return 0;
  95 }
  96
  97 /*
  98  * If this function is not defined here,
  99  * board.c alters dram bank zero configuration defined above.
 100  */
 101 void dram_init_banksize(void)
 102 {
 103         dram_init();
 104 }
 105 #endif /* CONFIG_SYS_BOARD_DRAM_INIT */