arch/arm/cpu/arm926ejs/mb86r0x/asm-offsets.c

   1 /*
   2  * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
   3  *
   4  * This program is used to generate definitions needed by
   5  * assembly language modules.
   6  *
   7  * We use the technique used in the OSF Mach kernel code:
   8  * generate asm statements containing #defines,
   9  * compile this file to assembler, and then extract the
  10  * #defines from the assembly-language output.
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <asm/arch/mb86r0x.h>
  17
  18 #include <linux/kbuild.h>
  19
  20 int main(void)
  21 {
  22         /* ddr2 controller */
  23         DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric));
  24         DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1));
  25         DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2));
  26         DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca));
  27         DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm));
  28         DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1));
  29         DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2));
  30         DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr));
  31         DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf));
  32         DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr));
  33         DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims));
  34         DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros));
  35         DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1));
  36         DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba));
  37         DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs));
  38
  39         /* clock reset generator */
  40         DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr));
  41         DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha));
  42         DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa));
  43         DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb));
  44         DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb));
  45         DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram));
  46
  47         /* chip control module */
  48         DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc));
  49
  50         /* external bus interface */
  51         DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0]));
  52         DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2]));
  53         DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4]));
  54         DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0]));
  55         DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2]));
  56         DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4]));
  57         DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0]));
  58         DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2]));
  59         DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4]));
  60
  61         return 0;
  62 }