arch/arm/cpu/arm926ejs/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *  Copyright (c) 2010  Albert Aribaud <albert.u.boot@aribaud.net>
  14  *
  15  * See file CREDITS for list of people who contributed to this
  16  * project.
  17  *
  18  * This program is free software; you can redistribute it and/or
  19  * modify it under the terms of the GNU General Public License as
  20  * published by the Free Software Foundation; either version 2 of
  21  * the License, or (at your option) any later version.
  22  *
  23  * This program is distributed in the hope that it will be useful,
  24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  * GNU General Public License for more details.
  27  *
  28  * You should have received a copy of the GNU General Public License
  29  * along with this program; if not, write to the Free Software
  30  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  31  * MA 02111-1307 USA
  32  */
  33
  34 #include <asm-offsets.h>
  35 #include <config.h>
  36 #include <common.h>
  37 #include <version.h>
  38
  39 /*
  40  *************************************************************************
  41  *
  42  * Jump vector table as in table 3.1 in [1]
  43  *
  44  *************************************************************************
  45  */
  46
  47
  48 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
  49 .globl _start
  50 _start:
  51 .globl _NOR_BOOT_CFG
  52 _NOR_BOOT_CFG:
  53         .word   CONFIG_SYS_DV_NOR_BOOT_CFG
  54         b       reset
  55 #else
  56 .globl _start
  57 _start:
  58         b       reset
  59 #endif
  60 #ifdef CONFIG_SPL_BUILD
  61 /* No exception handlers in preloader */
  62         ldr     pc, _hang
  63         ldr     pc, _hang
  64         ldr     pc, _hang
  65         ldr     pc, _hang
  66         ldr     pc, _hang
  67         ldr     pc, _hang
  68         ldr     pc, _hang
  69
  70 _hang:
  71         .word   do_hang
  72 /* pad to 64 byte boundary */
  73         .word   0x12345678
  74         .word   0x12345678
  75         .word   0x12345678
  76         .word   0x12345678
  77         .word   0x12345678
  78         .word   0x12345678
  79         .word   0x12345678
  80 #else
  81         ldr     pc, _undefined_instruction
  82         ldr     pc, _software_interrupt
  83         ldr     pc, _prefetch_abort
  84         ldr     pc, _data_abort
  85         ldr     pc, _not_used
  86         ldr     pc, _irq
  87         ldr     pc, _fiq
  88
  89 _undefined_instruction:
  90         .word undefined_instruction
  91 _software_interrupt:
  92         .word software_interrupt
  93 _prefetch_abort:
  94         .word prefetch_abort
  95 _data_abort:
  96         .word data_abort
  97 _not_used:
  98         .word not_used
  99 _irq:
 100         .word irq
 101 _fiq:
 102         .word fiq
 103
 104 #endif  /* CONFIG_SPL_BUILD */
 105         .balignl 16,0xdeadbeef
 106
 107
 108 /*
 109  *************************************************************************
 110  *
 111  * Startup Code (reset vector)
 112  *
 113  * do important init only if we don't start from memory!
 114  * setup Memory and board specific bits prior to relocation.
 115  * relocate armboot to ram
 116  * setup stack
 117  *
 118  *************************************************************************
 119  */
 120
 121 .globl _TEXT_BASE
 122 _TEXT_BASE:
 123 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 124         .word   CONFIG_SPL_TEXT_BASE
 125 #else
 126         .word   CONFIG_SYS_TEXT_BASE
 127 #endif
 128
 129 /*
 130  * These are defined in the board-specific linker script.
 131  * Subtracting _start from them lets the linker put their
 132  * relative position in the executable instead of leaving
 133  * them null.
 134  */
 135 .globl _bss_start_ofs
 136 _bss_start_ofs:
 137         .word __bss_start - _start
 138
 139 .globl _bss_end_ofs
 140 _bss_end_ofs:
 141         .word __bss_end - _start
 142
 143 .globl _end_ofs
 144 _end_ofs:
 145         .word _end - _start
 146
 147 #ifdef CONFIG_USE_IRQ
 148 /* IRQ stack memory (calculated at run-time) */
 149 .globl IRQ_STACK_START
 150 IRQ_STACK_START:
 151         .word   0x0badc0de
 152
 153 /* IRQ stack memory (calculated at run-time) */
 154 .globl FIQ_STACK_START
 155 FIQ_STACK_START:
 156         .word 0x0badc0de
 157 #endif
 158
 159 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 160 .globl IRQ_STACK_START_IN
 161 IRQ_STACK_START_IN:
 162         .word   0x0badc0de
 163
 164 /*
 165  * the actual reset code
 166  */
 167
 168 reset:
 169         /*
 170          * set the cpu to SVC32 mode
 171          */
 172         mrs     r0,cpsr
 173         bic     r0,r0,#0x1f
 174         orr     r0,r0,#0xd3
 175         msr     cpsr,r0
 176
 177         /*
 178          * we do sys-critical inits only at reboot,
 179          * not when booting from ram!
 180          */
 181 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 182         bl      cpu_init_crit
 183 #endif
 184
 185         bl      _main
 186
 187 /*------------------------------------------------------------------------------*/
 188
 189         .globl  c_runtime_cpu_setup
 190 c_runtime_cpu_setup:
 191
 192         bx      lr
 193
 194 /*
 195  *************************************************************************
 196  *
 197  * CPU_init_critical registers
 198  *
 199  * setup important registers
 200  * setup memory timing
 201  *
 202  *************************************************************************
 203  */
 204 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 205 cpu_init_crit:
 206         /*
 207          * flush D cache before disabling it
 208          */
 209         mov     r0, #0
 210 flush_dcache:
 211         mrc     p15, 0, r15, c7, c10, 3
 212         bne     flush_dcache
 213
 214         mcr     p15, 0, r0, c8, c7, 0   /* invalidate TLB */
 215         mcr     p15, 0, r0, c7, c5, 0   /* invalidate I Cache */
 216
 217         /*
 218          * disable MMU and D cache
 219          * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined
 220          */
 221         mrc     p15, 0, r0, c1, c0, 0
 222         bic     r0, r0, #0x00000300     /* clear bits 9:8 (---- --RS) */
 223         bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
 224 #ifdef CONFIG_SYS_EXCEPTION_VECTORS_HIGH
 225         orr     r0, r0, #0x00002000     /* set bit 13 (--V- ----) */
 226 #else
 227         bic     r0, r0, #0x00002000     /* clear bit 13 (--V- ----) */
 228 #endif
 229         orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
 230 #ifndef CONFIG_SYS_ICACHE_OFF
 231         orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
 232 #endif
 233         mcr     p15, 0, r0, c1, c0, 0
 234
 235         /*
 236          * Go setup Memory and board specific bits prior to relocation.
 237          */
 238         mov     ip, lr          /* perserve link reg across call */
 239         bl      lowlevel_init   /* go setup pll,mux,memory */
 240         mov     lr, ip          /* restore link */
 241         mov     pc, lr          /* back to my caller */
 242 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 243
 244 #ifndef CONFIG_SPL_BUILD
 245 /*
 246  *************************************************************************
 247  *
 248  * Interrupt handling
 249  *
 250  *************************************************************************
 251  */
 252
 253 @
 254 @ IRQ stack frame.
 255 @
 256 #define S_FRAME_SIZE    72
 257
 258 #define S_OLD_R0        68
 259 #define S_PSR           64
 260 #define S_PC            60
 261 #define S_LR            56
 262 #define S_SP            52
 263
 264 #define S_IP            48
 265 #define S_FP            44
 266 #define S_R10           40
 267 #define S_R9            36
 268 #define S_R8            32
 269 #define S_R7            28
 270 #define S_R6            24
 271 #define S_R5            20
 272 #define S_R4            16
 273 #define S_R3            12
 274 #define S_R2            8
 275 #define S_R1            4
 276 #define S_R0            0
 277
 278 #define MODE_SVC 0x13
 279 #define I_BIT    0x80
 280
 281 /*
 282  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 283  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 284  */
 285
 286         .macro  bad_save_user_regs
 287         @ carve out a frame on current user stack
 288         sub     sp, sp, #S_FRAME_SIZE
 289         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 290         ldr     r2, IRQ_STACK_START_IN
 291         @ get values for "aborted" pc and cpsr (into parm regs)
 292         ldmia   r2, {r2 - r3}
 293         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 294         add     r5, sp, #S_SP
 295         mov     r1, lr
 296         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 297         mov     r0, sp          @ save current stack into r0 (param register)
 298         .endm
 299
 300         .macro  irq_save_user_regs
 301         sub     sp, sp, #S_FRAME_SIZE
 302         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 303         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 304         add     r8, sp, #S_PC
 305         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 306         str     lr, [r8, #0]            @ Save calling PC
 307         mrs     r6, spsr
 308         str     r6, [r8, #4]            @ Save CPSR
 309         str     r0, [r8, #8]            @ Save OLD_R0
 310         mov     r0, sp
 311         .endm
 312
 313         .macro  irq_restore_user_regs
 314         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 315         mov     r0, r0
 316         ldr     lr, [sp, #S_PC]                 @ Get PC
 317         add     sp, sp, #S_FRAME_SIZE
 318         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 319         .endm
 320
 321         .macro get_bad_stack
 322         ldr     r13, IRQ_STACK_START_IN         @ setup our mode stack
 323
 324         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 325         mrs     lr, spsr        @ get the spsr
 326         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 327         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 328         @ msr   spsr_c, r13
 329         msr     spsr, r13       @ switch modes, make sure moves will execute
 330         mov     lr, pc          @ capture return pc
 331         movs    pc, lr          @ jump to next instruction & switch modes.
 332         .endm
 333
 334         .macro get_irq_stack                    @ setup IRQ stack
 335         ldr     sp, IRQ_STACK_START
 336         .endm
 337
 338         .macro get_fiq_stack                    @ setup FIQ stack
 339         ldr     sp, FIQ_STACK_START
 340         .endm
 341 #endif  /* CONFIG_SPL_BUILD */
 342
 343 /*
 344  * exception handlers
 345  */
 346 #ifdef CONFIG_SPL_BUILD
 347         .align  5
 348 do_hang:
 349         ldr     sp, _TEXT_BASE                  /* switch to abort stack */
 350 1:
 351         bl      1b                              /* hang and never return */
 352 #else   /* !CONFIG_SPL_BUILD */
 353         .align  5
 354 undefined_instruction:
 355         get_bad_stack
 356         bad_save_user_regs
 357         bl      do_undefined_instruction
 358
 359         .align  5
 360 software_interrupt:
 361         get_bad_stack
 362         bad_save_user_regs
 363         bl      do_software_interrupt
 364
 365         .align  5
 366 prefetch_abort:
 367         get_bad_stack
 368         bad_save_user_regs
 369         bl      do_prefetch_abort
 370
 371         .align  5
 372 data_abort:
 373         get_bad_stack
 374         bad_save_user_regs
 375         bl      do_data_abort
 376
 377         .align  5
 378 not_used:
 379         get_bad_stack
 380         bad_save_user_regs
 381         bl      do_not_used
 382
 383 #ifdef CONFIG_USE_IRQ
 384
 385         .align  5
 386 irq:
 387         get_irq_stack
 388         irq_save_user_regs
 389         bl      do_irq
 390         irq_restore_user_regs
 391
 392         .align  5
 393 fiq:
 394         get_fiq_stack
 395         /* someone ought to write a more effiction fiq_save_user_regs */
 396         irq_save_user_regs
 397         bl      do_fiq
 398         irq_restore_user_regs
 399
 400 #else
 401
 402         .align  5
 403 irq:
 404         get_bad_stack
 405         bad_save_user_regs
 406         bl      do_irq
 407
 408         .align  5
 409 fiq:
 410         get_bad_stack
 411         bad_save_user_regs
 412         bl      do_fiq
 413
 414 #endif
 415 #endif  /* CONFIG_SPL_BUILD */