arch/arm/cpu/arm_intcm/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <version.h>
  36
  37 /*
  38  *************************************************************************
  39  *
  40  * Jump vector table
  41  *
  42  *************************************************************************
  43  */
  44
  45 .globl _start
  46 _start:
  47         b       reset
  48         ldr     pc, _undefined_instruction
  49         ldr     pc, _software_interrupt
  50         ldr     pc, _prefetch_abort
  51         ldr     pc, _data_abort
  52         ldr     pc, _not_used
  53         ldr     pc, _irq
  54         ldr     pc, _fiq
  55
  56 _undefined_instruction:
  57         .word undefined_instruction
  58 _software_interrupt:
  59         .word software_interrupt
  60 _prefetch_abort:
  61         .word prefetch_abort
  62 _data_abort:
  63         .word data_abort
  64 _not_used:
  65         .word not_used
  66 _irq:
  67         .word irq
  68 _fiq:
  69         .word fiq
  70
  71         .balignl 16,0xdeadbeef
  72
  73 /*
  74  *************************************************************************
  75  *
  76  * Startup Code (reset vector)
  77  *
  78  * do important init only if we don't start from memory!
  79  * setup memory and board specific bits prior to relocation.
  80  * relocate armboot to ram
  81  * setup stack
  82  *
  83  *************************************************************************
  84  */
  85
  86 .globl _TEXT_BASE
  87 _TEXT_BASE:
  88 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
  89         .word   CONFIG_SPL_TEXT_BASE
  90 #else
  91         .word   CONFIG_SYS_TEXT_BASE
  92 #endif
  93
  94 /*
  95  * These are defined in the board-specific linker script.
  96  * Subtracting _start from them lets the linker put their
  97  * relative position in the executable instead of leaving
  98  * them null.
  99  */
 100 .globl _bss_start_ofs
 101 _bss_start_ofs:
 102         .word __bss_start - _start
 103
 104 .globl _bss_end_ofs
 105 _bss_end_ofs:
 106         .word __bss_end - _start
 107
 108 .globl _end_ofs
 109 _end_ofs:
 110         .word _end - _start
 111
 112 #ifdef CONFIG_USE_IRQ
 113 /* IRQ stack memory (calculated at run-time) */
 114 .globl IRQ_STACK_START
 115 IRQ_STACK_START:
 116         .word   0x0badc0de
 117
 118 /* IRQ stack memory (calculated at run-time) */
 119 .globl FIQ_STACK_START
 120 FIQ_STACK_START:
 121         .word 0x0badc0de
 122 #endif
 123
 124 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 125 .globl IRQ_STACK_START_IN
 126 IRQ_STACK_START_IN:
 127         .word   0x0badc0de
 128
 129 /*
 130  * the actual reset code
 131  */
 132
 133 reset:
 134         /*
 135          * set the cpu to SVC32 mode
 136          */
 137         mrs     r0,cpsr
 138         bic     r0,r0,#0x1f
 139         orr     r0,r0,#0xd3
 140         msr     cpsr,r0
 141
 142         /*
 143          * we do sys-critical inits only at reboot,
 144          * not when booting from ram!
 145          */
 146 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 147         bl      cpu_init_crit
 148 #endif
 149
 150         bl      _main
 151
 152 /*------------------------------------------------------------------------------*/
 153
 154 /*
 155  * void relocate_code (addr_sp, gd, addr_moni)
 156  *
 157  * This "function" does not return, instead it continues in RAM
 158  * after relocating the monitor code.
 159  *
 160  */
 161         .globl  relocate_code
 162 relocate_code:
 163         mov     r4, r0  /* save addr_sp */
 164         mov     r5, r1  /* save addr of gd */
 165         mov     r6, r2  /* save addr of destination */
 166
 167         adr     r0, _start
 168         cmp     r0, r6
 169         moveq   r9, #0          /* no relocation. relocation offset(r9) = 0 */
 170         beq     relocate_done           /* skip relocation */
 171         mov     r1, r6                  /* r1 <- scratch for copy_loop */
 172         ldr     r3, _bss_start_ofs
 173         add     r2, r0, r3              /* r2 <- source end address         */
 174
 175 copy_loop:
 176         ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
 177         stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
 178         cmp     r0, r2                  /* until source end address [r2]    */
 179         blo     copy_loop
 180
 181 #ifndef CONFIG_SPL_BUILD
 182         /*
 183          * fix .rel.dyn relocations
 184          */
 185         ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 186         sub     r9, r6, r0              /* r9 <- relocation offset */
 187         ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 188         add     r10, r10, r0            /* r10 <- sym table in FLASH */
 189         ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 190         add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 191         ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 192         add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 193 fixloop:
 194         ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 195         add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 196         ldr     r1, [r2, #4]
 197         and     r7, r1, #0xff
 198         cmp     r7, #23                 /* relative fixup? */
 199         beq     fixrel
 200         cmp     r7, #2                  /* absolute fixup? */
 201         beq     fixabs
 202         /* ignore unknown type of fixup */
 203         b       fixnext
 204 fixabs:
 205         /* absolute fix: set location to (offset) symbol value */
 206         mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 207         add     r1, r10, r1             /* r1 <- address of symbol in table */
 208         ldr     r1, [r1, #4]            /* r1 <- symbol value */
 209         add     r1, r1, r9              /* r1 <- relocated sym addr */
 210         b       fixnext
 211 fixrel:
 212         /* relative fix: increase location by offset */
 213         ldr     r1, [r0]
 214         add     r1, r1, r9
 215 fixnext:
 216         str     r1, [r0]
 217         add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 218         cmp     r2, r3
 219         blo     fixloop
 220 #endif
 221
 222 relocate_done:
 223
 224         bx      lr
 225
 226 _rel_dyn_start_ofs:
 227         .word __rel_dyn_start - _start
 228 _rel_dyn_end_ofs:
 229         .word __rel_dyn_end - _start
 230 _dynsym_start_ofs:
 231         .word __dynsym_start - _start
 232
 233         .globl  c_runtime_cpu_setup
 234 c_runtime_cpu_setup:
 235
 236         mov     pc, lr
 237
 238 /*
 239  *************************************************************************
 240  *
 241  * CPU_init_critical registers
 242  *
 243  * setup important registers
 244  * setup memory timing
 245  *
 246  *************************************************************************
 247  */
 248
 249 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 250 cpu_init_crit:
 251         /*  arm_int_generic assumes the ARM boot monitor, or user software,
 252          * has initialized the platform
 253          */
 254         mov     pc, lr          /* back to my caller */
 255 #endif
 256 /*
 257  *************************************************************************
 258  *
 259  * Interrupt handling
 260  *
 261  *************************************************************************
 262  */
 263
 264 @
 265 @ IRQ stack frame.
 266 @
 267 #define S_FRAME_SIZE    72
 268
 269 #define S_OLD_R0        68
 270 #define S_PSR           64
 271 #define S_PC            60
 272 #define S_LR            56
 273 #define S_SP            52
 274
 275 #define S_IP            48
 276 #define S_FP            44
 277 #define S_R10           40
 278 #define S_R9            36
 279 #define S_R8            32
 280 #define S_R7            28
 281 #define S_R6            24
 282 #define S_R5            20
 283 #define S_R4            16
 284 #define S_R3            12
 285 #define S_R2            8
 286 #define S_R1            4
 287 #define S_R0            0
 288
 289 #define MODE_SVC 0x13
 290 #define I_BIT    0x80
 291
 292 /*
 293  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 294  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 295  */
 296
 297         .macro  bad_save_user_regs
 298         @ carve out a frame on current user stack
 299         sub     sp, sp, #S_FRAME_SIZE
 300         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 301
 302         ldr     r2, IRQ_STACK_START_IN
 303         @ get values for "aborted" pc and cpsr (into parm regs)
 304         ldmia   r2, {r2 - r3}
 305         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 306         add     r5, sp, #S_SP
 307         mov     r1, lr
 308         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 309         mov     r0, sp          @ save current stack into r0 (param register)
 310         .endm
 311
 312         .macro  irq_save_user_regs
 313         sub     sp, sp, #S_FRAME_SIZE
 314         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 315         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 316         add     r8, sp, #S_PC
 317         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 318         str     lr, [r8, #0]            @ Save calling PC
 319         mrs     r6, spsr
 320         str     r6, [r8, #4]            @ Save CPSR
 321         str     r0, [r8, #8]            @ Save OLD_R0
 322         mov     r0, sp
 323         .endm
 324
 325         .macro  irq_restore_user_regs
 326         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 327         mov     r0, r0
 328         ldr     lr, [sp, #S_PC]                 @ Get PC
 329         add     sp, sp, #S_FRAME_SIZE
 330         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 331         .endm
 332
 333         .macro get_bad_stack
 334         ldr     r13, IRQ_STACK_START_IN         @ setup our mode stack
 335
 336         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 337         mrs     lr, spsr        @ get the spsr
 338         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 339         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 340         @ msr   spsr_c, r13
 341         msr     spsr, r13       @ switch modes, make sure moves will execute
 342         mov     lr, pc          @ capture return pc
 343         movs    pc, lr          @ jump to next instruction & switch modes.
 344         .endm
 345
 346         .macro get_irq_stack                    @ setup IRQ stack
 347         ldr     sp, IRQ_STACK_START
 348         .endm
 349
 350         .macro get_fiq_stack                    @ setup FIQ stack
 351         ldr     sp, FIQ_STACK_START
 352         .endm
 353
 354 /*
 355  * exception handlers
 356  */
 357         .align  5
 358 .globl undefined_instruction
 359 undefined_instruction:
 360         get_bad_stack
 361         bad_save_user_regs
 362         bl      do_undefined_instruction
 363
 364         .align  5
 365 .globl software_interrupt
 366 software_interrupt:
 367         get_bad_stack
 368         bad_save_user_regs
 369         bl      do_software_interrupt
 370
 371         .align  5
 372 .globl prefetch_abort
 373 prefetch_abort:
 374         get_bad_stack
 375         bad_save_user_regs
 376         bl      do_prefetch_abort
 377
 378         .align  5
 379 .globl data_abort
 380 data_abort:
 381         get_bad_stack
 382         bad_save_user_regs
 383         bl      do_data_abort
 384
 385         .align  5
 386 .globl not_used
 387 not_used:
 388         get_bad_stack
 389         bad_save_user_regs
 390         bl      do_not_used
 391
 392 #ifdef CONFIG_USE_IRQ
 393         .align  5
 394 .globl irq
 395 irq:
 396         get_irq_stack
 397         irq_save_user_regs
 398         bl      do_irq
 399         irq_restore_user_regs
 400
 401         .align  5
 402 .globl fiq
 403 fiq:
 404         get_fiq_stack
 405         /* someone ought to write a more effiction fiq_save_user_regs */
 406         irq_save_user_regs
 407         bl      do_fiq
 408         irq_restore_user_regs
 409
 410 #else
 411
 412         .align  5
 413 .globl irq
 414 irq:
 415         get_bad_stack
 416         bad_save_user_regs
 417         bl      do_irq
 418
 419         .align  5
 420 .globl fiq
 421 fiq:
 422         get_bad_stack
 423         bad_save_user_regs
 424         bl      do_fiq
 425
 426 #endif