arch/arm/cpu/arm_intcm/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <version.h>
  36
  37 /*
  38  *************************************************************************
  39  *
  40  * Jump vector table
  41  *
  42  *************************************************************************
  43  */
  44
  45 .globl _start
  46 _start:
  47         b       reset
  48         ldr     pc, _undefined_instruction
  49         ldr     pc, _software_interrupt
  50         ldr     pc, _prefetch_abort
  51         ldr     pc, _data_abort
  52         ldr     pc, _not_used
  53         ldr     pc, _irq
  54         ldr     pc, _fiq
  55
  56 _undefined_instruction:
  57         .word undefined_instruction
  58 _software_interrupt:
  59         .word software_interrupt
  60 _prefetch_abort:
  61         .word prefetch_abort
  62 _data_abort:
  63         .word data_abort
  64 _not_used:
  65         .word not_used
  66 _irq:
  67         .word irq
  68 _fiq:
  69         .word fiq
  70
  71         .balignl 16,0xdeadbeef
  72
  73 /*
  74  *************************************************************************
  75  *
  76  * Startup Code (reset vector)
  77  *
  78  * do important init only if we don't start from memory!
  79  * setup memory and board specific bits prior to relocation.
  80  * relocate armboot to ram
  81  * setup stack
  82  *
  83  *************************************************************************
  84  */
  85
  86 .globl _TEXT_BASE
  87 _TEXT_BASE:
  88         .word   CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
  89
  90 /*
  91  * These are defined in the board-specific linker script.
  92  * Subtracting _start from them lets the linker put their
  93  * relative position in the executable instead of leaving
  94  * them null.
  95  */
  96 .globl _bss_start_ofs
  97 _bss_start_ofs:
  98         .word __bss_start - _start
  99
 100 .globl _bss_end_ofs
 101 _bss_end_ofs:
 102         .word __bss_end__ - _start
 103
 104 #ifdef CONFIG_USE_IRQ
 105 /* IRQ stack memory (calculated at run-time) */
 106 .globl IRQ_STACK_START
 107 IRQ_STACK_START:
 108         .word   0x0badc0de
 109
 110 /* IRQ stack memory (calculated at run-time) */
 111 .globl FIQ_STACK_START
 112 FIQ_STACK_START:
 113         .word 0x0badc0de
 114 #endif
 115
 116 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 117 .globl IRQ_STACK_START_IN
 118 IRQ_STACK_START_IN:
 119         .word   0x0badc0de
 120
 121 /*
 122  * the actual reset code
 123  */
 124
 125 reset:
 126         /*
 127          * set the cpu to SVC32 mode
 128          */
 129         mrs     r0,cpsr
 130         bic     r0,r0,#0x1f
 131         orr     r0,r0,#0xd3
 132         msr     cpsr,r0
 133
 134         /*
 135          * we do sys-critical inits only at reboot,
 136          * not when booting from ram!
 137          */
 138 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 139         bl      cpu_init_crit
 140 #endif
 141
 142 /* Set stackpointer in internal RAM to call board_init_f */
 143 call_board_init_f:
 144         ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
 145         bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
 146         ldr     r0,=0x00000000
 147         bl      board_init_f
 148
 149 /*------------------------------------------------------------------------------*/
 150
 151 /*
 152  * void relocate_code (addr_sp, gd, addr_moni)
 153  *
 154  * This "function" does not return, instead it continues in RAM
 155  * after relocating the monitor code.
 156  *
 157  */
 158         .globl  relocate_code
 159 relocate_code:
 160         mov     r4, r0  /* save addr_sp */
 161         mov     r5, r1  /* save addr of gd */
 162         mov     r6, r2  /* save addr of destination */
 163
 164         /* Set up the stack                                                 */
 165 stack_setup:
 166         mov     sp, r4
 167
 168         adr     r0, _start
 169         cmp     r0, r6
 170         beq     clear_bss               /* skip relocation */
 171         mov     r1, r6                  /* r1 <- scratch for copy_loop */
 172         ldr     r3, _bss_start_ofs
 173         add     r2, r0, r3              /* r2 <- source end address         */
 174
 175 copy_loop:
 176         ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
 177         stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
 178         cmp     r0, r2                  /* until source end address [r2]    */
 179         blo     copy_loop
 180
 181 #ifndef CONFIG_PRELOADER
 182         /*
 183          * fix .rel.dyn relocations
 184          */
 185         ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 186         sub     r9, r6, r0              /* r9 <- relocation offset */
 187         ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 188         add     r10, r10, r0            /* r10 <- sym table in FLASH */
 189         ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 190         add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 191         ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 192         add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 193 fixloop:
 194         ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 195         add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 196         ldr     r1, [r2, #4]
 197         and     r7, r1, #0xff
 198         cmp     r7, #23                 /* relative fixup? */
 199         beq     fixrel
 200         cmp     r7, #2                  /* absolute fixup? */
 201         beq     fixabs
 202         /* ignore unknown type of fixup */
 203         b       fixnext
 204 fixabs:
 205         /* absolute fix: set location to (offset) symbol value */
 206         mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 207         add     r1, r10, r1             /* r1 <- address of symbol in table */
 208         ldr     r1, [r1, #4]            /* r1 <- symbol value */
 209         add     r1, r1, r9              /* r1 <- relocated sym addr */
 210         b       fixnext
 211 fixrel:
 212         /* relative fix: increase location by offset */
 213         ldr     r1, [r0]
 214         add     r1, r1, r9
 215 fixnext:
 216         str     r1, [r0]
 217         add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 218         cmp     r2, r3
 219         blo     fixloop
 220 #endif
 221
 222 clear_bss:
 223 #ifndef CONFIG_PRELOADER
 224         ldr     r0, _bss_start_ofs
 225         ldr     r1, _bss_end_ofs
 226         mov     r4, r6                  /* reloc addr */
 227         add     r0, r0, r4
 228         add     r1, r1, r4
 229         mov     r2, #0x00000000         /* clear                            */
 230
 231 clbss_l:str     r2, [r0]                /* clear loop...                    */
 232         add     r0, r0, #4
 233         cmp     r0, r1
 234         bne     clbss_l
 235
 236         bl coloured_LED_init
 237         bl red_LED_on
 238 #endif
 239
 240 /*
 241  * We are done. Do not return, instead branch to second part of board
 242  * initialization, now running from RAM.
 243  */
 244 #ifdef CONFIG_NAND_SPL
 245         ldr     r0, _nand_boot_ofs
 246         mov     pc, r0
 247
 248 _nand_boot_ofs:
 249         .word nand_boot
 250 #else
 251         ldr     r0, _board_init_r_ofs
 252         adr     r1, _start
 253         add     lr, r0, r1
 254         add     lr, lr, r9
 255         /* setup parameters for board_init_r */
 256         mov     r0, r5          /* gd_t */
 257         mov     r1, r6          /* dest_addr */
 258         /* jump to it ... */
 259         mov     pc, lr
 260
 261 _board_init_r_ofs:
 262         .word board_init_r - _start
 263 #endif
 264
 265 _rel_dyn_start_ofs:
 266         .word __rel_dyn_start - _start
 267 _rel_dyn_end_ofs:
 268         .word __rel_dyn_end - _start
 269 _dynsym_start_ofs:
 270         .word __dynsym_start - _start
 271
 272 /*
 273  *************************************************************************
 274  *
 275  * CPU_init_critical registers
 276  *
 277  * setup important registers
 278  * setup memory timing
 279  *
 280  *************************************************************************
 281  */
 282
 283 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 284 cpu_init_crit:
 285         /*  arm_int_generic assumes the ARM boot monitor, or user software,
 286          * has initialized the platform
 287          */
 288         mov     pc, lr          /* back to my caller */
 289 #endif
 290 /*
 291  *************************************************************************
 292  *
 293  * Interrupt handling
 294  *
 295  *************************************************************************
 296  */
 297
 298 @
 299 @ IRQ stack frame.
 300 @
 301 #define S_FRAME_SIZE    72
 302
 303 #define S_OLD_R0        68
 304 #define S_PSR           64
 305 #define S_PC            60
 306 #define S_LR            56
 307 #define S_SP            52
 308
 309 #define S_IP            48
 310 #define S_FP            44
 311 #define S_R10           40
 312 #define S_R9            36
 313 #define S_R8            32
 314 #define S_R7            28
 315 #define S_R6            24
 316 #define S_R5            20
 317 #define S_R4            16
 318 #define S_R3            12
 319 #define S_R2            8
 320 #define S_R1            4
 321 #define S_R0            0
 322
 323 #define MODE_SVC 0x13
 324 #define I_BIT    0x80
 325
 326 /*
 327  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 328  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 329  */
 330
 331         .macro  bad_save_user_regs
 332         @ carve out a frame on current user stack
 333         sub     sp, sp, #S_FRAME_SIZE
 334         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 335
 336         ldr     r2, IRQ_STACK_START_IN
 337         @ get values for "aborted" pc and cpsr (into parm regs)
 338         ldmia   r2, {r2 - r3}
 339         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 340         add     r5, sp, #S_SP
 341         mov     r1, lr
 342         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 343         mov     r0, sp          @ save current stack into r0 (param register)
 344         .endm
 345
 346         .macro  irq_save_user_regs
 347         sub     sp, sp, #S_FRAME_SIZE
 348         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 349         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 350         add     r8, sp, #S_PC
 351         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 352         str     lr, [r8, #0]            @ Save calling PC
 353         mrs     r6, spsr
 354         str     r6, [r8, #4]            @ Save CPSR
 355         str     r0, [r8, #8]            @ Save OLD_R0
 356         mov     r0, sp
 357         .endm
 358
 359         .macro  irq_restore_user_regs
 360         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 361         mov     r0, r0
 362         ldr     lr, [sp, #S_PC]                 @ Get PC
 363         add     sp, sp, #S_FRAME_SIZE
 364         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 365         .endm
 366
 367         .macro get_bad_stack
 368         ldr     r13, IRQ_STACK_START_IN         @ setup our mode stack
 369
 370         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 371         mrs     lr, spsr        @ get the spsr
 372         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 373         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 374         @ msr   spsr_c, r13
 375         msr     spsr, r13       @ switch modes, make sure moves will execute
 376         mov     lr, pc          @ capture return pc
 377         movs    pc, lr          @ jump to next instruction & switch modes.
 378         .endm
 379
 380         .macro get_irq_stack                    @ setup IRQ stack
 381         ldr     sp, IRQ_STACK_START
 382         .endm
 383
 384         .macro get_fiq_stack                    @ setup FIQ stack
 385         ldr     sp, FIQ_STACK_START
 386         .endm
 387
 388 /*
 389  * exception handlers
 390  */
 391         .align  5
 392 .globl undefined_instruction
 393 undefined_instruction:
 394         get_bad_stack
 395         bad_save_user_regs
 396         bl      do_undefined_instruction
 397
 398         .align  5
 399 .globl software_interrupt
 400 software_interrupt:
 401         get_bad_stack
 402         bad_save_user_regs
 403         bl      do_software_interrupt
 404
 405         .align  5
 406 .globl prefetch_abort
 407 prefetch_abort:
 408         get_bad_stack
 409         bad_save_user_regs
 410         bl      do_prefetch_abort
 411
 412         .align  5
 413 .globl data_abort
 414 data_abort:
 415         get_bad_stack
 416         bad_save_user_regs
 417         bl      do_data_abort
 418
 419         .align  5
 420 .globl not_used
 421 not_used:
 422         get_bad_stack
 423         bad_save_user_regs
 424         bl      do_not_used
 425
 426 #ifdef CONFIG_USE_IRQ
 427         .align  5
 428 .globl irq
 429 irq:
 430         get_irq_stack
 431         irq_save_user_regs
 432         bl      do_irq
 433         irq_restore_user_regs
 434
 435         .align  5
 436 .globl fiq
 437 fiq:
 438         get_fiq_stack
 439         /* someone ought to write a more effiction fiq_save_user_regs */
 440         irq_save_user_regs
 441         bl      do_fiq
 442         irq_restore_user_regs
 443
 444 #else
 445
 446         .align  5
 447 .globl irq
 448 irq:
 449         get_bad_stack
 450         bad_save_user_regs
 451         bl      do_irq
 452
 453         .align  5
 454 .globl fiq
 455 fiq:
 456         get_bad_stack
 457         bad_save_user_regs
 458         bl      do_fiq
 459
 460 #endif