arch/arm/cpu/arm_intcm/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <asm-offsets.h>
  34 #include <config.h>
  35 #include <version.h>
  36
  37 /*
  38  *************************************************************************
  39  *
  40  * Jump vector table
  41  *
  42  *************************************************************************
  43  */
  44
  45 .globl _start
  46 _start:
  47         b       reset
  48         ldr     pc, _undefined_instruction
  49         ldr     pc, _software_interrupt
  50         ldr     pc, _prefetch_abort
  51         ldr     pc, _data_abort
  52         ldr     pc, _not_used
  53         ldr     pc, _irq
  54         ldr     pc, _fiq
  55
  56 _undefined_instruction:
  57         .word undefined_instruction
  58 _software_interrupt:
  59         .word software_interrupt
  60 _prefetch_abort:
  61         .word prefetch_abort
  62 _data_abort:
  63         .word data_abort
  64 _not_used:
  65         .word not_used
  66 _irq:
  67         .word irq
  68 _fiq:
  69         .word fiq
  70
  71         .balignl 16,0xdeadbeef
  72
  73 /*
  74  *************************************************************************
  75  *
  76  * Startup Code (reset vector)
  77  *
  78  * do important init only if we don't start from memory!
  79  * setup memory and board specific bits prior to relocation.
  80  * relocate armboot to ram
  81  * setup stack
  82  *
  83  *************************************************************************
  84  */
  85
  86 .globl _TEXT_BASE
  87 _TEXT_BASE:
  88         .word   CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
  89
  90 /*
  91  * These are defined in the board-specific linker script.
  92  * Subtracting _start from them lets the linker put their
  93  * relative position in the executable instead of leaving
  94  * them null.
  95  */
  96 .globl _bss_start_ofs
  97 _bss_start_ofs:
  98         .word __bss_start - _start
  99
 100 .globl _bss_end_ofs
 101 _bss_end_ofs:
 102         .word __bss_end__ - _start
 103
 104 .globl _end_ofs
 105 _end_ofs:
 106         .word _end - _start
 107
 108 #ifdef CONFIG_USE_IRQ
 109 /* IRQ stack memory (calculated at run-time) */
 110 .globl IRQ_STACK_START
 111 IRQ_STACK_START:
 112         .word   0x0badc0de
 113
 114 /* IRQ stack memory (calculated at run-time) */
 115 .globl FIQ_STACK_START
 116 FIQ_STACK_START:
 117         .word 0x0badc0de
 118 #endif
 119
 120 /* IRQ stack memory (calculated at run-time) + 8 bytes */
 121 .globl IRQ_STACK_START_IN
 122 IRQ_STACK_START_IN:
 123         .word   0x0badc0de
 124
 125 /*
 126  * the actual reset code
 127  */
 128
 129 reset:
 130         /*
 131          * set the cpu to SVC32 mode
 132          */
 133         mrs     r0,cpsr
 134         bic     r0,r0,#0x1f
 135         orr     r0,r0,#0xd3
 136         msr     cpsr,r0
 137
 138         /*
 139          * we do sys-critical inits only at reboot,
 140          * not when booting from ram!
 141          */
 142 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 143         bl      cpu_init_crit
 144 #endif
 145
 146 /* Set stackpointer in internal RAM to call board_init_f */
 147 call_board_init_f:
 148         ldr     sp, =(CONFIG_SYS_INIT_SP_ADDR)
 149         bic     sp, sp, #7 /* 8-byte alignment for ABI compliance */
 150         ldr     r0,=0x00000000
 151         bl      board_init_f
 152
 153 /*------------------------------------------------------------------------------*/
 154
 155 /*
 156  * void relocate_code (addr_sp, gd, addr_moni)
 157  *
 158  * This "function" does not return, instead it continues in RAM
 159  * after relocating the monitor code.
 160  *
 161  */
 162         .globl  relocate_code
 163 relocate_code:
 164         mov     r4, r0  /* save addr_sp */
 165         mov     r5, r1  /* save addr of gd */
 166         mov     r6, r2  /* save addr of destination */
 167
 168         /* Set up the stack                                                 */
 169 stack_setup:
 170         mov     sp, r4
 171
 172         adr     r0, _start
 173         cmp     r0, r6
 174         beq     clear_bss               /* skip relocation */
 175         mov     r1, r6                  /* r1 <- scratch for copy_loop */
 176         ldr     r3, _bss_start_ofs
 177         add     r2, r0, r3              /* r2 <- source end address         */
 178
 179 copy_loop:
 180         ldmia   r0!, {r9-r10}           /* copy from source address [r0]    */
 181         stmia   r1!, {r9-r10}           /* copy to   target address [r1]    */
 182         cmp     r0, r2                  /* until source end address [r2]    */
 183         blo     copy_loop
 184
 185 #ifndef CONFIG_PRELOADER
 186         /*
 187          * fix .rel.dyn relocations
 188          */
 189         ldr     r0, _TEXT_BASE          /* r0 <- Text base */
 190         sub     r9, r6, r0              /* r9 <- relocation offset */
 191         ldr     r10, _dynsym_start_ofs  /* r10 <- sym table ofs */
 192         add     r10, r10, r0            /* r10 <- sym table in FLASH */
 193         ldr     r2, _rel_dyn_start_ofs  /* r2 <- rel dyn start ofs */
 194         add     r2, r2, r0              /* r2 <- rel dyn start in FLASH */
 195         ldr     r3, _rel_dyn_end_ofs    /* r3 <- rel dyn end ofs */
 196         add     r3, r3, r0              /* r3 <- rel dyn end in FLASH */
 197 fixloop:
 198         ldr     r0, [r2]                /* r0 <- location to fix up, IN FLASH! */
 199         add     r0, r0, r9              /* r0 <- location to fix up in RAM */
 200         ldr     r1, [r2, #4]
 201         and     r7, r1, #0xff
 202         cmp     r7, #23                 /* relative fixup? */
 203         beq     fixrel
 204         cmp     r7, #2                  /* absolute fixup? */
 205         beq     fixabs
 206         /* ignore unknown type of fixup */
 207         b       fixnext
 208 fixabs:
 209         /* absolute fix: set location to (offset) symbol value */
 210         mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
 211         add     r1, r10, r1             /* r1 <- address of symbol in table */
 212         ldr     r1, [r1, #4]            /* r1 <- symbol value */
 213         add     r1, r1, r9              /* r1 <- relocated sym addr */
 214         b       fixnext
 215 fixrel:
 216         /* relative fix: increase location by offset */
 217         ldr     r1, [r0]
 218         add     r1, r1, r9
 219 fixnext:
 220         str     r1, [r0]
 221         add     r2, r2, #8              /* each rel.dyn entry is 8 bytes */
 222         cmp     r2, r3
 223         blo     fixloop
 224 #endif
 225
 226 clear_bss:
 227 #ifndef CONFIG_PRELOADER
 228         ldr     r0, _bss_start_ofs
 229         ldr     r1, _bss_end_ofs
 230         mov     r4, r6                  /* reloc addr */
 231         add     r0, r0, r4
 232         add     r1, r1, r4
 233         mov     r2, #0x00000000         /* clear                            */
 234
 235 clbss_l:str     r2, [r0]                /* clear loop...                    */
 236         add     r0, r0, #4
 237         cmp     r0, r1
 238         bne     clbss_l
 239
 240         bl coloured_LED_init
 241         bl red_LED_on
 242 #endif
 243
 244 /*
 245  * We are done. Do not return, instead branch to second part of board
 246  * initialization, now running from RAM.
 247  */
 248 #ifdef CONFIG_NAND_SPL
 249         ldr     r0, _nand_boot_ofs
 250         mov     pc, r0
 251
 252 _nand_boot_ofs:
 253         .word nand_boot
 254 #else
 255         ldr     r0, _board_init_r_ofs
 256         adr     r1, _start
 257         add     lr, r0, r1
 258         add     lr, lr, r9
 259         /* setup parameters for board_init_r */
 260         mov     r0, r5          /* gd_t */
 261         mov     r1, r6          /* dest_addr */
 262         /* jump to it ... */
 263         mov     pc, lr
 264
 265 _board_init_r_ofs:
 266         .word board_init_r - _start
 267 #endif
 268
 269 _rel_dyn_start_ofs:
 270         .word __rel_dyn_start - _start
 271 _rel_dyn_end_ofs:
 272         .word __rel_dyn_end - _start
 273 _dynsym_start_ofs:
 274         .word __dynsym_start - _start
 275
 276 /*
 277  *************************************************************************
 278  *
 279  * CPU_init_critical registers
 280  *
 281  * setup important registers
 282  * setup memory timing
 283  *
 284  *************************************************************************
 285  */
 286
 287 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 288 cpu_init_crit:
 289         /*  arm_int_generic assumes the ARM boot monitor, or user software,
 290          * has initialized the platform
 291          */
 292         mov     pc, lr          /* back to my caller */
 293 #endif
 294 /*
 295  *************************************************************************
 296  *
 297  * Interrupt handling
 298  *
 299  *************************************************************************
 300  */
 301
 302 @
 303 @ IRQ stack frame.
 304 @
 305 #define S_FRAME_SIZE    72
 306
 307 #define S_OLD_R0        68
 308 #define S_PSR           64
 309 #define S_PC            60
 310 #define S_LR            56
 311 #define S_SP            52
 312
 313 #define S_IP            48
 314 #define S_FP            44
 315 #define S_R10           40
 316 #define S_R9            36
 317 #define S_R8            32
 318 #define S_R7            28
 319 #define S_R6            24
 320 #define S_R5            20
 321 #define S_R4            16
 322 #define S_R3            12
 323 #define S_R2            8
 324 #define S_R1            4
 325 #define S_R0            0
 326
 327 #define MODE_SVC 0x13
 328 #define I_BIT    0x80
 329
 330 /*
 331  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 332  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 333  */
 334
 335         .macro  bad_save_user_regs
 336         @ carve out a frame on current user stack
 337         sub     sp, sp, #S_FRAME_SIZE
 338         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 339
 340         ldr     r2, IRQ_STACK_START_IN
 341         @ get values for "aborted" pc and cpsr (into parm regs)
 342         ldmia   r2, {r2 - r3}
 343         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 344         add     r5, sp, #S_SP
 345         mov     r1, lr
 346         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 347         mov     r0, sp          @ save current stack into r0 (param register)
 348         .endm
 349
 350         .macro  irq_save_user_regs
 351         sub     sp, sp, #S_FRAME_SIZE
 352         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 353         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 354         add     r8, sp, #S_PC
 355         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 356         str     lr, [r8, #0]            @ Save calling PC
 357         mrs     r6, spsr
 358         str     r6, [r8, #4]            @ Save CPSR
 359         str     r0, [r8, #8]            @ Save OLD_R0
 360         mov     r0, sp
 361         .endm
 362
 363         .macro  irq_restore_user_regs
 364         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 365         mov     r0, r0
 366         ldr     lr, [sp, #S_PC]                 @ Get PC
 367         add     sp, sp, #S_FRAME_SIZE
 368         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 369         .endm
 370
 371         .macro get_bad_stack
 372         ldr     r13, IRQ_STACK_START_IN         @ setup our mode stack
 373
 374         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 375         mrs     lr, spsr        @ get the spsr
 376         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 377         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 378         @ msr   spsr_c, r13
 379         msr     spsr, r13       @ switch modes, make sure moves will execute
 380         mov     lr, pc          @ capture return pc
 381         movs    pc, lr          @ jump to next instruction & switch modes.
 382         .endm
 383
 384         .macro get_irq_stack                    @ setup IRQ stack
 385         ldr     sp, IRQ_STACK_START
 386         .endm
 387
 388         .macro get_fiq_stack                    @ setup FIQ stack
 389         ldr     sp, FIQ_STACK_START
 390         .endm
 391
 392 /*
 393  * exception handlers
 394  */
 395         .align  5
 396 .globl undefined_instruction
 397 undefined_instruction:
 398         get_bad_stack
 399         bad_save_user_regs
 400         bl      do_undefined_instruction
 401
 402         .align  5
 403 .globl software_interrupt
 404 software_interrupt:
 405         get_bad_stack
 406         bad_save_user_regs
 407         bl      do_software_interrupt
 408
 409         .align  5
 410 .globl prefetch_abort
 411 prefetch_abort:
 412         get_bad_stack
 413         bad_save_user_regs
 414         bl      do_prefetch_abort
 415
 416         .align  5
 417 .globl data_abort
 418 data_abort:
 419         get_bad_stack
 420         bad_save_user_regs
 421         bl      do_data_abort
 422
 423         .align  5
 424 .globl not_used
 425 not_used:
 426         get_bad_stack
 427         bad_save_user_regs
 428         bl      do_not_used
 429
 430 #ifdef CONFIG_USE_IRQ
 431         .align  5
 432 .globl irq
 433 irq:
 434         get_irq_stack
 435         irq_save_user_regs
 436         bl      do_irq
 437         irq_restore_user_regs
 438
 439         .align  5
 440 .globl fiq
 441 fiq:
 442         get_fiq_stack
 443         /* someone ought to write a more effiction fiq_save_user_regs */
 444         irq_save_user_regs
 445         bl      do_fiq
 446         irq_restore_user_regs
 447
 448 #else
 449
 450         .align  5
 451 .globl irq
 452 irq:
 453         get_bad_stack
 454         bad_save_user_regs
 455         bl      do_irq
 456
 457         .align  5
 458 .globl fiq
 459 fiq:
 460         get_bad_stack
 461         bad_save_user_regs
 462         bl      do_fiq
 463
 464 #endif