arch/arm/cpu/armv7/ls102xa/timer.c

   1 /*
   2  * Copyright 2014 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <asm/io.h>
   9 #include <div64.h>
  10 #include <asm/arch/immap_ls102xa.h>
  11 #include <asm/arch/clock.h>
  12
  13 DECLARE_GLOBAL_DATA_PTR;
  14
  15 /*
  16  * This function is intended for SHORT delays only.
  17  * It will overflow at around 10 seconds @ 400MHz,
  18  * or 20 seconds @ 200MHz.
  19  */
  20 unsigned long usec2ticks(unsigned long usec)
  21 {
  22         ulong ticks;
  23
  24         if (usec < 1000)
  25                 ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  26         else
  27                 ticks = ((usec / 10) * (get_tbclk() / 100000));
  28
  29         return ticks;
  30 }
  31
  32 static inline unsigned long long tick_to_time(unsigned long long tick)
  33 {
  34         unsigned long freq;
  35
  36         asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  37
  38         tick *= CONFIG_SYS_HZ;
  39         do_div(tick, freq);
  40
  41         return tick;
  42 }
  43
  44 static inline unsigned long long us_to_tick(unsigned long long usec)
  45 {
  46         unsigned long freq;
  47
  48         asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  49
  50         usec = usec * freq  + 999999;
  51         do_div(usec, 1000000);
  52
  53         return usec;
  54 }
  55
  56 int timer_init(void)
  57 {
  58         struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
  59         unsigned long ctrl, freq;
  60         unsigned long long val;
  61
  62         /* Enable System Counter */
  63         writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
  64
  65         freq = COUNTER_FREQUENCY;
  66         asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
  67
  68         /* Set PL1 Physical Timer Ctrl */
  69         ctrl = ARCH_TIMER_CTRL_ENABLE;
  70         asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl));
  71
  72         /* Set PL1 Physical Comp Value */
  73         val = TIMER_COMP_VAL;
  74         asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val));
  75
  76         gd->arch.tbl = 0;
  77         gd->arch.tbu = 0;
  78
  79         return 0;
  80 }
  81
  82 unsigned long long get_ticks(void)
  83 {
  84         unsigned long long now;
  85
  86         asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
  87
  88         gd->arch.tbl = (unsigned long)(now & 0xffffffff);
  89         gd->arch.tbu = (unsigned long)(now >> 32);
  90
  91         return now;
  92 }
  93
  94 unsigned long get_timer_masked(void)
  95 {
  96         return tick_to_time(get_ticks());
  97 }
  98
  99 unsigned long get_timer(ulong base)
 100 {
 101         return get_timer_masked() - base;
 102 }
 103
 104 /* delay x useconds and preserve advance timstamp value */
 105 void __udelay(unsigned long usec)
 106 {
 107         unsigned long long start;
 108         unsigned long tmo;
 109
 110         start = get_ticks();                    /* get current timestamp */
 111         tmo = us_to_tick(usec);                 /* convert usecs to ticks */
 112
 113         while ((get_ticks() - start) < tmo)
 114                 ;                               /* loop till time has passed */
 115 }
 116
 117 /*
 118  * This function is derived from PowerPC code (timebase clock frequency).
 119  * On ARM it returns the number of timer ticks per second.
 120  */
 121 unsigned long get_tbclk(void)
 122 {
 123         unsigned long freq;
 124
 125         asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
 126
 127         return freq;
 128 }