arch/arm/cpu/armv7/omap3/sys_info.c

   1 /*
   2  * (C) Copyright 2008
   3  * Texas Instruments, <www.ti.com>
   4  *
   5  * Author :
   6  *      Manikandan Pillai <mani.pillai@ti.com>
   7  *
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <asm/io.h>
  30 #include <asm/arch/mem.h>       /* get mem tables */
  31 #include <asm/arch/sys_proto.h>
  32 #include <i2c.h>
  33
  34 extern omap3_sysinfo sysinfo;
  35 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  36 static char *rev_s[CPU_3XX_MAX_REV] = {
  37                                 "1.0",
  38                                 "2.0",
  39                                 "2.1",
  40                                 "3.0",
  41                                 "3.1",
  42                                 "UNKNOWN",
  43                                 "UNKNOWN",
  44                                 "3.1.2"};
  45
  46 /*****************************************************************
  47  * dieid_num_r(void) - read and set die ID
  48  *****************************************************************/
  49 void dieid_num_r(void)
  50 {
  51         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
  52         char *uid_s, die_id[34];
  53         u32 id[4];
  54
  55         memset(die_id, 0, sizeof(die_id));
  56
  57         uid_s = getenv("dieid#");
  58
  59         if (uid_s == NULL) {
  60                 id[3] = readl(&id_base->die_id_0);
  61                 id[2] = readl(&id_base->die_id_1);
  62                 id[1] = readl(&id_base->die_id_2);
  63                 id[0] = readl(&id_base->die_id_3);
  64                 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
  65                 setenv("dieid#", die_id);
  66                 uid_s = die_id;
  67         }
  68
  69         printf("Die ID #%s\n", uid_s);
  70 }
  71
  72 /******************************************
  73  * get_cpu_type(void) - extract cpu info
  74  ******************************************/
  75 u32 get_cpu_type(void)
  76 {
  77         return readl(&ctrl_base->ctrl_omap_stat);
  78 }
  79
  80 /******************************************
  81  * get_cpu_id(void) - extract cpu id
  82  * returns 0 for ES1.0, cpuid otherwise
  83  ******************************************/
  84 u32 get_cpu_id(void)
  85 {
  86         struct ctrl_id *id_base;
  87         u32 cpuid = 0;
  88
  89         /*
  90          * On ES1.0 the IDCODE register is not exposed on L4
  91          * so using CPU ID to differentiate between ES1.0 and > ES1.0.
  92          */
  93         __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
  94         if ((cpuid & 0xf) == 0x0) {
  95                 return 0;
  96         } else {
  97                 /* Decode the IDs on > ES1.0 */
  98                 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
  99
 100                 cpuid = readl(&id_base->idcode);
 101         }
 102
 103         return cpuid;
 104 }
 105
 106 /******************************************
 107  * get_cpu_family(void) - extract cpu info
 108  ******************************************/
 109 u32 get_cpu_family(void)
 110 {
 111         u16 hawkeye;
 112         u32 cpu_family;
 113         u32 cpuid = get_cpu_id();
 114
 115         if (cpuid == 0)
 116                 return CPU_OMAP34XX;
 117
 118         hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
 119         switch (hawkeye) {
 120         case HAWKEYE_OMAP34XX:
 121                 cpu_family = CPU_OMAP34XX;
 122                 break;
 123         case HAWKEYE_AM35XX:
 124                 cpu_family = CPU_AM35XX;
 125                 break;
 126         case HAWKEYE_OMAP36XX:
 127                 cpu_family = CPU_OMAP36XX;
 128                 break;
 129         default:
 130                 cpu_family = CPU_OMAP34XX;
 131         }
 132
 133         return cpu_family;
 134 }
 135
 136 /******************************************
 137  * get_cpu_rev(void) - extract version info
 138  ******************************************/
 139 u32 get_cpu_rev(void)
 140 {
 141         u32 cpuid = get_cpu_id();
 142
 143         if (cpuid == 0)
 144                 return CPU_3XX_ES10;
 145         else
 146                 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
 147 }
 148
 149 /*****************************************************************
 150  * get_sku_id(void) - read sku_id to get info on max clock rate
 151  *****************************************************************/
 152 u32 get_sku_id(void)
 153 {
 154         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
 155         return readl(&id_base->sku_id) & SKUID_CLK_MASK;
 156 }
 157
 158 /***************************************************************************
 159  *  get_gpmc0_base() - Return current address hardware will be
 160  *     fetching from. The below effectively gives what is correct, its a bit
 161  *   mis-leading compared to the TRM.  For the most general case the mask
 162  *   needs to be also taken into account this does work in practice.
 163  *   - for u-boot we currently map:
 164  *       -- 0 to nothing,
 165  *       -- 4 to flash
 166  *       -- 8 to enent
 167  *       -- c to wifi
 168  ****************************************************************************/
 169 u32 get_gpmc0_base(void)
 170 {
 171         u32 b;
 172
 173         b = readl(&gpmc_cfg->cs[0].config7);
 174         b &= 0x1F;              /* keep base [5:0] */
 175         b = b << 24;            /* ret 0x0b000000 */
 176         return b;
 177 }
 178
 179 /*******************************************************************
 180  * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
 181  *******************************************************************/
 182 u32 get_gpmc0_width(void)
 183 {
 184         return WIDTH_16BIT;
 185 }
 186
 187 /*************************************************************************
 188  * get_board_rev() - setup to pass kernel board revision information
 189  * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
 190  *************************************************************************/
 191 u32 get_board_rev(void)
 192 {
 193         return 0x20;
 194 }
 195
 196 /********************************************************
 197  *  get_base(); get upper addr of current execution
 198  *******************************************************/
 199 u32 get_base(void)
 200 {
 201         u32 val;
 202
 203         __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
 204         val &= 0xF0000000;
 205         val >>= 28;
 206         return val;
 207 }
 208
 209 /********************************************************
 210  *  is_running_in_flash() - tell if currently running in
 211  *  FLASH.
 212  *******************************************************/
 213 u32 is_running_in_flash(void)
 214 {
 215         if (get_base() < 4)
 216                 return 1;       /* in FLASH */
 217
 218         return 0;               /* running in SRAM or SDRAM */
 219 }
 220
 221 /********************************************************
 222  *  is_running_in_sram() - tell if currently running in
 223  *  SRAM.
 224  *******************************************************/
 225 u32 is_running_in_sram(void)
 226 {
 227         if (get_base() == 4)
 228                 return 1;       /* in SRAM */
 229
 230         return 0;               /* running in FLASH or SDRAM */
 231 }
 232
 233 /********************************************************
 234  *  is_running_in_sdram() - tell if currently running in
 235  *  SDRAM.
 236  *******************************************************/
 237 u32 is_running_in_sdram(void)
 238 {
 239         if (get_base() > 4)
 240                 return 1;       /* in SDRAM */
 241
 242         return 0;               /* running in SRAM or FLASH */
 243 }
 244
 245 /***************************************************************
 246  *  get_boot_type() - Is this an XIP type device or a stream one
 247  *  bits 4-0 specify type. Bit 5 says mem/perif
 248  ***************************************************************/
 249 u32 get_boot_type(void)
 250 {
 251         return (readl(&ctrl_base->status) & SYSBOOT_MASK);
 252 }
 253
 254 /*************************************************************
 255  *  get_device_type(): tell if GP/HS/EMU/TST
 256  *************************************************************/
 257 u32 get_device_type(void)
 258 {
 259         return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
 260 }
 261
 262 #ifdef CONFIG_DISPLAY_CPUINFO
 263 /**
 264  * Print CPU information
 265  */
 266 int print_cpuinfo (void)
 267 {
 268         char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
 269
 270         switch (get_cpu_family()) {
 271         case CPU_OMAP34XX:
 272                 cpu_family_s = "OMAP";
 273                 switch (get_cpu_type()) {
 274                 case OMAP3503:
 275                         cpu_s = "3503";
 276                         break;
 277                 case OMAP3515:
 278                         cpu_s = "3515";
 279                         break;
 280                 case OMAP3525:
 281                         cpu_s = "3525";
 282                         break;
 283                 case OMAP3530:
 284                         cpu_s = "3530";
 285                         break;
 286                 default:
 287                         cpu_s = "35XX";
 288                         break;
 289                 }
 290                 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
 291                     (get_sku_id() == SKUID_CLK_720MHZ))
 292                         max_clk = "720 mHz";
 293                 else
 294                         max_clk = "600 mHz";
 295
 296                 break;
 297         case CPU_AM35XX:
 298                 cpu_family_s = "AM";
 299                 switch (get_cpu_type()) {
 300                 case AM3505:
 301                         cpu_s = "3505";
 302                         break;
 303                 case AM3517:
 304                         cpu_s = "3517";
 305                         break;
 306                 default:
 307                         cpu_s = "35XX";
 308                         break;
 309                 }
 310                 max_clk = "600 Mhz";
 311                 break;
 312         case CPU_OMAP36XX:
 313                 cpu_family_s = "OMAP";
 314                 switch (get_cpu_type()) {
 315                 case OMAP3730:
 316                         cpu_s = "3630/3730";
 317                         break;
 318                 default:
 319                         cpu_s = "36XX/37XX";
 320                         break;
 321                 }
 322                 max_clk = "1 Ghz";
 323                 break;
 324         default:
 325                 cpu_family_s = "OMAP";
 326                 cpu_s = "35XX";
 327                 max_clk = "600 Mhz";
 328         }
 329
 330         switch (get_device_type()) {
 331         case TST_DEVICE:
 332                 sec_s = "TST";
 333                 break;
 334         case EMU_DEVICE:
 335                 sec_s = "EMU";
 336                 break;
 337         case HS_DEVICE:
 338                 sec_s = "HS";
 339                 break;
 340         case GP_DEVICE:
 341                 sec_s = "GP";
 342                 break;
 343         default:
 344                 sec_s = "?";
 345         }
 346
 347         printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
 348                         cpu_family_s, cpu_s, sec_s,
 349                         rev_s[get_cpu_rev()], max_clk);
 350
 351         return 0;
 352 }
 353 #endif  /* CONFIG_DISPLAY_CPUINFO */