arch/arm/cpu/armv8/fsl-layerscape/fdt.c

   1 /*
   2  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <libfdt.h>
   9 #include <fdt_support.h>
  10 #include <phy.h>
  11 #ifdef CONFIG_FSL_LSCH3
  12 #include <asm/arch/fdt.h>
  13 #endif
  14 #ifdef CONFIG_FSL_ESDHC
  15 #include <fsl_esdhc.h>
  16 #endif
  17 #ifdef CONFIG_SYS_DPAA_FMAN
  18 #include <fsl_fman.h>
  19 #endif
  20 #ifdef CONFIG_MP
  21 #include <asm/arch/mp.h>
  22 #endif
  23 #include <fsl_sec.h>
  24 #include <asm/arch-fsl-layerscape/soc.h>
  25
  26 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
  27 {
  28         return fdt_setprop_string(blob, offset, "phy-connection-type",
  29                                          phy_string_for_interface(phyc));
  30 }
  31
  32 #ifdef CONFIG_MP
  33 void ft_fixup_cpu(void *blob)
  34 {
  35         int off;
  36         __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  37         fdt32_t *reg;
  38         int addr_cells;
  39         u64 val, core_id;
  40         size_t *boot_code_size = &(__secondary_boot_code_size);
  41
  42         off = fdt_path_offset(blob, "/cpus");
  43         if (off < 0) {
  44                 puts("couldn't find /cpus node\n");
  45                 return;
  46         }
  47         of_bus_default_count_cells(blob, off, &addr_cells, NULL);
  48
  49         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  50         while (off != -FDT_ERR_NOTFOUND) {
  51                 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  52                 if (reg) {
  53                         core_id = of_read_number(reg, addr_cells);
  54                         if (core_id  == 0 || (is_core_online(core_id))) {
  55                                 val = spin_tbl_addr;
  56                                 val += id_to_core(core_id) *
  57                                        SPIN_TABLE_ELEM_SIZE;
  58                                 val = cpu_to_fdt64(val);
  59                                 fdt_setprop_string(blob, off, "enable-method",
  60                                                    "spin-table");
  61                                 fdt_setprop(blob, off, "cpu-release-addr",
  62                                             &val, sizeof(val));
  63                         } else {
  64                                 debug("skipping offline core\n");
  65                         }
  66                 } else {
  67                         puts("Warning: found cpu node without reg property\n");
  68                 }
  69                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
  70                                                     "cpu", 4);
  71         }
  72
  73         fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
  74                         *boot_code_size);
  75 }
  76 #endif
  77
  78 void ft_cpu_setup(void *blob, bd_t *bd)
  79 {
  80 #ifdef CONFIG_FSL_LSCH2
  81         struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  82         unsigned int svr = in_be32(&gur->svr);
  83
  84         /* delete crypto node if not on an E-processor */
  85         if (!IS_E_PROCESSOR(svr))
  86                 fdt_fixup_crypto_node(blob, 0);
  87 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
  88         else {
  89                 ccsr_sec_t __iomem *sec;
  90
  91                 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  92                 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
  93         }
  94 #endif
  95 #endif
  96
  97 #ifdef CONFIG_MP
  98         ft_fixup_cpu(blob);
  99 #endif
 100
 101 #ifdef CONFIG_SYS_NS16550
 102         do_fixup_by_compat_u32(blob, "fsl,ns16550",
 103                                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 104 #endif
 105
 106         do_fixup_by_compat_u32(blob, "fixed-clock",
 107                                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 108
 109 #ifdef CONFIG_PCI
 110         ft_pci_setup(blob, bd);
 111 #endif
 112
 113 #ifdef CONFIG_FSL_ESDHC
 114         fdt_fixup_esdhc(blob, bd);
 115 #endif
 116
 117 #ifdef CONFIG_SYS_DPAA_FMAN
 118         fdt_fixup_fman_firmware(blob);
 119 #endif
 120 }