2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/hardware.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/armv8/mmu.h>
14 #define ZYNQ_SILICON_VER_MASK 0xF000
15 #define ZYNQ_SILICON_VER_SHIFT 12
17 DECLARE_GLOBAL_DATA_PTR
;
19 static struct mm_region zynqmp_mem_map
[] = {
24 .attrs
= PTE_BLOCK_MEMTYPE(MT_NORMAL
) |
30 .attrs
= PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE
) |
32 PTE_BLOCK_PXN
| PTE_BLOCK_UXN
37 .attrs
= PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE
) |
39 PTE_BLOCK_PXN
| PTE_BLOCK_UXN
41 #if defined(CONFIG_DEFINE_TCM_OCM_MMAP)
45 .attrs
= PTE_BLOCK_MEMTYPE(MT_NORMAL
) |
49 .virt
= 0x400000000UL
,
50 .phys
= 0x400000000UL
,
51 .size
= 0x200000000UL
,
52 .attrs
= PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE
) |
54 PTE_BLOCK_PXN
| PTE_BLOCK_UXN
56 .virt
= 0x600000000UL
,
57 .phys
= 0x600000000UL
,
58 .size
= 0x800000000UL
,
59 .attrs
= PTE_BLOCK_MEMTYPE(MT_NORMAL
) |
62 .virt
= 0xe00000000UL
,
63 .phys
= 0xe00000000UL
,
64 .size
= 0xf200000000UL
,
65 .attrs
= PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE
) |
67 PTE_BLOCK_PXN
| PTE_BLOCK_UXN
73 struct mm_region
*mem_map
= zynqmp_mem_map
;
75 u64
get_page_table_size(void)
80 static unsigned int zynqmp_get_silicon_version_secure(void)
84 ver
= readl(&csu_base
->version
);
85 ver
&= ZYNQMP_SILICON_VER_MASK
;
86 ver
>>= ZYNQMP_SILICON_VER_SHIFT
;
91 unsigned int zynqmp_get_silicon_version(void)
93 if (current_el() == 3)
94 return zynqmp_get_silicon_version_secure();
96 gd
->cpu_clk
= get_tbclk();
98 switch (gd
->cpu_clk
) {
100 return ZYNQMP_CSU_VERSION_VELOCE
;
102 return ZYNQMP_CSU_VERSION_QEMU
;
104 return ZYNQMP_CSU_VERSION_EP108
;
107 return ZYNQMP_CSU_VERSION_SILICON
;
110 #define ZYNQMP_MMIO_READ 0xC2000014
111 #define ZYNQMP_MMIO_WRITE 0xC2000013
113 #ifndef CONFIG_SPL_BUILD
114 int invoke_smc(u32 pm_api_id
, u32 arg0
, u32 arg1
, u32 arg2
, u32 arg3
,
118 * Added SIP service call Function Identifier
119 * Make sure to stay in x0 register
123 regs
.regs
[0] = pm_api_id
;
124 regs
.regs
[1] = ((u64
)arg1
<< 32) | arg0
;
125 regs
.regs
[2] = ((u64
)arg3
<< 32) | arg2
;
129 if (ret_payload
!= NULL
) {
130 ret_payload
[0] = (u32
)regs
.regs
[0];
131 ret_payload
[1] = upper_32_bits(regs
.regs
[0]);
132 ret_payload
[2] = (u32
)regs
.regs
[1];
133 ret_payload
[3] = upper_32_bits(regs
.regs
[1]);
134 ret_payload
[4] = (u32
)regs
.regs
[2];
140 #define ZYNQMP_SIP_SVC_GET_API_VERSION 0xC2000001
142 #define ZYNQMP_PM_VERSION_MAJOR 0
143 #define ZYNQMP_PM_VERSION_MINOR 3
144 #define ZYNQMP_PM_VERSION_MAJOR_SHIFT 16
145 #define ZYNQMP_PM_VERSION_MINOR_MASK 0xFFFF
147 #define ZYNQMP_PM_VERSION \
148 ((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
149 ZYNQMP_PM_VERSION_MINOR)
151 #if defined(CONFIG_CLK_ZYNQMP)
152 void zynqmp_pmufw_version(void)
155 u32 ret_payload
[PAYLOAD_ARG_CNT
];
158 ret
= invoke_smc(ZYNQMP_SIP_SVC_GET_API_VERSION
, 0, 0, 0, 0,
160 pm_api_version
= ret_payload
[1];
163 panic("PMUFW is not found - Please load it!\n");
165 printf("PMUFW:\tv%d.%d\n",
166 pm_api_version
>> ZYNQMP_PM_VERSION_MAJOR_SHIFT
,
167 pm_api_version
& ZYNQMP_PM_VERSION_MINOR_MASK
);
169 if (pm_api_version
!= ZYNQMP_PM_VERSION
)
170 panic("PMUFW version error. Expected: v%d.%d\n",
171 ZYNQMP_PM_VERSION_MAJOR
, ZYNQMP_PM_VERSION_MINOR
);
175 int zynqmp_mmio_write(const u32 address
,
179 return invoke_smc(ZYNQMP_MMIO_WRITE
, address
, mask
, value
, 0, NULL
);
182 int zynqmp_mmio_read(const u32 address
, u32
*value
)
184 u32 ret_payload
[PAYLOAD_ARG_CNT
];
190 ret
= invoke_smc(ZYNQMP_MMIO_READ
, address
, 0, 0, 0, ret_payload
);
191 *value
= ret_payload
[1];
196 int zynqmp_mmio_write(const u32 address
,
201 u32 value_local
= value
;
203 zynqmp_mmio_read(address
, &data
);
207 writel(value_local
, (ulong
)address
);
211 int zynqmp_mmio_read(const u32 address
, u32
*value
)
213 *value
= readl((ulong
)address
);