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[people/ms/u-boot.git] / arch / arm / cpu / tegra124-common / pinmux.c
1 /*
2 * (C) Copyright 2013
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 /* Tegra124 pin multiplexing functions */
9
10 #include <common.h>
11 #include <asm/io.h>
12 #include <asm/arch/pinmux.h>
13
14 /* Convenient macro for defining pin group properties */
15 #define PIN(pg_name, vdd, f0, f1, f2, f3, iod) \
16 { \
17 .funcs = { \
18 PMUX_FUNC_ ## f0, \
19 PMUX_FUNC_ ## f1, \
20 PMUX_FUNC_ ## f2, \
21 PMUX_FUNC_ ## f3, \
22 }, \
23 }
24
25 /* Input and output pins */
26 #define PINI(pg_name, vdd, f0, f1, f2, f3) \
27 PIN(pg_name, vdd, f0, f1, f2, f3, INPUT)
28 #define PINO(pg_name, vdd, f0, f1, f2, f3) \
29 PIN(pg_name, vdd, f0, f1, f2, f3, OUTPUT)
30
31 /* A pin group number which is not used */
32 #define PIN_RESERVED \
33 PIN(NONE, NONE, INVALID, INVALID, INVALID, INVALID, NONE)
34
35 static const struct tegra_pingroup_desc tegra124_pingroups[PINGRP_COUNT] = {
36 /* NAME VDD f0 f1 f2 f3 */
37 PINI(ULPI_DATA0, BB, SPI3, HSI, UARTA, ULPI),
38 PINI(ULPI_DATA1, BB, SPI3, HSI, UARTA, ULPI),
39 PINI(ULPI_DATA2, BB, SPI3, HSI, UARTA, ULPI),
40 PINI(ULPI_DATA3, BB, SPI3, HSI, UARTA, ULPI),
41 PINI(ULPI_DATA4, BB, SPI2, HSI, UARTA, ULPI),
42 PINI(ULPI_DATA5, BB, SPI2, HSI, UARTA, ULPI),
43 PINI(ULPI_DATA6, BB, SPI2, HSI, UARTA, ULPI),
44 PINI(ULPI_DATA7, BB, SPI2, HSI, UARTA, ULPI),
45 PINI(ULPI_CLK, BB, SPI1, SPI5, UARTD, ULPI),
46 PINI(ULPI_DIR, BB, SPI1, SPI5, UARTD, ULPI),
47 PINI(ULPI_NXT, BB, SPI1, SPI5, UARTD, ULPI),
48 PINI(ULPI_STP, BB, SPI1, SPI5, UARTD, ULPI),
49 PINI(DAP3_FS, BB, I2S2, SPI5, DISPA, DISPB),
50 PINI(DAP3_DIN, BB, I2S2, SPI5, DISPA, DISPB),
51 PINI(DAP3_DOUT, BB, I2S2, SPI5, DISPA, DISPB),
52 PINI(DAP3_SCLK, BB, I2S2, SPI5, DISPA, DISPB),
53 PINI(GPIO_PV0, BB, USB, RSVD2, RSVD3, RSVD4),
54 PINI(GPIO_PV1, BB, RSVD1, RSVD2, RSVD3, RSVD4),
55 PINI(SDMMC1_CLK, SDMMC1, SDMMC1, CLK12, RSVD3, RSVD4),
56 PINI(SDMMC1_CMD, SDMMC1, SDMMC1, SPDIF, SPI4, UARTA),
57 PINI(SDMMC1_DAT3, SDMMC1, SDMMC1, SPDIF, SPI4, UARTA),
58 PINI(SDMMC1_DAT2, SDMMC1, SDMMC1, PWM0, SPI4, UARTA),
59 PINI(SDMMC1_DAT1, SDMMC1, SDMMC1, PWM1, SPI4, UARTA),
60 PINI(SDMMC1_DAT0, SDMMC1, SDMMC1, RSVD2, SPI4, UARTA),
61 PIN_RESERVED, /* Reserved: 0x3060 - 0x3064 */
62 PIN_RESERVED,
63 PINI(CLK2_OUT, SDMMC1, EXTPERIPH2, RSVD2, RSVD3, RSVD4),
64 PINI(CLK2_REQ, SDMMC1, DAP, RSVD2, RSVD3, RSVD4),
65 PIN_RESERVED, /* Reserved: 0x3070 - 0x310c */
66 PIN_RESERVED,
67 PIN_RESERVED,
68 PIN_RESERVED,
69 PIN_RESERVED,
70 PIN_RESERVED,
71 PIN_RESERVED,
72 PIN_RESERVED,
73 PIN_RESERVED,
74 PIN_RESERVED,
75 PIN_RESERVED,
76 PIN_RESERVED,
77 PIN_RESERVED,
78 PIN_RESERVED,
79 PIN_RESERVED,
80 PIN_RESERVED,
81 PIN_RESERVED,
82 PIN_RESERVED,
83 PIN_RESERVED,
84 PIN_RESERVED,
85 PIN_RESERVED,
86 PIN_RESERVED,
87 PIN_RESERVED,
88 PIN_RESERVED,
89 PIN_RESERVED,
90 PIN_RESERVED,
91 PIN_RESERVED,
92 PIN_RESERVED,
93 PIN_RESERVED,
94 PIN_RESERVED,
95 PIN_RESERVED,
96 PIN_RESERVED,
97 PIN_RESERVED,
98 PIN_RESERVED,
99 PIN_RESERVED,
100 PIN_RESERVED,
101 PIN_RESERVED,
102 PIN_RESERVED,
103 PIN_RESERVED,
104 PIN_RESERVED,
105 PINI(HDMI_INT, LCD, RSVD1, RSVD2, RSVD3, RSVD4),
106 PINI(DDC_SCL, LCD, I2C4, RSVD2, RSVD3, RSVD4),
107 PINI(DDC_SDA, LCD, I2C4, RSVD2, RSVD3, RSVD4),
108 PIN_RESERVED, /* Reserved: 0x311c - 0x3160 */
109 PIN_RESERVED,
110 PIN_RESERVED,
111 PIN_RESERVED,
112 PIN_RESERVED,
113 PIN_RESERVED,
114 PIN_RESERVED,
115 PIN_RESERVED,
116 PIN_RESERVED,
117 PIN_RESERVED,
118 PIN_RESERVED,
119 PIN_RESERVED,
120 PIN_RESERVED,
121 PIN_RESERVED,
122 PIN_RESERVED,
123 PIN_RESERVED,
124 PIN_RESERVED,
125 PIN_RESERVED,
126 PINI(UART2_RXD, UART, UARTB, SPDIF, UARTA, SPI4),
127 PINI(UART2_TXD, UART, UARTB, SPDIF, UARTA, SPI4),
128 PINI(UART2_RTS_N, UART, UARTA, UARTB, RSVD3, SPI4),
129 PINI(UART2_CTS_N, UART, UARTA, UARTB, RSVD3, SPI4),
130 PINI(UART3_TXD, UART, UARTC, RSVD2, RSVD3, SPI4),
131 PINI(UART3_RXD, UART, UARTC, RSVD2, RSVD3, SPI4),
132 PINI(UART3_CTS_N, UART, UARTC, SDMMC1, DTV, SPI4),
133 PINI(UART3_RTS_N, UART, UARTC, PWM0, DTV, DISPA),
134 PINI(GPIO_PU0, UART, OWR, UARTA, RSVD3, RSVD4),
135 PINI(GPIO_PU1, UART, RSVD1, UARTA, RSVD3, RSVD4),
136 PINI(GPIO_PU2, UART, RSVD1, UARTA, RSVD3, RSVD4),
137 PINI(GPIO_PU3, UART, PWM0, UARTA, DISPA, DISPB),
138 PINI(GPIO_PU4, UART, PWM1, UARTA, DISPA, DISPB),
139 PINI(GPIO_PU5, UART, PWM2, UARTA, DISPA, DISPB),
140 PINI(GPIO_PU6, UART, PWM3, UARTA, USB, DISPB),
141 PINI(GEN1_I2C_SDA, UART, I2C1, RSVD2, RSVD3, RSVD4),
142 PINI(GEN1_I2C_SCL, UART, I2C1, RSVD2, RSVD3, RSVD4),
143 PINI(DAP4_FS, UART, I2S3, RSVD2, DTV, RSVD4),
144 PINI(DAP4_DIN, UART, I2S3, RSVD2, RSVD3, RSVD4),
145 PINI(DAP4_DOUT, UART, I2S3, RSVD2, DTV, RSVD4),
146 PINI(DAP4_SCLK, UART, I2S3, RSVD2, RSVD3, RSVD4),
147 PINI(CLK3_OUT, UART, EXTPERIPH3, RSVD2, RSVD3, RSVD4),
148 PINI(CLK3_REQ, UART, DEV3, RSVD2, RSVD3, RSVD4),
149 PINI(GMI_WP_N, GMI, RSVD1, NAND, GMI, GMI_ALT),
150 PINI(GMI_IORDY, GMI, SDMMC2, RSVD2, GMI, TRACE),
151 PINI(GMI_WAIT, GMI, SPI4, NAND, GMI, DTV),
152 PINI(GMI_ADV_N, GMI, RSVD1, NAND, GMI, TRACE),
153 PINI(GMI_CLK, GMI, SDMMC2, NAND, GMI, TRACE),
154 PINI(GMI_CS0_N, GMI, RSVD1, NAND, GMI, USB),
155 PINI(GMI_CS1_N, GMI, RSVD1, NAND, GMI, SOC),
156 PINI(GMI_CS2_N, GMI, SDMMC2, NAND, GMI, TRACE),
157 PINI(GMI_CS3_N, GMI, SDMMC2, NAND, GMI, GMI_ALT),
158 PINI(GMI_CS4_N, GMI, USB, NAND, GMI, TRACE),
159 PINI(GMI_CS6_N, GMI, NAND, NAND_ALT, GMI, SPI4),
160 PINI(GMI_CS7_N, GMI, NAND, NAND_ALT, GMI, SDMMC2),
161 PINI(GMI_AD0, GMI, RSVD1, NAND, GMI, RSVD4),
162 PINI(GMI_AD1, GMI, RSVD1, NAND, GMI, RSVD4),
163 PINI(GMI_AD2, GMI, RSVD1, NAND, GMI, RSVD4),
164 PINI(GMI_AD3, GMI, RSVD1, NAND, GMI, RSVD4),
165 PINI(GMI_AD4, GMI, RSVD1, NAND, GMI, RSVD4),
166 PINI(GMI_AD5, GMI, RSVD1, NAND, GMI, SPI4),
167 PINI(GMI_AD6, GMI, RSVD1, NAND, GMI, SPI4),
168 PINI(GMI_AD7, GMI, RSVD1, NAND, GMI, SPI4),
169 PINI(GMI_AD8, GMI, PWM0, NAND, GMI, DTV),
170 PINI(GMI_AD9, GMI, PWM1, NAND, GMI, CLDVFS),
171 PINI(GMI_AD10, GMI, PWM2, NAND, GMI, CLDVFS),
172 PINI(GMI_AD11, GMI, PWM3, NAND, GMI, USB),
173 PINI(GMI_AD12, GMI, SDMMC2, NAND, GMI, RSVD4),
174 PINI(GMI_AD13, GMI, SDMMC2, NAND, GMI, RSVD4),
175 PINI(GMI_AD14, GMI, SDMMC2, NAND, GMI, DTV),
176 PINI(GMI_AD15, GMI, SDMMC2, NAND, GMI, DTV),
177 PINI(GMI_A16, GMI, UARTD, TRACE, GMI, GMI_ALT),
178 PINI(GMI_A17, GMI, UARTD, RSVD2, GMI, TRACE),
179 PINI(GMI_A18, GMI, UARTD, RSVD2, GMI, TRACE),
180 PINI(GMI_A19, GMI, UARTD, SPI4, GMI, TRACE),
181 PINI(GMI_WR_N, GMI, RSVD1, NAND, GMI, SPI4),
182 PINI(GMI_OE_N, GMI, RSVD1, NAND, GMI, SOC),
183 PINI(GMI_DQS, GMI, SDMMC2, NAND, GMI, TRACE),
184 PINI(GMI_RST_N, GMI, NAND, NAND_ALT, GMI, RSVD4),
185 PINI(GEN2_I2C_SCL, GMI, I2C2, RSVD2, GMI, RSVD4),
186 PINI(GEN2_I2C_SDA, GMI, I2C2, RSVD2, GMI, RSVD4),
187 PINI(SDMMC4_CLK, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
188 PINI(SDMMC4_CMD, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
189 PINI(SDMMC4_DAT0, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
190 PINI(SDMMC4_DAT1, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
191 PINI(SDMMC4_DAT2, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
192 PINI(SDMMC4_DAT3, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
193 PINI(SDMMC4_DAT4, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
194 PINI(SDMMC4_DAT5, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
195 PINI(SDMMC4_DAT6, SDMMC4, SDMMC4, SPI3, GMI, RSVD4),
196 PINI(SDMMC4_DAT7, SDMMC4, SDMMC4, RSVD2, GMI, RSVD4),
197 PIN_RESERVED, /* Reserved: 0x3280 */
198 PINI(CAM_MCLK, CAM, VI, VI_ALT1, VI_ALT3, RSVD4),
199 PINI(GPIO_PCC1, CAM, I2S4, RSVD2, RSVD3, RSVD4),
200 PINI(GPIO_PBB0, CAM, I2S4, VI, VI_ALT1, VI_ALT3),
201 PINI(CAM_I2C_SCL, CAM, VGP1, I2C3, RSVD3, RSVD4),
202 PINI(CAM_I2C_SDA, CAM, VGP2, I2C3, RSVD3, RSVD4),
203 PINI(GPIO_PBB3, CAM, VGP3, DISPA, DISPB, RSVD4),
204 PINI(GPIO_PBB4, CAM, VGP4, DISPA, DISPB, RSVD4),
205 PINI(GPIO_PBB5, CAM, VGP5, DISPA, DISPB, RSVD4),
206 PINI(GPIO_PBB6, CAM, VGP6, DISPA, DISPB, RSVD4),
207 PINI(GPIO_PBB7, CAM, I2S4, RSVD2, RSVD3, RSVD4),
208 PINI(GPIO_PCC2, CAM, I2S4, RSVD2, RSVD3, RSVD4),
209 PINI(JTAG_RTCK, SYS, RTCK, RSVD2, RSVD3, RSVD4),
210 PINI(PWR_I2C_SCL, SYS, I2CPWR, RSVD2, RSVD3, RSVD4),
211 PINI(PWR_I2C_SDA, SYS, I2CPWR, RSVD2, RSVD3, RSVD4),
212 PINI(KB_ROW0, SYS, KBC, RSVD2, DTV, RSVD4),
213 PINI(KB_ROW1, SYS, KBC, RSVD2, DTV, RSVD4),
214 PINI(KB_ROW2, SYS, KBC, RSVD2, DTV, SOC),
215 PINI(KB_ROW3, SYS, KBC, DISPA, RSVD3, DISPB),
216 PINI(KB_ROW4, SYS, KBC, DISPA, SPI2, DISPB),
217 PINI(KB_ROW5, SYS, KBC, DISPA, SPI2, DISPB),
218 PINI(KB_ROW6, SYS, KBC, DISPA, RSVD3, DISPB),
219 PINI(KB_ROW7, SYS, KBC, RSVD2, CLDVFS, UARTA),
220 PINI(KB_ROW8, SYS, KBC, RSVD2, RSVD3, UARTA),
221 PINI(KB_ROW9, SYS, KBC, RSVD2, RSVD3, UARTA),
222 PINI(KB_ROW10, SYS, KBC, RSVD2, RSVD3, UARTA),
223 PIN_RESERVED, /* Reserved: 0x32e8 - 0x32f8 */
224 PIN_RESERVED,
225 PIN_RESERVED,
226 PIN_RESERVED,
227 PIN_RESERVED,
228 PINI(KB_COL0, SYS, KBC, USB, SPI2, EMC_DLL),
229 PINI(KB_COL1, SYS, KBC, RSVD2, SPI2, EMC_DLL),
230 PINI(KB_COL2, SYS, KBC, RSVD2, SPI2, RSVD4),
231 PINI(KB_COL3, SYS, KBC, DISPA, PWM2, UARTA),
232 PINI(KB_COL4, SYS, KBC, OWR, SDMMC3, UARTA),
233 PINI(KB_COL5, SYS, KBC, RSVD2, SDMMC1, RSVD4),
234 PINI(KB_COL6, SYS, KBC, RSVD2, SPI2, RSVD4),
235 PINI(KB_COL7, SYS, KBC, RSVD2, SPI2, RSVD4),
236 PINI(CLK_32K_OUT, SYS, BLINK, SOC, RSVD3, RSVD4),
237 PINI(SYS_CLK_REQ, SYS, SYSCLK, RSVD2, RSVD3, RSVD4),
238 PINI(CORE_PWR_REQ, SYS, PWRON, RSVD2, RSVD3, RSVD4),
239 PINI(CPU_PWR_REQ, SYS, CPU, RSVD2, RSVD3, RSVD4),
240 PINI(PWR_INT_N, SYS, PMI, RSVD2, RSVD3, RSVD4),
241 PINI(CLK_32K_IN, SYS, CLK, RSVD2, RSVD3, RSVD4),
242 PINI(OWR, SYS, OWR, RSVD2, RSVD3, RSVD4),
243 PINI(DAP1_FS, AUDIO, I2S0, HDA, GMI, RSVD4),
244 PINI(DAP1_DIN, AUDIO, I2S0, HDA, GMI, RSVD4),
245 PINI(DAP1_DOUT, AUDIO, I2S0, HDA, GMI, RSVD4),
246 PINI(DAP1_SCLK, AUDIO, I2S0, HDA, GMI, RSVD4),
247 PINI(CLK1_REQ, AUDIO, DAP, DAP1, RSVD3, RSVD4),
248 PINI(CLK1_OUT, AUDIO, EXTPERIPH1, DAP2, RSVD3, RSVD4),
249 PINI(SPDIF_IN, AUDIO, SPDIF, USB, RSVD3, RSVD4),
250 PINI(SPDIF_OUT, AUDIO, SPDIF, RSVD2, RSVD3, RSVD4),
251 PINI(DAP2_FS, AUDIO, I2S1, HDA, RSVD3, RSVD4),
252 PINI(DAP2_DIN, AUDIO, I2S1, HDA, RSVD3, RSVD4),
253 PINI(DAP2_DOUT, AUDIO, I2S1, HDA, RSVD3, RSVD4),
254 PINI(DAP2_SCLK, AUDIO, I2S1, HDA, RSVD3, RSVD4),
255 PINI(DVFS_PWM, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4),
256 PINI(GPIO_X1_AUD, AUDIO, SPI6, RSVD2, RSVD3, RSVD4),
257 PINI(GPIO_X3_AUD, AUDIO, SPI6, SPI1, RSVD3, RSVD4),
258 PINI(DVFS_CLK, AUDIO, SPI6, CLDVFS, RSVD3, RSVD4),
259 PINI(GPIO_X4_AUD, AUDIO, RSVD1, SPI1, SPI2, DAP2),
260 PINI(GPIO_X5_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4),
261 PINI(GPIO_X6_AUD, AUDIO, SPI6, SPI1, SPI2, RSVD4),
262 PINI(GPIO_X7_AUD, AUDIO, RSVD1, SPI1, SPI2, RSVD4),
263 PIN_RESERVED, /* Reserved: 0x3388 - 0x338c */
264 PIN_RESERVED,
265 PINI(SDMMC3_CLK, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3),
266 PINI(SDMMC3_CMD, SDMMC3, SDMMC3, PWM3, UARTA, SPI3),
267 PINI(SDMMC3_DAT0, SDMMC3, SDMMC3, RSVD2, RSVD3, SPI3),
268 PINI(SDMMC3_DAT1, SDMMC3, SDMMC3, PWM2, UARTA, SPI3),
269 PINI(SDMMC3_DAT2, SDMMC3, SDMMC3, PWM1, DISPA, SPI3),
270 PINI(SDMMC3_DAT3, SDMMC3, SDMMC3, PWM0, DISPB, SPI3),
271 PIN_RESERVED, /* Reserved: 0x33a8 - 0x33dc */
272 PIN_RESERVED,
273 PIN_RESERVED,
274 PIN_RESERVED,
275 PIN_RESERVED,
276 PIN_RESERVED,
277 PIN_RESERVED,
278 PIN_RESERVED,
279 PIN_RESERVED,
280 PIN_RESERVED,
281 PIN_RESERVED,
282 PIN_RESERVED,
283 PIN_RESERVED,
284 PIN_RESERVED,
285 PINI(HDMI_CEC, SYS, CEC, SDMMC3, RSVD3, SOC),
286 PINI(SDMMC1_WP_N, SDMMC1, SDMMC1, CLK12, SPI4, UARTA),
287 PINI(SDMMC3_CD_N, SYS, SDMMC3, OWR, RSVD3, RSVD4),
288 PINI(GPIO_W2_AUD, AUDIO, SPI6, RSVD2, SPI2, I2C1),
289 PINI(GPIO_W3_AUD, AUDIO, SPI6, SPI1, SPI2, I2C1),
290 PINI(USB_VBUS_EN0, LCD, USB, RSVD2, RSVD3, RSVD4),
291 PINI(USB_VBUS_EN1, LCD, USB, RSVD2, RSVD3, RSVD4),
292 PINI(SDMMC3_CLK_LB_IN, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4),
293 PINI(SDMMC3_CLK_LB_OUT, SDMMC3, SDMMC3, RSVD2, RSVD3, RSVD4),
294 PIN_RESERVED, /* Reserved: 0x3404 */
295 PINO(RESET_OUT_N, SYS, RSVD1, RSVD2, RSVD3, RESET_OUT_N),
296 };
297 const struct tegra_pingroup_desc *tegra_soc_pingroups = tegra124_pingroups;