arch/arm/dts/am335x-rut.dts

   1 /*
   2  * Copyright (C) 2014 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * Based on:
   6  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 /dts-v1/;
  13
  14 #include "am33xx.dtsi"
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "RUT";
  19         compatible = "ti,am335x-evm", "ti,am33xx";
  20
  21         buzzer {
  22                 compatible = "pwm-beeper";
  23                 pwms = <&ecap0 0 16000 0>;
  24         };
  25
  26         chosen {
  27                 stdout-path = &uart0;
  28                 tick-timer = &timer2;
  29         };
  30
  31         cpus {
  32                 cpu@0 {
  33                         cpu0-supply = <&dcdc2_reg>;
  34                 };
  35         };
  36
  37         gpio_keys: powerfail-keys {
  38                 compatible = "gpio-keys";
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41                 autorepeat;
  42
  43                 pwr-fail0 {
  44                         label = "power-fail";
  45                         linux,code = <KEY_POWER>;
  46                         gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
  47                         gpio-key,wakeup;
  48                 };
  49
  50                 pwr-fail1 {
  51                         label = "power-fail-redundant";
  52                         linux,code = <KEY_POWER>;
  53                         gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
  54                         gpio-key,wakeup;
  55                 };
  56         };
  57
  58         leds {
  59                 compatible = "gpio-leds";
  60
  61                 led_green {
  62                         label = "rut:green:debug:run_mode";
  63                         gpios = <&gpio3 20 1>;
  64                         /* activelow = 1, default trigger heartbeat */
  65                 };
  66                 led_yellow {
  67                         label = "rut:debug:yellow:osc_ch1";
  68                         gpios = <&gpio0 17 1>;
  69                         /* activelow = 1, default trigger mmc0 */
  70                 };
  71                 led_red {
  72                         label = "rut:debug:red:osc_ch2";
  73                         gpios = <&gpio0 16 1>;
  74                         /* activelow = 1, default trigger debug_osc_ch2 */
  75                 };
  76                 /* optional */
  77                 led_alive {
  78                         label = "rut:alive";
  79                         gpios = <&gpio0 15 1>;
  80                         linux,default-trigger = "heartbeat";
  81                         /* activelow = 1, default trigger heartbeat */
  82                 };
  83
  84         };
  85
  86         memory {
  87                 device_type = "memory";
  88                 reg = <0x80000000 0x10000000>; /* 256 MB */
  89         };
  90
  91         panel {
  92                 compatible = "ti,tilcdc,panel";
  93                 pinctrl-names = "default";
  94                 pinctrl-0 = <&lcd_pins_s0>;
  95                 status = "okay";
  96
  97                 /* FORMIKE_KWH043ST20_F01 */
  98                 panel-info {
  99                         ac-bias           = <255>;
 100                         ac-bias-intrpt    = <0>;
 101                         dma-burst-sz      = <16>;
 102                         bpp               = <16>;
 103                         fdd               = <0x80>;
 104                         sync-edge         = <0>;
 105                         sync-ctrl         = <1>;
 106                         raster-order      = <0>;
 107                         fifo-th           = <0>;
 108                         tft-alt-mode      = <0>;
 109                         invert-pxl-clk    = <1>;
 110                 };
 111
 112                 display-timings {
 113                         native-mode = <&timing1>;
 114                         timing1: 480x800p60 {
 115                                 clock-frequency = <29925000>;
 116                                 hactive = <480>;
 117                                 vactive = <800>;
 118                                 hfront-porch = <50>;
 119                                 hback-porch = <50>;
 120                                 hsync-len = <50>;
 121                                 vback-porch = <50>;
 122                                 vfront-porch = <50>;
 123                                 vsync-len = <50>;
 124                                 hsync-active = <1>;
 125                                 vsync-active = <1>;
 126                         };
 127                 };
 128         };
 129
 130         vmmc: fixedregulator3 {
 131                 compatible = "regulator-fixed";
 132                 regulator-name = "vmmc";
 133                 regulator-min-microvolt = <3300000>;
 134                 regulator-max-microvolt = <3300000>;
 135         };
 136
 137         watchdog {
 138                 compatible = "linux,wdt-gpio";
 139                 gpios = <&gpio0 14 0>;
 140                 hw_algo = "level";
 141                 hw_margin_ms = <30000>;
 142         };
 143 };
 144
 145 &aes {
 146         status = "okay";
 147 };
 148
 149 &cppi41dma  {
 150         status = "okay";
 151 };
 152
 153 &cpsw_emac0 {
 154         phy_id = <&davinci_mdio>, <1>;
 155         phy-mode = "rmii";
 156 };
 157
 158 &cpsw_emac1 {
 159         phy_id = <&davinci_mdio>, <0>;
 160         phy-mode = "rmii";
 161 };
 162
 163 &davinci_mdio {
 164         pinctrl-names = "default", "sleep";
 165         pinctrl-0 = <&davinci_mdio_default>;
 166         pinctrl-1 = <&davinci_mdio_sleep>;
 167         status = "okay";
 168         gpios = <&gpio2 18 0>;
 169
 170         ethernet_phy: ethernet-phy@1 {
 171                 compatible = "ethernet-phy-id2000.5ce1";
 172                 reg = <1>;
 173                 natsemi,master_mode_fixup;
 174         };
 175 };
 176
 177 &elm {
 178         status = "okay";
 179 };
 180
 181 &epwmss0 {
 182         status = "okay";
 183
 184         ecap0: ecap@48300100 {
 185                 status = "okay";
 186                 pinctrl-names = "default";
 187                 pinctrl-0 = <&ecap0_pins>;
 188         };
 189 };
 190
 191 &epwmss1 {
 192         status = "okay";
 193
 194         ehrpwm1: ehrpwm@48302200 {
 195                 status = "okay";
 196                 pinctrl-names = "default";
 197                 pinctrl-0 = <&epwmss1_pins>;
 198         };
 199 };
 200
 201 &gpmc {
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&nandflash_pins>;
 204         status = "okay";
 205
 206         ranges = <0 0 0x08000000 0x10000000>;   /* CS0: NAND */
 207
 208         nand@0,0 {
 209                 reg = <0 0 0>; /* CS0, offset 0 */
 210                 nand-bus-width = <8>;
 211                 ti,nand-ecc-opt = "bch8";
 212                 gpmc,device-nand = "true";
 213                 gpmc,device-width = <1>;
 214                 gpmc,sync-clk-ps = <0>;
 215                 gpmc,cs-on-ns = <0>;
 216                 gpmc,cs-rd-off-ns = <57>;
 217                 gpmc,cs-wr-off-ns = <57>;
 218                 gpmc,adv-on-ns = <0>;
 219                 gpmc,adv-rd-off-ns = <57>;
 220                 gpmc,adv-wr-off-ns = <57>;
 221                 gpmc,we-on-ns = <0>;
 222                 gpmc,we-off-ns = <48>;
 223                 gpmc,oe-on-ns = <0>;
 224                 gpmc,oe-off-ns = <57>;
 225                 gpmc,access-ns = <38>;
 226                 gpmc,rd-cycle-ns = <67>;
 227                 gpmc,wr-cycle-ns = <67>;
 228                 gpmc,wait-on-read = "true";
 229                 gpmc,wait-on-write = "true";
 230                 gpmc,bus-turnaround-ns = <0>;
 231                 gpmc,cycle2cycle-delay-ns = <0>;
 232                 gpmc,clk-activation-ns = <0>;
 233                 gpmc,wait-monitoring-ns = <0>;
 234                 gpmc,wr-access-ns = <96>;
 235                 gpmc,wr-data-mux-bus-ns = <0>;
 236
 237                 #address-cells = <1>;
 238                 #size-cells = <1>;
 239                 elm_id = <&elm>;
 240         };
 241 };
 242
 243 &i2c0 {
 244         pinctrl-names = "default";
 245         pinctrl-0 = <&i2c0_pins>;
 246         clock-frequency = <400000>;
 247         status = "okay";
 248
 249         eeprom: eeprom@50 {
 250                 compatible = "atmel,24c128";
 251                 reg = <0x50>;
 252                 pagesize = <32>;
 253         };
 254
 255         tps: tps@24 {
 256                 reg = <0x24>;
 257         };
 258 };
 259
 260 &i2c1 {
 261         pinctrl-names = "default";
 262         pinctrl-0 = <&i2c1_pins>;
 263         clock-frequency = <100000>;
 264         status = "okay";
 265
 266         atmel: atmel_mxt_ts@4a {
 267                 compatible = "atmel,maxtouch";
 268                 reg = <0x4a>;
 269                 interrupt-parent = <&gpio1>;
 270                 interrupts = <28 8>;
 271                 gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
 272         };
 273
 274         temp@48 {
 275                 compatible = "st,ds75";
 276                 reg = <0x4c>;
 277         };
 278 };
 279
 280 &lcdc {
 281         status = "okay";
 282 };
 283
 284 &mac {
 285         pinctrl-names = "default", "sleep";
 286         pinctrl-0 = <&cpsw_default>;
 287         pinctrl-1 = <&cpsw_sleep>;
 288         status = "okay";
 289 };
 290
 291 &mmc1 {
 292         vmmc-supply = <&vmmc>;
 293         pinctrl-names = "default";
 294         pinctrl-0 = <&mmc1_pins>;
 295         status = "okay";
 296 };
 297
 298 &phy_sel {
 299         rmii-clock-ext;
 300 };
 301
 302 &sham {
 303         status = "okay";
 304 };
 305
 306 &spi0 {
 307         pinctrl-names = "default";
 308         pinctrl-0 = <&spi0_pins>;
 309         status = "okay";
 310         spi-flash@0 {
 311                 #address-cells = <1>;
 312                 #size-cells = <1>;
 313                 compatible = "mx25l25635e";
 314                 reg = <0>; /* Chip select 0 */
 315                 spi-max-frequency = <24000000>;
 316
 317                 partition@0 {
 318                         label = "dummy";
 319                         reg = <0x0000000 0x8000>;
 320                 };
 321         };
 322 };
 323
 324 &spi1 {
 325         pinctrl-names = "default";
 326         pinctrl-0 = <&spi1_pins>;
 327         status = "okay";
 328
 329         lcd_init: lcd@0 {
 330                 compatible = "formike,kwh043st20";
 331                 reg = <0>;
 332                 reset-gpios = <&gpio3 19 0>;
 333                 spi-max-frequency = <1200000>;
 334                 spi-cpol;
 335                 spi-cpha;
 336                 power-on-delay = <10>;
 337                 reset-delay = <10>;
 338         };
 339 };
 340
 341 /include/ "tps65217.dtsi"
 342
 343 &tps {
 344         backlight0: backlight {
 345                 isel = <1>;  /* 1 - ISET1, 2 ISET2 */
 346                 fdim = <1000>; /* TPS65217_BL_FDIM_100HZ */
 347                 default-brightness = <80>;
 348         };
 349
 350         regulators {
 351                 dcdc1_reg: regulator@0 {
 352                         regulator-always-on;
 353                 };
 354
 355                 dcdc2_reg: regulator@1 {
 356                         /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
 357                         regulator-name = "vdd_mpu";
 358                         regulator-min-microvolt = <925000>;
 359                         regulator-max-microvolt = <1325000>;
 360                         regulator-boot-on;
 361                         regulator-always-on;
 362                 };
 363
 364                 dcdc3_reg: regulator@2 {
 365                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 366                         regulator-name = "vdd_core";
 367                         regulator-min-microvolt = <925000>;
 368                         regulator-max-microvolt = <1150000>;
 369                         regulator-boot-on;
 370                         regulator-always-on;
 371                 };
 372
 373                 ldo1_reg: regulator@3 {
 374                         regulator-always-on;
 375                 };
 376
 377                 ldo2_reg: regulator@4 {
 378                         regulator-always-on;
 379                 };
 380
 381                 ldo3_reg: regulator@5 {
 382                         regulator-always-on;
 383                 };
 384
 385                 ldo4_reg: regulator@6 {
 386                         regulator-always-on;
 387                 };
 388         };
 389 };
 390
 391 &tscadc {
 392         status = "okay";
 393         adc {
 394                 ti,adc-channels = <4 5 6 7>;
 395         };
 396 };
 397
 398 &uart0 {
 399         pinctrl-names = "default";
 400         pinctrl-0 = <&uart0_pins>;
 401
 402         status = "okay";
 403 };
 404
 405 &usb {
 406         status = "okay";
 407 };
 408
 409 &usb_ctrl_mod {
 410         status = "okay";
 411 };
 412
 413 &usb0 {
 414         dr_mode = "device";
 415         status = "okay";
 416 };
 417
 418 &usb0_phy {
 419         status = "okay";
 420 };
 421
 422 &am33xx_pinmux {
 423         pinctrl-names = "default";
 424         pinctrl-0 = <&clkout2_pin &gpio_pin>;
 425
 426         clkout2_pin: pinmux_clkout2_pin {
 427                 pinctrl-single,pins = <
 428                         0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
 429                 >;
 430         };
 431
 432         cpsw_default: cpsw_default {
 433                 pinctrl-single,pins = <
 434                         /* Slave 1 */
 435                         0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
 436                         0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.mii1_rxerr */
 437                         0x114 (MUX_MODE1)       /* mii1_txen.mii1_txen */
 438                         0x124 (MUX_MODE1)       /* mii1_txd1.mii1_txd1 */
 439                         0x128 (MUX_MODE1)       /* mii1_txd0.mii1_txd0 */
 440                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd1.mii1_rxd1 */
 441                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1)  /* mii1_rxd0.mii1_rxd0 */
 442                         0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */
 443                 >;
 444         };
 445
 446         cpsw_sleep: cpsw_sleep {
 447                 pinctrl-single,pins = <
 448                         /* Slave 1 reset value */
 449                         0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 450                         0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 451                         0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 452                         0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 453                         0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 454                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 455                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 456                         0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 457                 >;
 458         };
 459
 460         davinci_mdio_default: davinci_mdio_default {
 461                 pinctrl-single,pins = <
 462                         /* MDIO */
 463                         0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
 464                         0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
 465                 >;
 466         };
 467
 468         davinci_mdio_sleep: davinci_mdio_sleep {
 469                 pinctrl-single,pins = <
 470                         /* MDIO reset value */
 471                         0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 472                         0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 473                 >;
 474         };
 475
 476         ecap0_pins: ecap_pins {
 477                 pinctrl-single,pins = <
 478                         0x164 (MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 buzzer frequency: ecap.0 */
 479                 >;
 480         };
 481
 482         epwmss1_pins: epwmss_pins {
 483                 pinctrl-single,pins = <
 484                         0x48 (PIN_INPUT | MUX_MODE7)    /* gpmc_a2.gpio1_18 buzzer frequency: ehrpwm1A high-Z due to connected to ecap0 by R0469 */
 485                         0x4c (MUX_MODE6)        /* gpmc_a3.ehrpwm1B buzzer volume pwm */
 486                 >;
 487         };
 488
 489         gpio_pin: gpio_pin {
 490                 pinctrl-single,pins = <
 491                         0x6c (PIN_INPUT | MUX_MODE7)            /* gpmc_a11.gpio1_27 PWR_FAIL_GPIO_SPARE */
 492                         0x78 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) /* gpmc_be1n.gpio1_28 TOUCH_CHANGE_N */
 493                         0x88 (PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7)         /* gpmc_csn3.gpio2_0 RUT_GPIO0_GPIO */
 494                         0x118 (PIN_INPUT | MUX_MODE7)           /* gmii1_rxdv.gpio3_4 PWR_FAIL_GPIO */
 495                         0x11c (MUX_MODE7)                       /* mii1_txd3.gpio0_16 DEBUG_OSC_CH2_GPIO */
 496                         0x120 (MUX_MODE7)                       /* mii1_txd2.gpio0_17 DEBUG_OSC_CH1_GPIO */
 497                         0x134 (MUX_MODE7)                       /* gmii1_rxd3.gpio2_18 PHY_RSTn_GPIO */
 498                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* gmii1_rxd2.gpio2_19 PHY_INT_GPIO */
 499                         0x180 (MUX_MODE7)                       /* uart1_rxd.gpio0_14 WATCHDOG_TRIGGER_GPIO */
 500                         0x184 (MUX_MODE7)                       /* uart1_txd.gpio0_15 ALIVE_LED_N_GPIO */
 501                         0x1a0 (MUX_MODE7)                       /* mcasp0_aclkr.gpio3_18 MAXTOUCH_RESET_GPIO */
 502                         0x1a4 (MUX_MODE7)                       /* mcasp0_fsr.gpio3_19 DISPLAY_RESET_GPIO */
 503                         0x1a8 (MUX_MODE7)                       /* mcasp0_axr1.gpio3_20 DEBUG_RUN_MODE_GPIO */
 504                         0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7)  /* mcasp0_ahclkx.gpio3_21 NORFLASH_WP_GPIO */
 505                         0x1b0 (PIN_OUTPUT | MUX_MODE3)          /* xdma_event_intr0.clkout1 */
 506                 >;
 507         };
 508
 509         i2c0_pins: pinmux_i2c0_pins {
 510                 pinctrl-single,pins = <
 511                         0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
 512                         0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
 513                 >;
 514         };
 515
 516         i2c1_pins: pinmux_i2c1_pins {
 517                 pinctrl-single,pins = <
 518                         0x168 (PIN_INPUT | MUX_MODE3)   /* uart0_ctsn.i2c1_sda */
 519                         0x16c (PIN_INPUT | MUX_MODE3)   /* uart0.rtsn.i2c1_scl */
 520                 >;
 521         };
 522
 523         lcd_pins_s0: lcd_pins_s0 {
 524                 pinctrl-single,pins = <
 525                         0x20 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad8.lcd_data23 */
 526                         0x24 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad9.lcd_data22 */
 527                         0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad10.lcd_data21 */
 528                         0x2c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad11.lcd_data20 */
 529                         0x30 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad12.lcd_data19 */
 530                         0x34 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad13.lcd_data18 */
 531                         0x38 (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad14.lcd_data17 */
 532                         0x3c (PIN_OUTPUT_PULLDOWN | MUX_MODE1)  /* gpmc_ad15.lcd_data16 */
 533                         0xa0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data0.lcd_data0 */
 534                         0xa4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data1.lcd_data1 */
 535                         0xa8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data2.lcd_data2 */
 536                         0xac (PIN_OUTPUT | MUX_MODE0)           /* lcd_data3.lcd_data3 */
 537                         0xb0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data4.lcd_data4 */
 538                         0xb4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data5.lcd_data5 */
 539                         0xb8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data6.lcd_data6 */
 540                         0xbc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data7.lcd_data7 */
 541                         0xc0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data8.lcd_data8 */
 542                         0xc4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data9.lcd_data9 */
 543                         0xc8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data10.lcd_data10 */
 544                         0xcc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data11.lcd_data11 */
 545                         0xd0 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data12.lcd_data12 */
 546                         0xd4 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data13.lcd_data13 */
 547                         0xd8 (PIN_OUTPUT | MUX_MODE0)           /* lcd_data14.lcd_data14 */
 548                         0xdc (PIN_OUTPUT | MUX_MODE0)           /* lcd_data15.lcd_data15 */
 549                         0xe0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_vsync.lcd_vsync */
 550                         0xe4 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_hsync.lcd_hsync */
 551                         0xe8 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_pclk.lcd_pclk */
 552                         0xec (PIN_OUTPUT_PULLDOWN | MUX_MODE0)  /* lcd_ac_bias_en.lcd_ac_bias_en */
 553                 >;
 554         };
 555
 556         mmc1_pins: mmc1_pins {
 557                 pinctrl-single,pins = <
 558                         0xf0 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat0.mmc0_dat0 */
 559                         0xf4 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat1.mmc0_dat1 */
 560                         0xf8 (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat2.mmc0_dat2 */
 561                         0xfc (PIN_INPUT_PULLUP | MUX_MODE0)     /* mmc0_dat3.mmc0_dat3 */
 562                         0x100 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_clk.mmc0_clk */
 563                         0x104 (PIN_INPUT_PULLUP | MUX_MODE0)    /* mmc0_cmd.mmc0_cmd */
 564                 >;
 565         };
 566
 567         nandflash_pins: pinmux_nandflash_pins {
 568                 pinctrl-single,pins = <
 569                         0x0 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad0.gpmc_ad0 */
 570                         0x4 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad1.gpmc_ad1 */
 571                         0x8 (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad2.gpmc_ad2 */
 572                         0xc (PIN_INPUT_PULLUP | MUX_MODE0)      /* gpmc_ad3.gpmc_ad3 */
 573                         0x10 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
 574                         0x14 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
 575                         0x18 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
 576                         0x1c (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
 577                         0x70 (PIN_INPUT_PULLUP | MUX_MODE0)     /* gpmc_wait0.gpmc_wait0 */
 578                         0x74 (PIN_INPUT_PULLUP | MUX_MODE7)     /* gpmc_wpn.gpio0_30 */
 579                         0x7c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_csn0.gpmc_csn0 */
 580                         0x90 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_advn_ale.gpmc_advn_ale */
 581                         0x94 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_oen_ren.gpmc_oen_ren */
 582                         0x98 (PIN_OUTPUT | MUX_MODE0)           /* gpmc_wen.gpmc_wen */
 583                         0x9c (PIN_OUTPUT | MUX_MODE0)           /* gpmc_be0n_cle.gpmc_be0n_cle */
 584                 >;
 585         };
 586
 587         spi0_pins: pinmux_spi0_pins {
 588                 pinctrl-single,pins = <
 589                         0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_sclk.spi0_sclk */
 590                         0x154 (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_d0.spi0_d0 */
 591                         0x158 (PIN_INPUT_PULLDOWN | MUX_MODE0)  /* spi0_d1.spi0_d1 */
 592                         0x15c (PIN_INPUT_PULLUP | MUX_MODE0)    /* spi0_CS0.spi0_CS0 */
 593                 >;
 594         };
 595
 596         spi1_pins: pinmux_spi1_pins {
 597                 pinctrl-single,pins = <
 598                         0x190 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* mcasp0_aclkx.spi1_sclk */
 599                         0x194 (PIN_INPUT_PULLUP | MUX_MODE3)    /* mcasp0_fsx.spi1_d0 */
 600                         0x198 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* mcasp0_axr0.spi1_d1 */
 601                         0x19c (PIN_INPUT_PULLUP | MUX_MODE3)    /* mcasp0_ahclkr.spi1_cs0 */
 602                 >;
 603         };
 604
 605         uart0_pins: pinmux_uart0_pins {
 606                 pinctrl-single,pins = <
 607                         0x170 (PIN_INPUT | MUX_MODE0)   /* uart0_rxd.uart0_rxd */
 608                         0x174 (PIN_OUTPUT | MUX_MODE0)  /* uart0_txd.uart0_txd */
 609                 >;
 610         };
 611 };