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arm64: mvebu: Modify the A8K SPI and I2C config in DTS
[people/ms/u-boot.git] / arch / arm / dts / armada-8040-db.dts
1 /*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 /*
44 * Device Tree file for Marvell Armada 8040 Development board platform
45 */
46
47 #include "armada-8040.dtsi"
48
49 / {
50 model = "Marvell Armada 8040 DB board";
51 compatible = "marvell,armada8040-db", "marvell,armada8040",
52 "marvell,armada-ap806-quad", "marvell,armada-ap806";
53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
58 aliases {
59 i2c0 = &cpm_i2c0;
60 spi0 = &cps_spi1;
61 };
62
63 memory@00000000 {
64 device_type = "memory";
65 reg = <0x0 0x0 0x0 0x80000000>;
66 };
67 };
68
69 /* Accessible over the mini-USB CON9 connector on the main board */
70 &uart0 {
71 status = "okay";
72 };
73
74
75 /* CON5 on CP0 expansion */
76 &cpm_pcie2 {
77 status = "okay";
78 };
79
80 &cpm_i2c0 {
81 status = "okay";
82 clock-frequency = <100000>;
83 };
84
85 /* CON4 on CP0 expansion */
86 &cpm_sata0 {
87 status = "okay";
88 };
89
90 /* CON9 on CP0 expansion */
91 &cpm_usb3_0 {
92 status = "okay";
93 };
94
95 /* CON10 on CP0 expansion */
96 &cpm_usb3_1 {
97 status = "okay";
98 };
99
100 /* CON5 on CP1 expansion */
101 &cps_pcie2 {
102 status = "okay";
103 };
104
105 &cps_spi1 {
106 status = "okay";
107
108 spi-flash@0 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 compatible = "jedec,spi-nor";
112 reg = <0>;
113 spi-max-frequency = <10000000>;
114
115 partitions {
116 compatible = "fixed-partitions";
117 #address-cells = <1>;
118 #size-cells = <1>;
119
120 partition@0 {
121 label = "U-Boot";
122 reg = <0 0x200000>;
123 };
124 partition@400000 {
125 label = "Filesystem";
126 reg = <0x200000 0xce0000>;
127 };
128 };
129 };
130 };
131
132 /* CON4 on CP1 expansion */
133 &cps_sata0 {
134 status = "okay";
135 };
136
137 /* CON9 on CP1 expansion */
138 &cps_usb3_0 {
139 status = "okay";
140 };
141
142 /* CON10 on CP1 expansion */
143 &cps_usb3_1 {
144 status = "okay";
145 };
146
147 &cpm_comphy {
148 /*
149 * Serdes Configuration:
150 * Lane 0: SGMII2
151 * Lane 1: USB3_HOST0
152 * Lane 2: KR (10G)
153 * Lane 3: SATA1
154 * Lane 4: USB3_HOST1
155 * Lane 5: PEX2x1
156 */
157 phy0 {
158 phy-type = <PHY_TYPE_SGMII2>;
159 phy-speed = <PHY_SPEED_3_125G>;
160 };
161
162 phy1 {
163 phy-type = <PHY_TYPE_USB3_HOST0>;
164 };
165
166 phy2 {
167 phy-type = <PHY_TYPE_KR>;
168 };
169
170 phy3 {
171 phy-type = <PHY_TYPE_SATA1>;
172 };
173
174 phy4 {
175 phy-type = <PHY_TYPE_USB3_HOST1>;
176 };
177
178 phy5 {
179 phy-type = <PHY_TYPE_PEX2>;
180 };
181 };
182
183 &cps_comphy {
184 /*
185 * Serdes Configuration:
186 * Lane 0: SGMII2
187 * Lane 1: USB3_HOST0
188 * Lane 2: KR (10G)
189 * Lane 3: SATA1
190 * Lane 4: Unconnected
191 * Lane 5: PEX2x1
192 */
193 phy0 {
194 phy-type = <PHY_TYPE_SGMII2>;
195 phy-speed = <PHY_SPEED_3_125G>;
196 };
197
198 phy1 {
199 phy-type = <PHY_TYPE_USB3_HOST0>;
200 };
201
202 phy2 {
203 phy-type = <PHY_TYPE_KR>;
204 };
205
206 phy3 {
207 phy-type = <PHY_TYPE_SATA1>;
208 };
209
210 phy4 {
211 phy-type = <PHY_TYPE_UNCONNECTED>;
212 };
213
214 phy5 {
215 phy-type = <PHY_TYPE_PEX2>;
216 };
217 };
218
219 &cpm_utmi0 {
220 status = "okay";
221 };
222
223 &cpm_utmi1 {
224 status = "okay";
225 };
226
227 &cps_utmi0 {
228 status = "okay";
229 };