arch/arm/dts/ast2600-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 #include <dt-bindings/clock/ast2600-clock.h>
   3 #include <dt-bindings/reset/ast2600-reset.h>
   4
   5 #include "ast2600.dtsi"
   6
   7 / {
   8         scu: clock-controller@1e6e2000 {
   9                 compatible = "aspeed,ast2600-scu";
  10                 reg = <0x1e6e2000 0x1000>;
  11                 u-boot,dm-pre-reloc;
  12                 #clock-cells = <1>;
  13                 #reset-cells = <1>;
  14                 uart-clk-source = <0x0>; /* uart clock source selection: 0: uxclk 1: huxclk*/
  15         };
  16
  17         rst: reset-controller {
  18                 u-boot,dm-pre-reloc;
  19                 compatible = "aspeed,ast2600-reset";
  20                 aspeed,wdt = <&wdt1>;
  21                 #reset-cells = <1>;
  22         };
  23
  24         sdrammc: sdrammc@1e6e0000 {
  25                 u-boot,dm-pre-reloc;
  26                 compatible = "aspeed,ast2600-sdrammc";
  27                 reg = <0x1e6e0000 0x100
  28                         0x1e6e0100 0x300
  29                         0x1e6e0400 0x200 >;
  30                 #reset-cells = <1>;
  31                 clocks = <&scu ASPEED_CLK_MPLL>;
  32                 resets = <&rst ASPEED_RESET_SDRAM>;
  33         };
  34
  35         ahb {
  36                 u-boot,dm-pre-reloc;
  37
  38                 apb {
  39                         u-boot,dm-pre-reloc;
  40                 };
  41
  42         };
  43 };
  44