arch/arm/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC common device tree source
   3  *
   4  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         combiner: interrupt-controller@10440000 {
  14                 compatible = "samsung,exynos4210-combiner";
  15                 #interrupt-cells = <2>;
  16                 interrupt-controller;
  17                 reg = <0x10440000 0x1000>;
  18         };
  19
  20         serial@13800000 {
  21                 compatible = "samsung,exynos4210-uart";
  22                 reg = <0x13800000 0x3c>;
  23                 id = <0>;
  24         };
  25
  26         serial@13810000 {
  27                 compatible = "samsung,exynos4210-uart";
  28                 reg = <0x13810000 0x3c>;
  29                 id = <1>;
  30         };
  31
  32         serial@13820000 {
  33                 compatible = "samsung,exynos4210-uart";
  34                 reg = <0x13820000 0x3c>;
  35                 id = <2>;
  36         };
  37
  38         serial@13830000 {
  39                 compatible = "samsung,exynos4210-uart";
  40                 reg = <0x13830000 0x3c>;
  41                 id = <3>;
  42         };
  43
  44         serial@13840000 {
  45                 compatible = "samsung,exynos4210-uart";
  46                 reg = <0x13840000 0x3c>;
  47                 id = <4>;
  48         };
  49
  50         i2c@13860000 {
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 compatible = "samsung,s3c2440-i2c";
  54                 interrupts = <0 0 0>;
  55         };
  56
  57         i2c@13870000 {
  58                 #address-cells = <1>;
  59                 #size-cells = <0>;
  60                 compatible = "samsung,s3c2440-i2c";
  61                 interrupts = <1 1 0>;
  62         };
  63
  64         i2c@13880000 {
  65                 #address-cells = <1>;
  66                 #size-cells = <0>;
  67                 compatible = "samsung,s3c2440-i2c";
  68                 interrupts = <2 2 0>;
  69         };
  70
  71         i2c@13890000 {
  72                 #address-cells = <1>;
  73                 #size-cells = <0>;
  74                 compatible = "samsung,s3c2440-i2c";
  75                 interrupts = <3 3 0>;
  76         };
  77
  78         i2c@138a0000 {
  79                 #address-cells = <1>;
  80                 #size-cells = <0>;
  81                 compatible = "samsung,s3c2440-i2c";
  82                 interrupts = <4 4 0>;
  83         };
  84
  85         i2c@138b0000 {
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 compatible = "samsung,s3c2440-i2c";
  89                 interrupts = <5 5 0>;
  90         };
  91
  92         i2c@138c0000 {
  93                 #address-cells = <1>;
  94                 #size-cells = <0>;
  95                 compatible = "samsung,s3c2440-i2c";
  96                 interrupts = <6 6 0>;
  97         };
  98
  99         i2c@138d0000 {
 100                 #address-cells = <1>;
 101                 #size-cells = <0>;
 102                 compatible = "samsung,s3c2440-i2c";
 103                 interrupts = <7 7 0>;
 104         };
 105
 106         sdhci@12510000 {
 107                 #address-cells = <1>;
 108                 #size-cells = <0>;
 109                 compatible = "samsung,exynos-mmc";
 110                 reg = <0x12510000 0x1000>;
 111                 interrupts = <0 75 0>;
 112         };
 113
 114         sdhci@12520000 {
 115                 #address-cells = <1>;
 116                 #size-cells = <0>;
 117                 compatible = "samsung,exynos-mmc";
 118                 reg = <0x12520000 0x1000>;
 119                 interrupts = <0 76 0>;
 120         };
 121
 122         sdhci@12530000 {
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125                 compatible = "samsung,exynos-mmc";
 126                 reg = <0x12530000 0x1000>;
 127                 interrupts = <0 77 0>;
 128         };
 129
 130         sdhci@12540000 {
 131                 #address-cells = <1>;
 132                 #size-cells = <0>;
 133                 compatible = "samsung,exynos-mmc";
 134                 reg = <0x12540000 0x1000>;
 135                 interrupts = <0 78 0>;
 136         };
 137
 138         dwmmc@12550000 {
 139                 #address-cells = <1>;
 140                 #size-cells = <0>;
 141                 compatible = "samsung,exynos-dwmmc";
 142                 reg = <0x12550000 0x1000>;
 143                 interrupts = <0 131 0>;
 144         };
 145
 146         gpio: gpio {
 147                 gpio-controller;
 148                 #gpio-cells = <2>;
 149
 150                 interrupt-controller;
 151                 #interrupt-cells = <2>;
 152         };
 153 };