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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * SAMSUNG EXYNOS5420 SoC device tree source
5 */
6
7 #include "exynos5.dtsi"
8 #include "exynos54xx-pinctrl.dtsi"
9
10 / {
11 config {
12 machine-arch-id = <4151>;
13 };
14
15 aliases {
16 i2c0 = "/i2c@12C60000";
17 i2c1 = "/i2c@12C70000";
18 i2c2 = "/i2c@12C80000";
19 i2c3 = "/i2c@12C90000";
20 i2c4 = "/i2c@12CA0000";
21 i2c5 = "/i2c@12CB0000";
22 i2c6 = "/i2c@12CC0000";
23 i2c7 = "/i2c@12CD0000";
24 i2c8 = "/i2c@12E00000";
25 i2c9 = "/i2c@12E10000";
26 i2c10 = "/i2c@12E20000";
27 pinctrl0 = &pinctrl_0;
28 pinctrl1 = &pinctrl_1;
29 pinctrl2 = &pinctrl_2;
30 pinctrl3 = &pinctrl_3;
31 pinctrl4 = &pinctrl_4;
32 spi0 = "/spi@12d20000";
33 spi1 = "/spi@12d30000";
34 spi2 = "/spi@12d40000";
35 spi3 = "/spi@131a0000";
36 spi4 = "/spi@131b0000";
37 mmc0 = "/mmc@12200000";
38 mmc1 = "/mmc@12210000";
39 mmc2 = "/mmc@12220000";
40 xhci0 = "/xhci@12000000";
41 xhci1 = "/xhci@12400000";
42 };
43
44 adc@12D10000 {
45 compatible = "samsung,exynos-adc-v2";
46 reg = <0x12D10000 0x100>;
47 interrupts = <0 106 0>;
48 status = "disabled";
49 };
50
51 hsi2c_4: i2c@12CA0000 {
52 #address-cells = <1>;
53 #size-cells = <0>;
54 compatible = "samsung,exynos5-hsi2c";
55 reg = <0x12CA0000 0x100>;
56 interrupts = <0 60 0>;
57 };
58
59 i2c@12CB0000 {
60 #address-cells = <1>;
61 #size-cells = <0>;
62 compatible = "samsung,exynos5-hsi2c";
63 reg = <0x12CB0000 0x100>;
64 interrupts = <0 61 0>;
65 };
66
67 i2c@12CC0000 {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 compatible = "samsung,exynos5-hsi2c";
71 reg = <0x12CC0000 0x100>;
72 interrupts = <0 62 0>;
73 };
74
75 i2c@12CD0000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 compatible = "samsung,exynos5-hsi2c";
79 reg = <0x12CD0000 0x100>;
80 interrupts = <0 63 0>;
81 };
82
83 i2c@12E00000 {
84 #address-cells = <1>;
85 #size-cells = <0>;
86 compatible = "samsung,exynos5-hsi2c";
87 reg = <0x12E00000 0x100>;
88 interrupts = <0 87 0>;
89 };
90
91 i2c@12E10000 {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 compatible = "samsung,exynos5-hsi2c";
95 reg = <0x12E10000 0x100>;
96 interrupts = <0 88 0>;
97 };
98
99 i2c@12E20000 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "samsung,exynos5-hsi2c";
103 reg = <0x12E20000 0x100>;
104 interrupts = <0 203 0>;
105 };
106
107 mmc@12200000 {
108 samsung,bus-width = <8>;
109 samsung,timing = <1 3 3>;
110 samsung,removable = <0>;
111 samsung,pre-init;
112 };
113
114 mmc@12210000 {
115 status = "disabled";
116 };
117
118 mmc@12220000 {
119 samsung,bus-width = <4>;
120 samsung,timing = <1 2 3>;
121 samsung,removable = <1>;
122 };
123
124 mmc@12230000 {
125 status = "disabled";
126 };
127
128 fimdm0_sysmmu@0x14640000 {
129 compatible = "samsung,sysmmu-v3.3";
130 reg = <0x14640000 0x100>;
131 };
132
133 fimdm1_sysmmu@0x14680000 {
134 compatible = "samsung,sysmmu-v3.3";
135 reg = <0x14680000 0x100>;
136 };
137
138 pinctrl_0: pinctrl@13400000 {
139 compatible = "samsung,exynos5420-pinctrl";
140 reg = <0x13400000 0x1000>;
141 interrupts = <0 45 0>;
142
143 wakeup-interrupt-controller {
144 compatible = "samsung,exynos4210-wakeup-eint";
145 interrupt-parent = <&gic>;
146 interrupts = <0 32 0>;
147 };
148 };
149
150 pinctrl_1: pinctrl@13410000 {
151 compatible = "samsung,exynos5420-pinctrl";
152 reg = <0x13410000 0x1000>;
153 interrupts = <0 78 0>;
154 };
155
156 pinctrl_2: pinctrl@14000000 {
157 compatible = "samsung,exynos5420-pinctrl";
158 reg = <0x14000000 0x1000>;
159 interrupts = <0 46 0>;
160 };
161
162 pinctrl_3: pinctrl@14010000 {
163 compatible = "samsung,exynos5420-pinctrl";
164 reg = <0x14010000 0x1000>;
165 interrupts = <0 50 0>;
166 };
167
168 pinctrl_4: pinctrl@03860000 {
169 compatible = "samsung,exynos5420-pinctrl";
170 reg = <0x03860000 0x1000>;
171 interrupts = <0 47 0>;
172 };
173
174 fimd@14400000 {
175 /* sysmmu is not used in U-Boot */
176 samsung,disable-sysmmu;
177 samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
178 };
179
180 dp: dp@145b0000 {
181 samsung,lt-status = <0>;
182
183 samsung,master-mode = <0>;
184 samsung,bist-mode = <0>;
185 samsung,bist-pattern = <0>;
186 samsung,h-sync-polarity = <0>;
187 samsung,v-sync-polarity = <0>;
188 samsung,interlaced = <0>;
189 samsung,color-space = <0>;
190 samsung,dynamic-range = <0>;
191 samsung,ycbcr-coeff = <0>;
192 samsung,color-depth = <1>;
193 };
194
195 dmc {
196 mem-type = "ddr3";
197 };
198
199 pwm: pwm@12dd0000 {
200 compatible = "samsung,exynos4210-pwm";
201 reg = <0x12dd0000 0x100>;
202 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
203 #pwm-cells = <3>;
204 };
205
206 xhci1: xhci@12400000 {
207 compatible = "samsung,exynos5250-xhci";
208 reg = <0x12400000 0x10000>;
209 #address-cells = <1>;
210 #size-cells = <1>;
211
212 phy {
213 compatible = "samsung,exynos5250-usb3-phy";
214 reg = <0x12500000 0x100>;
215 };
216 };
217 };