arch/arm/dts/k3-am625-r5-sk.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * AM625 SK dts file for R5 SPL
   4  * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
   5  */
   6
   7 #include "k3-am625-sk.dts"
   8 #include "k3-am62x-sk-ddr4-1600MTs.dtsi"
   9 #include "k3-am62-ddr.dtsi"
  10
  11 #include "k3-am625-sk-u-boot.dtsi"
  12
  13 / {
  14         aliases {
  15                 remoteproc0 = &sysctrler;
  16                 remoteproc1 = &a53_0;
  17                 serial0 = &wkup_uart0;
  18                 serial3 = &main_uart1;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial2:115200n8";
  23                 tick-timer = &timer1;
  24         };
  25
  26         memory@80000000 {
  27                 device_type = "memory";
  28                 /* 2G RAM */
  29                 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
  30
  31                 u-boot,dm-spl;
  32         };
  33
  34         reserved-memory {
  35                 #address-cells = <2>;
  36                 #size-cells = <2>;
  37                 ranges;
  38
  39                 secure_ddr: optee@9e800000 {
  40                         reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
  41                         alignment = <0x1000>;
  42                         no-map;
  43                 };
  44         };
  45
  46         a53_0: a53@0 {
  47                 compatible = "ti,am654-rproc";
  48                 reg = <0x00 0x00a90000 0x00 0x10>;
  49                 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
  50                                 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>;
  51                 resets = <&k3_reset 135 0>;
  52                 clocks = <&k3_clks 61 0>;
  53                 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
  54                 assigned-clock-parents = <&k3_clks 61 2>;
  55                 assigned-clock-rates = <200000000>, <1200000000>;
  56                 ti,sci = <&dmsc>;
  57                 ti,sci-proc-id = <32>;
  58                 ti,sci-host-id = <10>;
  59                 u-boot,dm-spl;
  60         };
  61
  62         dm_tifs: dm-tifs {
  63                 compatible = "ti,j721e-dm-sci";
  64                 ti,host-id = <36>;
  65                 ti,secure-host;
  66                 mbox-names = "rx", "tx";
  67                 mboxes= <&secure_proxy_main 22>,
  68                         <&secure_proxy_main 23>;
  69                 u-boot,dm-spl;
  70         };
  71 };
  72
  73 &dmsc {
  74         mboxes= <&secure_proxy_main 0>,
  75                 <&secure_proxy_main 1>,
  76                 <&secure_proxy_main 0>;
  77         mbox-names = "rx", "tx", "notify";
  78         ti,host-id = <35>;
  79         ti,secure-host;
  80 };
  81
  82 &cbass_mcu {
  83         mcu_esm: esm@4100000 {
  84                 compatible = "ti,j721e-esm";
  85                 reg = <0x0 0x4100000 0x0 0x1000>;
  86                 ti,esm-pins = <0>, <1>, <2>, <85>;
  87                 u-boot,dm-spl;
  88         };
  89 };
  90
  91 &cbass_main {
  92         sa3_secproxy: secproxy@44880000 {
  93                 u-boot,dm-spl;
  94                 compatible = "ti,am654-secure-proxy";
  95                 #mbox-cells = <1>;
  96                 reg-names = "rt", "scfg", "target_data";
  97                 reg = <0x00 0x44880000 0x00 0x20000>,
  98                       <0x0 0x44860000 0x0 0x20000>,
  99                       <0x0 0x43600000 0x0 0x10000>;
 100         };
 101
 102         sysctrler: sysctrler {
 103                 compatible = "ti,am654-system-controller";
 104                 mboxes= <&secure_proxy_main 1>, <&secure_proxy_main 0>, <&sa3_secproxy 0>;
 105                 mbox-names = "tx", "rx", "boot_notify";
 106                 u-boot,dm-spl;
 107         };
 108
 109         main_esm: esm@420000 {
 110                 compatible = "ti,j721e-esm";
 111                 reg = <0x0 0x420000 0x0 0x1000>;
 112                 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
 113                 u-boot,dm-spl;
 114         };
 115 };
 116
 117 &mcu_pmx0 {
 118         u-boot,dm-spl;
 119         wkup_uart0_pins_default: wkup-uart0-pins-default {
 120                 pinctrl-single,pins = <
 121                         AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6) WKUP_UART0_CTSn */
 122                         AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4) WKUP_UART0_RTSn */
 123                         AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4) WKUP_UART0_RXD */
 124                         AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5) WKUP_UART0_TXD */
 125                 >;
 126                 u-boot,dm-spl;
 127         };
 128 };
 129
 130 &main_pmx0 {
 131         u-boot,dm-spl;
 132         main_uart1_pins_default: main-uart1-pins-default {
 133                 pinctrl-single,pins = <
 134                         AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */
 135                         AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */
 136                         AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */
 137                         AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */
 138                 >;
 139                 u-boot,dm-spl;
 140         };
 141 };
 142
 143 /* WKUP UART0 is used for DM firmware logs */
 144 &wkup_uart0 {
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&wkup_uart0_pins_default>;
 147         status = "okay";
 148         u-boot,dm-spl;
 149 };
 150
 151 /* Main UART1 is used for TIFS firmware logs */
 152 &main_uart1 {
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&main_uart1_pins_default>;
 155         status = "okay";
 156         u-boot,dm-spl;
 157 };
 158
 159 &ospi0 {
 160         reg = <0x00 0x0fc40000 0x00 0x100>,
 161               <0x00 0x60000000 0x00 0x08000000>;
 162 };