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1 /*
2 * Device Tree Source for OMAP3 SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/media/omap3-isp.h>
12
13 #include "omap3.dtsi"
14
15 / {
16 aliases {
17 serial3 = &uart4;
18 };
19
20 cpus {
21 /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */
22 cpu: cpu@0 {
23 operating-points = <
24 /* kHz uV */
25 300000 1012500
26 600000 1200000
27 800000 1325000
28 >;
29 clock-latency = <300000>; /* From legacy driver */
30 };
31 };
32
33 ocp@68000000 {
34 uart4: serial@49042000 {
35 compatible = "ti,omap3-uart";
36 reg = <0x49042000 0x400>;
37 reg-shift = <2>;
38 interrupts = <80>;
39 dmas = <&sdma 81 &sdma 82>;
40 dma-names = "tx", "rx";
41 ti,hwmods = "uart4";
42 clock-frequency = <48000000>;
43 };
44
45 abb_mpu_iva: regulator-abb-mpu {
46 compatible = "ti,abb-v1";
47 regulator-name = "abb_mpu_iva";
48 #address-cells = <0>;
49 #size-cells = <0>;
50 reg = <0x483072f0 0x8>, <0x48306818 0x4>;
51 reg-names = "base-address", "int-address";
52 ti,tranxdone-status-mask = <0x4000000>;
53 clocks = <&sys_ck>;
54 ti,settling-time = <30>;
55 ti,clock-cycles = <8>;
56 ti,abb_info = <
57 /*uV ABB efuse rbb_m fbb_m vset_m*/
58 1012500 0 0 0 0 0
59 1200000 0 0 0 0 0
60 1325000 0 0 0 0 0
61 1375000 1 0 0 0 0
62 >;
63 };
64
65 omap3_pmx_core2: pinmux@480025a0 {
66 compatible = "ti,omap3-padconf", "pinctrl-single";
67 reg = <0x480025a0 0x5c>;
68 #address-cells = <1>;
69 #size-cells = <0>;
70 #pinctrl-cells = <1>;
71 #interrupt-cells = <1>;
72 interrupt-controller;
73 pinctrl-single,register-width = <16>;
74 pinctrl-single,function-mask = <0xff1f>;
75 };
76
77 isp: isp@480bc000 {
78 compatible = "ti,omap3-isp";
79 reg = <0x480bc000 0x12fc
80 0x480bd800 0x0600>;
81 interrupts = <24>;
82 iommus = <&mmu_isp>;
83 syscon = <&scm_conf 0x2f0>;
84 ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
85 #clock-cells = <1>;
86 ports {
87 #address-cells = <1>;
88 #size-cells = <0>;
89 };
90 };
91
92 bandgap: bandgap@48002524 {
93 reg = <0x48002524 0x4>;
94 compatible = "ti,omap36xx-bandgap";
95 #thermal-sensor-cells = <0>;
96 };
97 };
98
99 thermal_zones: thermal-zones {
100 #include "omap3-cpu-thermal.dtsi"
101 };
102 };
103
104 /* OMAP3630 needs dss_96m_fck for VENC */
105 &venc {
106 clocks = <&dss_tv_fck>, <&dss_96m_fck>;
107 clock-names = "fck", "tv_dac_clk";
108 };
109
110 &ssi {
111 status = "ok";
112
113 clocks = <&ssi_ssr_fck>,
114 <&ssi_sst_fck>,
115 <&ssi_ick>;
116 clock-names = "ssi_ssr_fck",
117 "ssi_sst_fck",
118 "ssi_ick";
119 };
120
121 /include/ "omap34xx-omap36xx-clocks.dtsi"
122 /include/ "omap36xx-omap3430es2plus-clocks.dtsi"
123 /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
124 /include/ "omap36xx-clocks.dtsi"