arch/arm/dts/px30-u-boot.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include "rockchip-u-boot.dtsi"
   7
   8 / {
   9         aliases {
  10                 mmc0 = &emmc;
  11                 mmc1 = &sdmmc;
  12         };
  13
  14         chosen {
  15                 u-boot,spl-boot-order = &emmc, &sdmmc;
  16         };
  17
  18         dmc {
  19                 u-boot,dm-pre-reloc;
  20                 compatible = "rockchip,px30-dmc", "syscon";
  21                 reg = <0x0 0xff2a0000 0x0 0x1000>;
  22         };
  23
  24         rng: rng@ff0b0000 {
  25                 compatible = "rockchip,cryptov2-rng";
  26                 reg = <0x0 0xff0b0000 0x0 0x4000>;
  27                 status = "disabled";
  28         };
  29 };
  30
  31 &uart2 {
  32         clock-frequency = <24000000>;
  33         u-boot,dm-pre-reloc;
  34 };
  35
  36 &uart5 {
  37         clock-frequency = <24000000>;
  38         u-boot,dm-pre-reloc;
  39 };
  40
  41 &sdmmc {
  42         u-boot,dm-pre-reloc;
  43
  44         /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
  45         u-boot,spl-fifo-mode;
  46 };
  47
  48 &emmc {
  49         u-boot,dm-pre-reloc;
  50
  51         /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
  52         u-boot,spl-fifo-mode;
  53 };
  54
  55 &grf {
  56         u-boot,dm-pre-reloc;
  57 };
  58
  59 &pmugrf {
  60         u-boot,dm-pre-reloc;
  61 };
  62
  63 &xin24m {
  64         u-boot,dm-pre-reloc;
  65 };
  66
  67 &cru {
  68         u-boot,dm-pre-reloc;
  69         /delete-property/ assigned-clocks;
  70         /delete-property/ assigned-clock-rates;
  71 };
  72
  73 &pmucru {
  74         u-boot,dm-pre-reloc;
  75         /delete-property/ assigned-clocks;
  76         /delete-property/ assigned-clock-rates;
  77 };
  78
  79 &saradc {
  80         u-boot,dm-pre-reloc;
  81         status = "okay";
  82 };
  83
  84 &gpio0 {
  85         u-boot,dm-pre-reloc;
  86 };
  87
  88 &gpio1 {
  89         u-boot,dm-pre-reloc;
  90 };
  91
  92 &gpio2 {
  93         u-boot,dm-pre-reloc;
  94 };
  95
  96 &gpio3 {
  97         u-boot,dm-pre-reloc;
  98 };