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Merge tag 'u-boot-rockchip-20190809' of https://gitlab.denx.de/u-boot/custodians...
[thirdparty/u-boot.git] / arch / arm / dts / r8a77965.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
4 *
5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
6 *
7 * Based on r8a7796.dtsi
8 * Copyright (C) 2016 Renesas Electronics Corp.
9 */
10
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
14
15 #define CPG_AUDIO_CLK_I R8A77965_CLK_S0D4
16
17 / {
18 compatible = "renesas,r8a77965";
19 #address-cells = <2>;
20 #size-cells = <2>;
21
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &i2c4;
28 i2c5 = &i2c5;
29 i2c6 = &i2c6;
30 i2c7 = &i2c_dvfs;
31 };
32
33 /*
34 * The external audio clocks are configured as 0 Hz fixed frequency
35 * clocks by default.
36 * Boards that provide audio clocks should override them.
37 */
38 audio_clk_a: audio_clk_a {
39 compatible = "fixed-clock";
40 #clock-cells = <0>;
41 clock-frequency = <0>;
42 };
43
44 audio_clk_b: audio_clk_b {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49
50 audio_clk_c: audio_clk_c {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <0>;
54 };
55
56 /* External CAN clock - to be overridden by boards that provide it */
57 can_clk: can {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <0>;
61 };
62
63 cluster0_opp: opp_table0 {
64 compatible = "operating-points-v2";
65 opp-shared;
66
67 opp-500000000 {
68 opp-hz = /bits/ 64 <500000000>;
69 opp-microvolt = <830000>;
70 clock-latency-ns = <300000>;
71 };
72 opp-1000000000 {
73 opp-hz = /bits/ 64 <1000000000>;
74 opp-microvolt = <830000>;
75 clock-latency-ns = <300000>;
76 };
77 opp-1500000000 {
78 opp-hz = /bits/ 64 <1500000000>;
79 opp-microvolt = <830000>;
80 clock-latency-ns = <300000>;
81 opp-suspend;
82 };
83 opp-1600000000 {
84 opp-hz = /bits/ 64 <1600000000>;
85 opp-microvolt = <900000>;
86 clock-latency-ns = <300000>;
87 turbo-mode;
88 };
89 opp-1700000000 {
90 opp-hz = /bits/ 64 <1700000000>;
91 opp-microvolt = <900000>;
92 clock-latency-ns = <300000>;
93 turbo-mode;
94 };
95 opp-1800000000 {
96 opp-hz = /bits/ 64 <1800000000>;
97 opp-microvolt = <960000>;
98 clock-latency-ns = <300000>;
99 turbo-mode;
100 };
101 };
102
103 cpus {
104 #address-cells = <1>;
105 #size-cells = <0>;
106
107 a57_0: cpu@0 {
108 compatible = "arm,cortex-a57";
109 reg = <0x0>;
110 device_type = "cpu";
111 power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
112 next-level-cache = <&L2_CA57>;
113 enable-method = "psci";
114 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
115 operating-points-v2 = <&cluster0_opp>;
116 };
117
118 a57_1: cpu@1 {
119 compatible = "arm,cortex-a57";
120 reg = <0x1>;
121 device_type = "cpu";
122 power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
123 next-level-cache = <&L2_CA57>;
124 enable-method = "psci";
125 clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
126 operating-points-v2 = <&cluster0_opp>;
127 };
128
129 L2_CA57: cache-controller-0 {
130 compatible = "cache";
131 power-domains = <&sysc R8A77965_PD_CA57_SCU>;
132 cache-unified;
133 cache-level = <2>;
134 };
135 };
136
137 extal_clk: extal {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 /* This value must be overridden by the board */
141 clock-frequency = <0>;
142 };
143
144 extalr_clk: extalr {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 /* This value must be overridden by the board */
148 clock-frequency = <0>;
149 };
150
151 /* External PCIe clock - can be overridden by the board */
152 pcie_bus_clk: pcie_bus {
153 compatible = "fixed-clock";
154 #clock-cells = <0>;
155 clock-frequency = <0>;
156 };
157
158 pmu_a57 {
159 compatible = "arm,cortex-a57-pmu";
160 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
161 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-affinity = <&a57_0>,
163 <&a57_1>;
164 };
165
166 psci {
167 compatible = "arm,psci-1.0", "arm,psci-0.2";
168 method = "smc";
169 };
170
171 /* External SCIF clock - to be overridden by boards that provide it */
172 scif_clk: scif {
173 compatible = "fixed-clock";
174 #clock-cells = <0>;
175 clock-frequency = <0>;
176 };
177
178 soc {
179 compatible = "simple-bus";
180 interrupt-parent = <&gic>;
181 #address-cells = <2>;
182 #size-cells = <2>;
183 ranges;
184
185 rwdt: watchdog@e6020000 {
186 compatible = "renesas,r8a77965-wdt",
187 "renesas,rcar-gen3-wdt";
188 reg = <0 0xe6020000 0 0x0c>;
189 clocks = <&cpg CPG_MOD 402>;
190 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
191 resets = <&cpg 402>;
192 status = "disabled";
193 };
194
195 gpio0: gpio@e6050000 {
196 compatible = "renesas,gpio-r8a77965",
197 "renesas,rcar-gen3-gpio";
198 reg = <0 0xe6050000 0 0x50>;
199 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
200 #gpio-cells = <2>;
201 gpio-controller;
202 gpio-ranges = <&pfc 0 0 16>;
203 #interrupt-cells = <2>;
204 interrupt-controller;
205 clocks = <&cpg CPG_MOD 912>;
206 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
207 resets = <&cpg 912>;
208 };
209
210 gpio1: gpio@e6051000 {
211 compatible = "renesas,gpio-r8a77965",
212 "renesas,rcar-gen3-gpio";
213 reg = <0 0xe6051000 0 0x50>;
214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0 32 29>;
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 911>;
221 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
222 resets = <&cpg 911>;
223 };
224
225 gpio2: gpio@e6052000 {
226 compatible = "renesas,gpio-r8a77965",
227 "renesas,rcar-gen3-gpio";
228 reg = <0 0xe6052000 0 0x50>;
229 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
230 #gpio-cells = <2>;
231 gpio-controller;
232 gpio-ranges = <&pfc 0 64 15>;
233 #interrupt-cells = <2>;
234 interrupt-controller;
235 clocks = <&cpg CPG_MOD 910>;
236 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
237 resets = <&cpg 910>;
238 };
239
240 gpio3: gpio@e6053000 {
241 compatible = "renesas,gpio-r8a77965",
242 "renesas,rcar-gen3-gpio";
243 reg = <0 0xe6053000 0 0x50>;
244 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
245 #gpio-cells = <2>;
246 gpio-controller;
247 gpio-ranges = <&pfc 0 96 16>;
248 #interrupt-cells = <2>;
249 interrupt-controller;
250 clocks = <&cpg CPG_MOD 909>;
251 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
252 resets = <&cpg 909>;
253 };
254
255 gpio4: gpio@e6054000 {
256 compatible = "renesas,gpio-r8a77965",
257 "renesas,rcar-gen3-gpio";
258 reg = <0 0xe6054000 0 0x50>;
259 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
260 #gpio-cells = <2>;
261 gpio-controller;
262 gpio-ranges = <&pfc 0 128 18>;
263 #interrupt-cells = <2>;
264 interrupt-controller;
265 clocks = <&cpg CPG_MOD 908>;
266 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
267 resets = <&cpg 908>;
268 };
269
270 gpio5: gpio@e6055000 {
271 compatible = "renesas,gpio-r8a77965",
272 "renesas,rcar-gen3-gpio";
273 reg = <0 0xe6055000 0 0x50>;
274 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
275 #gpio-cells = <2>;
276 gpio-controller;
277 gpio-ranges = <&pfc 0 160 26>;
278 #interrupt-cells = <2>;
279 interrupt-controller;
280 clocks = <&cpg CPG_MOD 907>;
281 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
282 resets = <&cpg 907>;
283 };
284
285 gpio6: gpio@e6055400 {
286 compatible = "renesas,gpio-r8a77965",
287 "renesas,rcar-gen3-gpio";
288 reg = <0 0xe6055400 0 0x50>;
289 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
290 #gpio-cells = <2>;
291 gpio-controller;
292 gpio-ranges = <&pfc 0 192 32>;
293 #interrupt-cells = <2>;
294 interrupt-controller;
295 clocks = <&cpg CPG_MOD 906>;
296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
297 resets = <&cpg 906>;
298 };
299
300 gpio7: gpio@e6055800 {
301 compatible = "renesas,gpio-r8a77965",
302 "renesas,rcar-gen3-gpio";
303 reg = <0 0xe6055800 0 0x50>;
304 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
305 #gpio-cells = <2>;
306 gpio-controller;
307 gpio-ranges = <&pfc 0 224 4>;
308 #interrupt-cells = <2>;
309 interrupt-controller;
310 clocks = <&cpg CPG_MOD 905>;
311 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
312 resets = <&cpg 905>;
313 };
314
315 pfc: pin-controller@e6060000 {
316 compatible = "renesas,pfc-r8a77965";
317 reg = <0 0xe6060000 0 0x50c>;
318 };
319
320 cmt0: timer@e60f0000 {
321 compatible = "renesas,r8a77965-cmt0",
322 "renesas,rcar-gen3-cmt0";
323 reg = <0 0xe60f0000 0 0x1004>;
324 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
325 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
326 clocks = <&cpg CPG_MOD 303>;
327 clock-names = "fck";
328 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
329 resets = <&cpg 303>;
330 status = "disabled";
331 };
332
333 cmt1: timer@e6130000 {
334 compatible = "renesas,r8a77965-cmt1",
335 "renesas,rcar-gen3-cmt1";
336 reg = <0 0xe6130000 0 0x1004>;
337 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
340 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
341 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
345 clocks = <&cpg CPG_MOD 302>;
346 clock-names = "fck";
347 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
348 resets = <&cpg 302>;
349 status = "disabled";
350 };
351
352 cmt2: timer@e6140000 {
353 compatible = "renesas,r8a77965-cmt1",
354 "renesas,rcar-gen3-cmt1";
355 reg = <0 0xe6140000 0 0x1004>;
356 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
357 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
363 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
364 clocks = <&cpg CPG_MOD 301>;
365 clock-names = "fck";
366 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
367 resets = <&cpg 301>;
368 status = "disabled";
369 };
370
371 cmt3: timer@e6148000 {
372 compatible = "renesas,r8a77965-cmt1",
373 "renesas,rcar-gen3-cmt1";
374 reg = <0 0xe6148000 0 0x1004>;
375 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
376 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
377 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
378 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
379 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
380 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&cpg CPG_MOD 300>;
384 clock-names = "fck";
385 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
386 resets = <&cpg 300>;
387 status = "disabled";
388 };
389
390 cpg: clock-controller@e6150000 {
391 compatible = "renesas,r8a77965-cpg-mssr";
392 reg = <0 0xe6150000 0 0x1000>;
393 clocks = <&extal_clk>, <&extalr_clk>;
394 clock-names = "extal", "extalr";
395 #clock-cells = <2>;
396 #power-domain-cells = <0>;
397 #reset-cells = <1>;
398 };
399
400 rst: reset-controller@e6160000 {
401 compatible = "renesas,r8a77965-rst";
402 reg = <0 0xe6160000 0 0x0200>;
403 };
404
405 sysc: system-controller@e6180000 {
406 compatible = "renesas,r8a77965-sysc";
407 reg = <0 0xe6180000 0 0x0400>;
408 #power-domain-cells = <1>;
409 };
410
411 tsc: thermal@e6198000 {
412 compatible = "renesas,r8a77965-thermal";
413 reg = <0 0xe6198000 0 0x100>,
414 <0 0xe61a0000 0 0x100>,
415 <0 0xe61a8000 0 0x100>;
416 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
417 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
418 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&cpg CPG_MOD 522>;
420 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
421 resets = <&cpg 522>;
422 #thermal-sensor-cells = <1>;
423 };
424
425 intc_ex: interrupt-controller@e61c0000 {
426 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
427 #interrupt-cells = <2>;
428 interrupt-controller;
429 reg = <0 0xe61c0000 0 0x200>;
430 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
436 clocks = <&cpg CPG_MOD 407>;
437 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
438 resets = <&cpg 407>;
439 };
440
441 i2c0: i2c@e6500000 {
442 #address-cells = <1>;
443 #size-cells = <0>;
444 compatible = "renesas,i2c-r8a77965",
445 "renesas,rcar-gen3-i2c";
446 reg = <0 0xe6500000 0 0x40>;
447 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
448 clocks = <&cpg CPG_MOD 931>;
449 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
450 resets = <&cpg 931>;
451 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
452 <&dmac2 0x91>, <&dmac2 0x90>;
453 dma-names = "tx", "rx", "tx", "rx";
454 i2c-scl-internal-delay-ns = <110>;
455 status = "disabled";
456 };
457
458 i2c1: i2c@e6508000 {
459 #address-cells = <1>;
460 #size-cells = <0>;
461 compatible = "renesas,i2c-r8a77965",
462 "renesas,rcar-gen3-i2c";
463 reg = <0 0xe6508000 0 0x40>;
464 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&cpg CPG_MOD 930>;
466 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
467 resets = <&cpg 930>;
468 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
469 <&dmac2 0x93>, <&dmac2 0x92>;
470 dma-names = "tx", "rx", "tx", "rx";
471 i2c-scl-internal-delay-ns = <6>;
472 status = "disabled";
473 };
474
475 i2c2: i2c@e6510000 {
476 #address-cells = <1>;
477 #size-cells = <0>;
478 compatible = "renesas,i2c-r8a77965",
479 "renesas,rcar-gen3-i2c";
480 reg = <0 0xe6510000 0 0x40>;
481 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
482 clocks = <&cpg CPG_MOD 929>;
483 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
484 resets = <&cpg 929>;
485 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
486 <&dmac2 0x95>, <&dmac2 0x94>;
487 dma-names = "tx", "rx", "tx", "rx";
488 i2c-scl-internal-delay-ns = <6>;
489 status = "disabled";
490 };
491
492 i2c3: i2c@e66d0000 {
493 #address-cells = <1>;
494 #size-cells = <0>;
495 compatible = "renesas,i2c-r8a77965",
496 "renesas,rcar-gen3-i2c";
497 reg = <0 0xe66d0000 0 0x40>;
498 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 928>;
500 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
501 resets = <&cpg 928>;
502 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
503 dma-names = "tx", "rx";
504 i2c-scl-internal-delay-ns = <110>;
505 status = "disabled";
506 };
507
508 i2c4: i2c@e66d8000 {
509 #address-cells = <1>;
510 #size-cells = <0>;
511 compatible = "renesas,i2c-r8a77965",
512 "renesas,rcar-gen3-i2c";
513 reg = <0 0xe66d8000 0 0x40>;
514 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
515 clocks = <&cpg CPG_MOD 927>;
516 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
517 resets = <&cpg 927>;
518 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
519 dma-names = "tx", "rx";
520 i2c-scl-internal-delay-ns = <110>;
521 status = "disabled";
522 };
523
524 i2c5: i2c@e66e0000 {
525 #address-cells = <1>;
526 #size-cells = <0>;
527 compatible = "renesas,i2c-r8a77965",
528 "renesas,rcar-gen3-i2c";
529 reg = <0 0xe66e0000 0 0x40>;
530 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
531 clocks = <&cpg CPG_MOD 919>;
532 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
533 resets = <&cpg 919>;
534 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
535 dma-names = "tx", "rx";
536 i2c-scl-internal-delay-ns = <110>;
537 status = "disabled";
538 };
539
540 i2c6: i2c@e66e8000 {
541 #address-cells = <1>;
542 #size-cells = <0>;
543 compatible = "renesas,i2c-r8a77965",
544 "renesas,rcar-gen3-i2c";
545 reg = <0 0xe66e8000 0 0x40>;
546 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
547 clocks = <&cpg CPG_MOD 918>;
548 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
549 resets = <&cpg 918>;
550 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
551 dma-names = "tx", "rx";
552 i2c-scl-internal-delay-ns = <6>;
553 status = "disabled";
554 };
555
556 i2c_dvfs: i2c@e60b0000 {
557 #address-cells = <1>;
558 #size-cells = <0>;
559 compatible = "renesas,iic-r8a77965",
560 "renesas,rcar-gen3-iic",
561 "renesas,rmobile-iic";
562 reg = <0 0xe60b0000 0 0x425>;
563 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 926>;
565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
566 resets = <&cpg 926>;
567 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
568 dma-names = "tx", "rx";
569 status = "disabled";
570 };
571
572 hscif0: serial@e6540000 {
573 compatible = "renesas,hscif-r8a77965",
574 "renesas,rcar-gen3-hscif",
575 "renesas,hscif";
576 reg = <0 0xe6540000 0 0x60>;
577 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
578 clocks = <&cpg CPG_MOD 520>,
579 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
580 <&scif_clk>;
581 clock-names = "fck", "brg_int", "scif_clk";
582 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
583 <&dmac2 0x31>, <&dmac2 0x30>;
584 dma-names = "tx", "rx", "tx", "rx";
585 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
586 resets = <&cpg 520>;
587 status = "disabled";
588 };
589
590 hscif1: serial@e6550000 {
591 compatible = "renesas,hscif-r8a77965",
592 "renesas,rcar-gen3-hscif",
593 "renesas,hscif";
594 reg = <0 0xe6550000 0 0x60>;
595 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
596 clocks = <&cpg CPG_MOD 519>,
597 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
598 <&scif_clk>;
599 clock-names = "fck", "brg_int", "scif_clk";
600 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
601 <&dmac2 0x33>, <&dmac2 0x32>;
602 dma-names = "tx", "rx", "tx", "rx";
603 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
604 resets = <&cpg 519>;
605 status = "disabled";
606 };
607
608 hscif2: serial@e6560000 {
609 compatible = "renesas,hscif-r8a77965",
610 "renesas,rcar-gen3-hscif",
611 "renesas,hscif";
612 reg = <0 0xe6560000 0 0x60>;
613 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
614 clocks = <&cpg CPG_MOD 518>,
615 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
616 <&scif_clk>;
617 clock-names = "fck", "brg_int", "scif_clk";
618 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
619 <&dmac2 0x35>, <&dmac2 0x34>;
620 dma-names = "tx", "rx", "tx", "rx";
621 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
622 resets = <&cpg 518>;
623 status = "disabled";
624 };
625
626 hscif3: serial@e66a0000 {
627 compatible = "renesas,hscif-r8a77965",
628 "renesas,rcar-gen3-hscif",
629 "renesas,hscif";
630 reg = <0 0xe66a0000 0 0x60>;
631 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
632 clocks = <&cpg CPG_MOD 517>,
633 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
634 <&scif_clk>;
635 clock-names = "fck", "brg_int", "scif_clk";
636 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
637 dma-names = "tx", "rx";
638 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
639 resets = <&cpg 517>;
640 status = "disabled";
641 };
642
643 hscif4: serial@e66b0000 {
644 compatible = "renesas,hscif-r8a77965",
645 "renesas,rcar-gen3-hscif",
646 "renesas,hscif";
647 reg = <0 0xe66b0000 0 0x60>;
648 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
649 clocks = <&cpg CPG_MOD 516>,
650 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
651 <&scif_clk>;
652 clock-names = "fck", "brg_int", "scif_clk";
653 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
654 dma-names = "tx", "rx";
655 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
656 resets = <&cpg 516>;
657 status = "disabled";
658 };
659
660 hsusb: usb@e6590000 {
661 compatible = "renesas,usbhs-r8a77965",
662 "renesas,rcar-gen3-usbhs";
663 reg = <0 0xe6590000 0 0x200>;
664 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
665 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
666 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
667 <&usb_dmac1 0>, <&usb_dmac1 1>;
668 dma-names = "ch0", "ch1", "ch2", "ch3";
669 renesas,buswait = <11>;
670 phys = <&usb2_phy0>;
671 phy-names = "usb";
672 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
673 resets = <&cpg 704>, <&cpg 703>;
674 status = "disabled";
675 };
676
677 usb_dmac0: dma-controller@e65a0000 {
678 compatible = "renesas,r8a77965-usb-dmac",
679 "renesas,usb-dmac";
680 reg = <0 0xe65a0000 0 0x100>;
681 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
682 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
683 interrupt-names = "ch0", "ch1";
684 clocks = <&cpg CPG_MOD 330>;
685 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
686 resets = <&cpg 330>;
687 #dma-cells = <1>;
688 dma-channels = <2>;
689 };
690
691 usb_dmac1: dma-controller@e65b0000 {
692 compatible = "renesas,r8a77965-usb-dmac",
693 "renesas,usb-dmac";
694 reg = <0 0xe65b0000 0 0x100>;
695 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
696 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
697 interrupt-names = "ch0", "ch1";
698 clocks = <&cpg CPG_MOD 331>;
699 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
700 resets = <&cpg 331>;
701 #dma-cells = <1>;
702 dma-channels = <2>;
703 };
704
705 usb3_phy0: usb-phy@e65ee000 {
706 compatible = "renesas,r8a77965-usb3-phy",
707 "renesas,rcar-gen3-usb3-phy";
708 reg = <0 0xe65ee000 0 0x90>;
709 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
710 <&usb_extal_clk>;
711 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
712 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
713 resets = <&cpg 328>;
714 #phy-cells = <0>;
715 status = "disabled";
716 };
717
718 dmac0: dma-controller@e6700000 {
719 compatible = "renesas,dmac-r8a77965",
720 "renesas,rcar-dmac";
721 reg = <0 0xe6700000 0 0x10000>;
722 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
723 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
724 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
725 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
726 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
727 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
728 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
729 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
730 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
731 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
732 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
733 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
734 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
735 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
736 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
737 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
738 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
739 interrupt-names = "error",
740 "ch0", "ch1", "ch2", "ch3",
741 "ch4", "ch5", "ch6", "ch7",
742 "ch8", "ch9", "ch10", "ch11",
743 "ch12", "ch13", "ch14", "ch15";
744 clocks = <&cpg CPG_MOD 219>;
745 clock-names = "fck";
746 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
747 resets = <&cpg 219>;
748 #dma-cells = <1>;
749 dma-channels = <16>;
750 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
751 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
752 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
753 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
754 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
755 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
756 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
757 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
758 };
759
760 dmac1: dma-controller@e7300000 {
761 compatible = "renesas,dmac-r8a77965",
762 "renesas,rcar-dmac";
763 reg = <0 0xe7300000 0 0x10000>;
764 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
765 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
766 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
767 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
768 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
769 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
770 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
771 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
772 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
773 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
774 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
775 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
776 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
777 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
778 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
779 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
780 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
781 interrupt-names = "error",
782 "ch0", "ch1", "ch2", "ch3",
783 "ch4", "ch5", "ch6", "ch7",
784 "ch8", "ch9", "ch10", "ch11",
785 "ch12", "ch13", "ch14", "ch15";
786 clocks = <&cpg CPG_MOD 218>;
787 clock-names = "fck";
788 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
789 resets = <&cpg 218>;
790 #dma-cells = <1>;
791 dma-channels = <16>;
792 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
793 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
794 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
795 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
796 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
797 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
798 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
799 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
800 };
801
802 dmac2: dma-controller@e7310000 {
803 compatible = "renesas,dmac-r8a77965",
804 "renesas,rcar-dmac";
805 reg = <0 0xe7310000 0 0x10000>;
806 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
807 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
808 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
809 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
810 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
811 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
812 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
813 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
814 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
815 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
816 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
817 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
818 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
819 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
820 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
821 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
822 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
823 interrupt-names = "error",
824 "ch0", "ch1", "ch2", "ch3",
825 "ch4", "ch5", "ch6", "ch7",
826 "ch8", "ch9", "ch10", "ch11",
827 "ch12", "ch13", "ch14", "ch15";
828 clocks = <&cpg CPG_MOD 217>;
829 clock-names = "fck";
830 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
831 resets = <&cpg 217>;
832 #dma-cells = <1>;
833 dma-channels = <16>;
834 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
835 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
836 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
837 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
838 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
839 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
840 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
841 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
842 };
843
844 ipmmu_ds0: mmu@e6740000 {
845 compatible = "renesas,ipmmu-r8a77965";
846 reg = <0 0xe6740000 0 0x1000>;
847 renesas,ipmmu-main = <&ipmmu_mm 0>;
848 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
849 #iommu-cells = <1>;
850 };
851
852 ipmmu_ds1: mmu@e7740000 {
853 compatible = "renesas,ipmmu-r8a77965";
854 reg = <0 0xe7740000 0 0x1000>;
855 renesas,ipmmu-main = <&ipmmu_mm 1>;
856 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
857 #iommu-cells = <1>;
858 };
859
860 ipmmu_hc: mmu@e6570000 {
861 compatible = "renesas,ipmmu-r8a77965";
862 reg = <0 0xe6570000 0 0x1000>;
863 renesas,ipmmu-main = <&ipmmu_mm 2>;
864 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
865 #iommu-cells = <1>;
866 };
867
868 ipmmu_mm: mmu@e67b0000 {
869 compatible = "renesas,ipmmu-r8a77965";
870 reg = <0 0xe67b0000 0 0x1000>;
871 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
873 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
874 #iommu-cells = <1>;
875 };
876
877 ipmmu_mp: mmu@ec670000 {
878 compatible = "renesas,ipmmu-r8a77965";
879 reg = <0 0xec670000 0 0x1000>;
880 renesas,ipmmu-main = <&ipmmu_mm 4>;
881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
882 #iommu-cells = <1>;
883 };
884
885 ipmmu_pv0: mmu@fd800000 {
886 compatible = "renesas,ipmmu-r8a77965";
887 reg = <0 0xfd800000 0 0x1000>;
888 renesas,ipmmu-main = <&ipmmu_mm 6>;
889 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
890 #iommu-cells = <1>;
891 };
892
893 ipmmu_rt: mmu@ffc80000 {
894 compatible = "renesas,ipmmu-r8a77965";
895 reg = <0 0xffc80000 0 0x1000>;
896 renesas,ipmmu-main = <&ipmmu_mm 10>;
897 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
898 #iommu-cells = <1>;
899 };
900
901 ipmmu_vc0: mmu@fe6b0000 {
902 compatible = "renesas,ipmmu-r8a77965";
903 reg = <0 0xfe6b0000 0 0x1000>;
904 renesas,ipmmu-main = <&ipmmu_mm 12>;
905 power-domains = <&sysc R8A77965_PD_A3VC>;
906 #iommu-cells = <1>;
907 };
908
909 ipmmu_vi0: mmu@febd0000 {
910 compatible = "renesas,ipmmu-r8a77965";
911 reg = <0 0xfebd0000 0 0x1000>;
912 renesas,ipmmu-main = <&ipmmu_mm 14>;
913 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
914 #iommu-cells = <1>;
915 };
916
917 ipmmu_vp0: mmu@fe990000 {
918 compatible = "renesas,ipmmu-r8a77965";
919 reg = <0 0xfe990000 0 0x1000>;
920 renesas,ipmmu-main = <&ipmmu_mm 16>;
921 power-domains = <&sysc R8A77965_PD_A3VP>;
922 #iommu-cells = <1>;
923 };
924
925 avb: ethernet@e6800000 {
926 compatible = "renesas,etheravb-r8a77965",
927 "renesas,etheravb-rcar-gen3";
928 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
929 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
930 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
931 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
932 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
933 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
934 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
935 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
936 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
937 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
938 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
939 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
940 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
941 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
942 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
943 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
944 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
945 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
946 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
947 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
948 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
949 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
950 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
951 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
952 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
953 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
954 interrupt-names = "ch0", "ch1", "ch2", "ch3",
955 "ch4", "ch5", "ch6", "ch7",
956 "ch8", "ch9", "ch10", "ch11",
957 "ch12", "ch13", "ch14", "ch15",
958 "ch16", "ch17", "ch18", "ch19",
959 "ch20", "ch21", "ch22", "ch23",
960 "ch24";
961 clocks = <&cpg CPG_MOD 812>;
962 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
963 resets = <&cpg 812>;
964 phy-mode = "rgmii";
965 iommus = <&ipmmu_ds0 16>;
966 #address-cells = <1>;
967 #size-cells = <0>;
968 status = "disabled";
969 };
970
971 can0: can@e6c30000 {
972 compatible = "renesas,can-r8a77965",
973 "renesas,rcar-gen3-can";
974 reg = <0 0xe6c30000 0 0x1000>;
975 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
976 clocks = <&cpg CPG_MOD 916>,
977 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
978 <&can_clk>;
979 clock-names = "clkp1", "clkp2", "can_clk";
980 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
981 assigned-clock-rates = <40000000>;
982 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
983 resets = <&cpg 916>;
984 status = "disabled";
985 };
986
987 can1: can@e6c38000 {
988 compatible = "renesas,can-r8a77965",
989 "renesas,rcar-gen3-can";
990 reg = <0 0xe6c38000 0 0x1000>;
991 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
992 clocks = <&cpg CPG_MOD 915>,
993 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
994 <&can_clk>;
995 clock-names = "clkp1", "clkp2", "can_clk";
996 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
997 assigned-clock-rates = <40000000>;
998 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
999 resets = <&cpg 915>;
1000 status = "disabled";
1001 };
1002
1003 canfd: can@e66c0000 {
1004 compatible = "renesas,r8a77965-canfd",
1005 "renesas,rcar-gen3-canfd";
1006 reg = <0 0xe66c0000 0 0x8000>;
1007 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1008 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1009 clocks = <&cpg CPG_MOD 914>,
1010 <&cpg CPG_CORE R8A77965_CLK_CANFD>,
1011 <&can_clk>;
1012 clock-names = "fck", "canfd", "can_clk";
1013 assigned-clocks = <&cpg CPG_CORE R8A77965_CLK_CANFD>;
1014 assigned-clock-rates = <40000000>;
1015 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1016 resets = <&cpg 914>;
1017 status = "disabled";
1018
1019 channel0 {
1020 status = "disabled";
1021 };
1022
1023 channel1 {
1024 status = "disabled";
1025 };
1026 };
1027
1028 pwm0: pwm@e6e30000 {
1029 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1030 reg = <0 0xe6e30000 0 8>;
1031 #pwm-cells = <2>;
1032 clocks = <&cpg CPG_MOD 523>;
1033 resets = <&cpg 523>;
1034 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1035 status = "disabled";
1036 };
1037
1038 pwm1: pwm@e6e31000 {
1039 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1040 reg = <0 0xe6e31000 0 8>;
1041 #pwm-cells = <2>;
1042 clocks = <&cpg CPG_MOD 523>;
1043 resets = <&cpg 523>;
1044 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1045 status = "disabled";
1046 };
1047
1048 pwm2: pwm@e6e32000 {
1049 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1050 reg = <0 0xe6e32000 0 8>;
1051 #pwm-cells = <2>;
1052 clocks = <&cpg CPG_MOD 523>;
1053 resets = <&cpg 523>;
1054 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1055 status = "disabled";
1056 };
1057
1058 pwm3: pwm@e6e33000 {
1059 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1060 reg = <0 0xe6e33000 0 8>;
1061 #pwm-cells = <2>;
1062 clocks = <&cpg CPG_MOD 523>;
1063 resets = <&cpg 523>;
1064 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1065 status = "disabled";
1066 };
1067
1068 pwm4: pwm@e6e34000 {
1069 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1070 reg = <0 0xe6e34000 0 8>;
1071 #pwm-cells = <2>;
1072 clocks = <&cpg CPG_MOD 523>;
1073 resets = <&cpg 523>;
1074 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1075 status = "disabled";
1076 };
1077
1078 pwm5: pwm@e6e35000 {
1079 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1080 reg = <0 0xe6e35000 0 8>;
1081 #pwm-cells = <2>;
1082 clocks = <&cpg CPG_MOD 523>;
1083 resets = <&cpg 523>;
1084 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1085 status = "disabled";
1086 };
1087
1088 pwm6: pwm@e6e36000 {
1089 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
1090 reg = <0 0xe6e36000 0 8>;
1091 #pwm-cells = <2>;
1092 clocks = <&cpg CPG_MOD 523>;
1093 resets = <&cpg 523>;
1094 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1095 status = "disabled";
1096 };
1097
1098 scif0: serial@e6e60000 {
1099 compatible = "renesas,scif-r8a77965",
1100 "renesas,rcar-gen3-scif", "renesas,scif";
1101 reg = <0 0xe6e60000 0 64>;
1102 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1103 clocks = <&cpg CPG_MOD 207>,
1104 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1105 <&scif_clk>;
1106 clock-names = "fck", "brg_int", "scif_clk";
1107 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1108 <&dmac2 0x51>, <&dmac2 0x50>;
1109 dma-names = "tx", "rx", "tx", "rx";
1110 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1111 resets = <&cpg 207>;
1112 status = "disabled";
1113 };
1114
1115 scif1: serial@e6e68000 {
1116 compatible = "renesas,scif-r8a77965",
1117 "renesas,rcar-gen3-scif", "renesas,scif";
1118 reg = <0 0xe6e68000 0 64>;
1119 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1120 clocks = <&cpg CPG_MOD 206>,
1121 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1122 <&scif_clk>;
1123 clock-names = "fck", "brg_int", "scif_clk";
1124 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1125 <&dmac2 0x53>, <&dmac2 0x52>;
1126 dma-names = "tx", "rx", "tx", "rx";
1127 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1128 resets = <&cpg 206>;
1129 status = "disabled";
1130 };
1131
1132 scif2: serial@e6e88000 {
1133 compatible = "renesas,scif-r8a77965",
1134 "renesas,rcar-gen3-scif", "renesas,scif";
1135 reg = <0 0xe6e88000 0 64>;
1136 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1137 clocks = <&cpg CPG_MOD 310>,
1138 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1139 <&scif_clk>;
1140 clock-names = "fck", "brg_int", "scif_clk";
1141 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1142 <&dmac2 0x13>, <&dmac2 0x12>;
1143 dma-names = "tx", "rx", "tx", "rx";
1144 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1145 resets = <&cpg 310>;
1146 status = "disabled";
1147 };
1148
1149 scif3: serial@e6c50000 {
1150 compatible = "renesas,scif-r8a77965",
1151 "renesas,rcar-gen3-scif", "renesas,scif";
1152 reg = <0 0xe6c50000 0 64>;
1153 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1154 clocks = <&cpg CPG_MOD 204>,
1155 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1156 <&scif_clk>;
1157 clock-names = "fck", "brg_int", "scif_clk";
1158 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1159 dma-names = "tx", "rx";
1160 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1161 resets = <&cpg 204>;
1162 status = "disabled";
1163 };
1164
1165 scif4: serial@e6c40000 {
1166 compatible = "renesas,scif-r8a77965",
1167 "renesas,rcar-gen3-scif", "renesas,scif";
1168 reg = <0 0xe6c40000 0 64>;
1169 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1170 clocks = <&cpg CPG_MOD 203>,
1171 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1172 <&scif_clk>;
1173 clock-names = "fck", "brg_int", "scif_clk";
1174 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1175 dma-names = "tx", "rx";
1176 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1177 resets = <&cpg 203>;
1178 status = "disabled";
1179 };
1180
1181 scif5: serial@e6f30000 {
1182 compatible = "renesas,scif-r8a77965",
1183 "renesas,rcar-gen3-scif", "renesas,scif";
1184 reg = <0 0xe6f30000 0 64>;
1185 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1186 clocks = <&cpg CPG_MOD 202>,
1187 <&cpg CPG_CORE R8A77965_CLK_S3D1>,
1188 <&scif_clk>;
1189 clock-names = "fck", "brg_int", "scif_clk";
1190 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1191 <&dmac2 0x5b>, <&dmac2 0x5a>;
1192 dma-names = "tx", "rx", "tx", "rx";
1193 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1194 resets = <&cpg 202>;
1195 status = "disabled";
1196 };
1197
1198 msiof0: spi@e6e90000 {
1199 compatible = "renesas,msiof-r8a77965",
1200 "renesas,rcar-gen3-msiof";
1201 reg = <0 0xe6e90000 0 0x0064>;
1202 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1203 clocks = <&cpg CPG_MOD 211>;
1204 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1205 <&dmac2 0x41>, <&dmac2 0x40>;
1206 dma-names = "tx", "rx", "tx", "rx";
1207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1208 resets = <&cpg 211>;
1209 #address-cells = <1>;
1210 #size-cells = <0>;
1211 status = "disabled";
1212 };
1213
1214 msiof1: spi@e6ea0000 {
1215 compatible = "renesas,msiof-r8a77965",
1216 "renesas,rcar-gen3-msiof";
1217 reg = <0 0xe6ea0000 0 0x0064>;
1218 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1219 clocks = <&cpg CPG_MOD 210>;
1220 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1221 <&dmac2 0x43>, <&dmac2 0x42>;
1222 dma-names = "tx", "rx", "tx", "rx";
1223 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1224 resets = <&cpg 210>;
1225 #address-cells = <1>;
1226 #size-cells = <0>;
1227 status = "disabled";
1228 };
1229
1230 msiof2: spi@e6c00000 {
1231 compatible = "renesas,msiof-r8a77965",
1232 "renesas,rcar-gen3-msiof";
1233 reg = <0 0xe6c00000 0 0x0064>;
1234 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1235 clocks = <&cpg CPG_MOD 209>;
1236 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1237 dma-names = "tx", "rx";
1238 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1239 resets = <&cpg 209>;
1240 #address-cells = <1>;
1241 #size-cells = <0>;
1242 status = "disabled";
1243 };
1244
1245 msiof3: spi@e6c10000 {
1246 compatible = "renesas,msiof-r8a77965",
1247 "renesas,rcar-gen3-msiof";
1248 reg = <0 0xe6c10000 0 0x0064>;
1249 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1250 clocks = <&cpg CPG_MOD 208>;
1251 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1252 dma-names = "tx", "rx";
1253 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1254 resets = <&cpg 208>;
1255 #address-cells = <1>;
1256 #size-cells = <0>;
1257 status = "disabled";
1258 };
1259
1260 vin0: video@e6ef0000 {
1261 compatible = "renesas,vin-r8a77965";
1262 reg = <0 0xe6ef0000 0 0x1000>;
1263 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1264 clocks = <&cpg CPG_MOD 811>;
1265 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1266 resets = <&cpg 811>;
1267 renesas,id = <0>;
1268 status = "disabled";
1269
1270 ports {
1271 #address-cells = <1>;
1272 #size-cells = <0>;
1273
1274 port@1 {
1275 #address-cells = <1>;
1276 #size-cells = <0>;
1277
1278 reg = <1>;
1279
1280 vin0csi20: endpoint@0 {
1281 reg = <0>;
1282 remote-endpoint = <&csi20vin0>;
1283 };
1284 vin0csi40: endpoint@2 {
1285 reg = <2>;
1286 remote-endpoint = <&csi40vin0>;
1287 };
1288 };
1289 };
1290 };
1291
1292 vin1: video@e6ef1000 {
1293 compatible = "renesas,vin-r8a77965";
1294 reg = <0 0xe6ef1000 0 0x1000>;
1295 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1296 clocks = <&cpg CPG_MOD 810>;
1297 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1298 resets = <&cpg 810>;
1299 renesas,id = <1>;
1300 status = "disabled";
1301
1302 ports {
1303 #address-cells = <1>;
1304 #size-cells = <0>;
1305
1306 port@1 {
1307 #address-cells = <1>;
1308 #size-cells = <0>;
1309
1310 reg = <1>;
1311
1312 vin1csi20: endpoint@0 {
1313 reg = <0>;
1314 remote-endpoint = <&csi20vin1>;
1315 };
1316 vin1csi40: endpoint@2 {
1317 reg = <2>;
1318 remote-endpoint = <&csi40vin1>;
1319 };
1320 };
1321 };
1322 };
1323
1324 vin2: video@e6ef2000 {
1325 compatible = "renesas,vin-r8a77965";
1326 reg = <0 0xe6ef2000 0 0x1000>;
1327 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1328 clocks = <&cpg CPG_MOD 809>;
1329 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1330 resets = <&cpg 809>;
1331 renesas,id = <2>;
1332 status = "disabled";
1333
1334 ports {
1335 #address-cells = <1>;
1336 #size-cells = <0>;
1337
1338 port@1 {
1339 #address-cells = <1>;
1340 #size-cells = <0>;
1341
1342 reg = <1>;
1343
1344 vin2csi20: endpoint@0 {
1345 reg = <0>;
1346 remote-endpoint = <&csi20vin2>;
1347 };
1348 vin2csi40: endpoint@2 {
1349 reg = <2>;
1350 remote-endpoint = <&csi40vin2>;
1351 };
1352 };
1353 };
1354 };
1355
1356 vin3: video@e6ef3000 {
1357 compatible = "renesas,vin-r8a77965";
1358 reg = <0 0xe6ef3000 0 0x1000>;
1359 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1360 clocks = <&cpg CPG_MOD 808>;
1361 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1362 resets = <&cpg 808>;
1363 renesas,id = <3>;
1364 status = "disabled";
1365
1366 ports {
1367 #address-cells = <1>;
1368 #size-cells = <0>;
1369
1370 port@1 {
1371 #address-cells = <1>;
1372 #size-cells = <0>;
1373
1374 reg = <1>;
1375
1376 vin3csi20: endpoint@0 {
1377 reg = <0>;
1378 remote-endpoint = <&csi20vin3>;
1379 };
1380 vin3csi40: endpoint@2 {
1381 reg = <2>;
1382 remote-endpoint = <&csi40vin3>;
1383 };
1384 };
1385 };
1386 };
1387
1388 vin4: video@e6ef4000 {
1389 compatible = "renesas,vin-r8a77965";
1390 reg = <0 0xe6ef4000 0 0x1000>;
1391 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1392 clocks = <&cpg CPG_MOD 807>;
1393 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1394 resets = <&cpg 807>;
1395 renesas,id = <4>;
1396 status = "disabled";
1397
1398 ports {
1399 #address-cells = <1>;
1400 #size-cells = <0>;
1401
1402 port@1 {
1403 #address-cells = <1>;
1404 #size-cells = <0>;
1405
1406 reg = <1>;
1407
1408 vin4csi20: endpoint@0 {
1409 reg = <0>;
1410 remote-endpoint = <&csi20vin4>;
1411 };
1412 vin4csi40: endpoint@2 {
1413 reg = <2>;
1414 remote-endpoint = <&csi40vin4>;
1415 };
1416 };
1417 };
1418 };
1419
1420 vin5: video@e6ef5000 {
1421 compatible = "renesas,vin-r8a77965";
1422 reg = <0 0xe6ef5000 0 0x1000>;
1423 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1424 clocks = <&cpg CPG_MOD 806>;
1425 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1426 resets = <&cpg 806>;
1427 renesas,id = <5>;
1428 status = "disabled";
1429
1430 ports {
1431 #address-cells = <1>;
1432 #size-cells = <0>;
1433
1434 port@1 {
1435 #address-cells = <1>;
1436 #size-cells = <0>;
1437
1438 reg = <1>;
1439
1440 vin5csi20: endpoint@0 {
1441 reg = <0>;
1442 remote-endpoint = <&csi20vin5>;
1443 };
1444 vin5csi40: endpoint@2 {
1445 reg = <2>;
1446 remote-endpoint = <&csi40vin5>;
1447 };
1448 };
1449 };
1450 };
1451
1452 vin6: video@e6ef6000 {
1453 compatible = "renesas,vin-r8a77965";
1454 reg = <0 0xe6ef6000 0 0x1000>;
1455 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1456 clocks = <&cpg CPG_MOD 805>;
1457 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1458 resets = <&cpg 805>;
1459 renesas,id = <6>;
1460 status = "disabled";
1461
1462 ports {
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1465
1466 port@1 {
1467 #address-cells = <1>;
1468 #size-cells = <0>;
1469
1470 reg = <1>;
1471
1472 vin6csi20: endpoint@0 {
1473 reg = <0>;
1474 remote-endpoint = <&csi20vin6>;
1475 };
1476 vin6csi40: endpoint@2 {
1477 reg = <2>;
1478 remote-endpoint = <&csi40vin6>;
1479 };
1480 };
1481 };
1482 };
1483
1484 vin7: video@e6ef7000 {
1485 compatible = "renesas,vin-r8a77965";
1486 reg = <0 0xe6ef7000 0 0x1000>;
1487 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1488 clocks = <&cpg CPG_MOD 804>;
1489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1490 resets = <&cpg 804>;
1491 renesas,id = <7>;
1492 status = "disabled";
1493
1494 ports {
1495 #address-cells = <1>;
1496 #size-cells = <0>;
1497
1498 port@1 {
1499 #address-cells = <1>;
1500 #size-cells = <0>;
1501
1502 reg = <1>;
1503
1504 vin7csi20: endpoint@0 {
1505 reg = <0>;
1506 remote-endpoint = <&csi20vin7>;
1507 };
1508 vin7csi40: endpoint@2 {
1509 reg = <2>;
1510 remote-endpoint = <&csi40vin7>;
1511 };
1512 };
1513 };
1514 };
1515
1516 rcar_sound: sound@ec500000 {
1517 /*
1518 * #sound-dai-cells is required
1519 *
1520 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1521 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1522 */
1523 /*
1524 * #clock-cells is required for audio_clkout0/1/2/3
1525 *
1526 * clkout : #clock-cells = <0>; <&rcar_sound>;
1527 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1528 */
1529 compatible = "renesas,rcar_sound-r8a77965", "renesas,rcar_sound-gen3";
1530 reg = <0 0xec500000 0 0x1000>, /* SCU */
1531 <0 0xec5a0000 0 0x100>, /* ADG */
1532 <0 0xec540000 0 0x1000>, /* SSIU */
1533 <0 0xec541000 0 0x280>, /* SSI */
1534 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/
1535 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1536
1537 clocks = <&cpg CPG_MOD 1005>,
1538 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1539 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1540 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1541 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1542 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1543 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1544 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1545 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1546 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1547 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1548 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1549 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1550 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1551 <&audio_clk_a>, <&audio_clk_b>,
1552 <&audio_clk_c>,
1553 <&cpg CPG_CORE R8A77965_CLK_S0D4>;
1554 clock-names = "ssi-all",
1555 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1556 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1557 "ssi.1", "ssi.0",
1558 "src.9", "src.8", "src.7", "src.6",
1559 "src.5", "src.4", "src.3", "src.2",
1560 "src.1", "src.0",
1561 "mix.1", "mix.0",
1562 "ctu.1", "ctu.0",
1563 "dvc.0", "dvc.1",
1564 "clk_a", "clk_b", "clk_c", "clk_i";
1565 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1566 resets = <&cpg 1005>,
1567 <&cpg 1006>, <&cpg 1007>,
1568 <&cpg 1008>, <&cpg 1009>,
1569 <&cpg 1010>, <&cpg 1011>,
1570 <&cpg 1012>, <&cpg 1013>,
1571 <&cpg 1014>, <&cpg 1015>;
1572 reset-names = "ssi-all",
1573 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1574 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1575 "ssi.1", "ssi.0";
1576 status = "disabled";
1577
1578 rcar_sound,dvc {
1579 dvc0: dvc-0 {
1580 dmas = <&audma1 0xbc>;
1581 dma-names = "tx";
1582 };
1583 dvc1: dvc-1 {
1584 dmas = <&audma1 0xbe>;
1585 dma-names = "tx";
1586 };
1587 };
1588
1589 rcar_sound,mix {
1590 mix0: mix-0 { };
1591 mix1: mix-1 { };
1592 };
1593
1594 rcar_sound,ctu {
1595 ctu00: ctu-0 { };
1596 ctu01: ctu-1 { };
1597 ctu02: ctu-2 { };
1598 ctu03: ctu-3 { };
1599 ctu10: ctu-4 { };
1600 ctu11: ctu-5 { };
1601 ctu12: ctu-6 { };
1602 ctu13: ctu-7 { };
1603 };
1604
1605 rcar_sound,src {
1606 src0: src-0 {
1607 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1608 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1609 dma-names = "rx", "tx";
1610 };
1611 src1: src-1 {
1612 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1613 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1614 dma-names = "rx", "tx";
1615 };
1616 src2: src-2 {
1617 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1618 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1619 dma-names = "rx", "tx";
1620 };
1621 src3: src-3 {
1622 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1623 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1624 dma-names = "rx", "tx";
1625 };
1626 src4: src-4 {
1627 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1628 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1629 dma-names = "rx", "tx";
1630 };
1631 src5: src-5 {
1632 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1633 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1634 dma-names = "rx", "tx";
1635 };
1636 src6: src-6 {
1637 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1638 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1639 dma-names = "rx", "tx";
1640 };
1641 src7: src-7 {
1642 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1643 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1644 dma-names = "rx", "tx";
1645 };
1646 src8: src-8 {
1647 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1648 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1649 dma-names = "rx", "tx";
1650 };
1651 src9: src-9 {
1652 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1653 dmas = <&audma0 0x97>, <&audma1 0xba>;
1654 dma-names = "rx", "tx";
1655 };
1656 };
1657
1658 rcar_sound,ssiu {
1659 ssiu00: ssiu-0 {
1660 dmas = <&audma0 0x15>, <&audma1 0x16>;
1661 dma-names = "rx", "tx";
1662 };
1663 ssiu01: ssiu-1 {
1664 dmas = <&audma0 0x35>, <&audma1 0x36>;
1665 dma-names = "rx", "tx";
1666 };
1667 ssiu02: ssiu-2 {
1668 dmas = <&audma0 0x37>, <&audma1 0x38>;
1669 dma-names = "rx", "tx";
1670 };
1671 ssiu03: ssiu-3 {
1672 dmas = <&audma0 0x47>, <&audma1 0x48>;
1673 dma-names = "rx", "tx";
1674 };
1675 ssiu04: ssiu-4 {
1676 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1677 dma-names = "rx", "tx";
1678 };
1679 ssiu05: ssiu-5 {
1680 dmas = <&audma0 0x43>, <&audma1 0x44>;
1681 dma-names = "rx", "tx";
1682 };
1683 ssiu06: ssiu-6 {
1684 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1685 dma-names = "rx", "tx";
1686 };
1687 ssiu07: ssiu-7 {
1688 dmas = <&audma0 0x53>, <&audma1 0x54>;
1689 dma-names = "rx", "tx";
1690 };
1691 ssiu10: ssiu-8 {
1692 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1693 dma-names = "rx", "tx";
1694 };
1695 ssiu11: ssiu-9 {
1696 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1697 dma-names = "rx", "tx";
1698 };
1699 ssiu12: ssiu-10 {
1700 dmas = <&audma0 0x57>, <&audma1 0x58>;
1701 dma-names = "rx", "tx";
1702 };
1703 ssiu13: ssiu-11 {
1704 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1705 dma-names = "rx", "tx";
1706 };
1707 ssiu14: ssiu-12 {
1708 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1709 dma-names = "rx", "tx";
1710 };
1711 ssiu15: ssiu-13 {
1712 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1713 dma-names = "rx", "tx";
1714 };
1715 ssiu16: ssiu-14 {
1716 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1717 dma-names = "rx", "tx";
1718 };
1719 ssiu17: ssiu-15 {
1720 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1721 dma-names = "rx", "tx";
1722 };
1723 ssiu20: ssiu-16 {
1724 dmas = <&audma0 0x63>, <&audma1 0x64>;
1725 dma-names = "rx", "tx";
1726 };
1727 ssiu21: ssiu-17 {
1728 dmas = <&audma0 0x67>, <&audma1 0x68>;
1729 dma-names = "rx", "tx";
1730 };
1731 ssiu22: ssiu-18 {
1732 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1733 dma-names = "rx", "tx";
1734 };
1735 ssiu23: ssiu-19 {
1736 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1737 dma-names = "rx", "tx";
1738 };
1739 ssiu24: ssiu-20 {
1740 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1741 dma-names = "rx", "tx";
1742 };
1743 ssiu25: ssiu-21 {
1744 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1745 dma-names = "rx", "tx";
1746 };
1747 ssiu26: ssiu-22 {
1748 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1749 dma-names = "rx", "tx";
1750 };
1751 ssiu27: ssiu-23 {
1752 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1753 dma-names = "rx", "tx";
1754 };
1755 ssiu30: ssiu-24 {
1756 dmas = <&audma0 0x6f>, <&audma1 0x70>;
1757 dma-names = "rx", "tx";
1758 };
1759 ssiu31: ssiu-25 {
1760 dmas = <&audma0 0x21>, <&audma1 0x22>;
1761 dma-names = "rx", "tx";
1762 };
1763 ssiu32: ssiu-26 {
1764 dmas = <&audma0 0x23>, <&audma1 0x24>;
1765 dma-names = "rx", "tx";
1766 };
1767 ssiu33: ssiu-27 {
1768 dmas = <&audma0 0x25>, <&audma1 0x26>;
1769 dma-names = "rx", "tx";
1770 };
1771 ssiu34: ssiu-28 {
1772 dmas = <&audma0 0x27>, <&audma1 0x28>;
1773 dma-names = "rx", "tx";
1774 };
1775 ssiu35: ssiu-29 {
1776 dmas = <&audma0 0x29>, <&audma1 0x2A>;
1777 dma-names = "rx", "tx";
1778 };
1779 ssiu36: ssiu-30 {
1780 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1781 dma-names = "rx", "tx";
1782 };
1783 ssiu37: ssiu-31 {
1784 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1785 dma-names = "rx", "tx";
1786 };
1787 ssiu40: ssiu-32 {
1788 dmas = <&audma0 0x71>, <&audma1 0x72>;
1789 dma-names = "rx", "tx";
1790 };
1791 ssiu41: ssiu-33 {
1792 dmas = <&audma0 0x17>, <&audma1 0x18>;
1793 dma-names = "rx", "tx";
1794 };
1795 ssiu42: ssiu-34 {
1796 dmas = <&audma0 0x19>, <&audma1 0x1A>;
1797 dma-names = "rx", "tx";
1798 };
1799 ssiu43: ssiu-35 {
1800 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1801 dma-names = "rx", "tx";
1802 };
1803 ssiu44: ssiu-36 {
1804 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1805 dma-names = "rx", "tx";
1806 };
1807 ssiu45: ssiu-37 {
1808 dmas = <&audma0 0x1F>, <&audma1 0x20>;
1809 dma-names = "rx", "tx";
1810 };
1811 ssiu46: ssiu-38 {
1812 dmas = <&audma0 0x31>, <&audma1 0x32>;
1813 dma-names = "rx", "tx";
1814 };
1815 ssiu47: ssiu-39 {
1816 dmas = <&audma0 0x33>, <&audma1 0x34>;
1817 dma-names = "rx", "tx";
1818 };
1819 ssiu50: ssiu-40 {
1820 dmas = <&audma0 0x73>, <&audma1 0x74>;
1821 dma-names = "rx", "tx";
1822 };
1823 ssiu60: ssiu-41 {
1824 dmas = <&audma0 0x75>, <&audma1 0x76>;
1825 dma-names = "rx", "tx";
1826 };
1827 ssiu70: ssiu-42 {
1828 dmas = <&audma0 0x79>, <&audma1 0x7a>;
1829 dma-names = "rx", "tx";
1830 };
1831 ssiu80: ssiu-43 {
1832 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1833 dma-names = "rx", "tx";
1834 };
1835 ssiu90: ssiu-44 {
1836 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1837 dma-names = "rx", "tx";
1838 };
1839 ssiu91: ssiu-45 {
1840 dmas = <&audma0 0x7F>, <&audma1 0x80>;
1841 dma-names = "rx", "tx";
1842 };
1843 ssiu92: ssiu-46 {
1844 dmas = <&audma0 0x81>, <&audma1 0x82>;
1845 dma-names = "rx", "tx";
1846 };
1847 ssiu93: ssiu-47 {
1848 dmas = <&audma0 0x83>, <&audma1 0x84>;
1849 dma-names = "rx", "tx";
1850 };
1851 ssiu94: ssiu-48 {
1852 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1853 dma-names = "rx", "tx";
1854 };
1855 ssiu95: ssiu-49 {
1856 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1857 dma-names = "rx", "tx";
1858 };
1859 ssiu96: ssiu-50 {
1860 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1861 dma-names = "rx", "tx";
1862 };
1863 ssiu97: ssiu-51 {
1864 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1865 dma-names = "rx", "tx";
1866 };
1867 };
1868
1869 rcar_sound,ssi {
1870 ssi0: ssi-0 {
1871 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1872 dmas = <&audma0 0x01>, <&audma1 0x02>;
1873 dma-names = "rx", "tx";
1874 };
1875 ssi1: ssi-1 {
1876 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1877 dmas = <&audma0 0x03>, <&audma1 0x04>;
1878 dma-names = "rx", "tx";
1879 };
1880 ssi2: ssi-2 {
1881 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1882 dmas = <&audma0 0x05>, <&audma1 0x06>;
1883 dma-names = "rx", "tx";
1884 };
1885 ssi3: ssi-3 {
1886 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1887 dmas = <&audma0 0x07>, <&audma1 0x08>;
1888 dma-names = "rx", "tx";
1889 };
1890 ssi4: ssi-4 {
1891 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1892 dmas = <&audma0 0x09>, <&audma1 0x0a>;
1893 dma-names = "rx", "tx";
1894 };
1895 ssi5: ssi-5 {
1896 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1897 dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1898 dma-names = "rx", "tx";
1899 };
1900 ssi6: ssi-6 {
1901 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1902 dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1903 dma-names = "rx", "tx";
1904 };
1905 ssi7: ssi-7 {
1906 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1907 dmas = <&audma0 0x0f>, <&audma1 0x10>;
1908 dma-names = "rx", "tx";
1909 };
1910 ssi8: ssi-8 {
1911 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1912 dmas = <&audma0 0x11>, <&audma1 0x12>;
1913 dma-names = "rx", "tx";
1914 };
1915 ssi9: ssi-9 {
1916 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1917 dmas = <&audma0 0x13>, <&audma1 0x14>;
1918 dma-names = "rx", "tx";
1919 };
1920 };
1921 };
1922
1923 audma0: dma-controller@ec700000 {
1924 compatible = "renesas,dmac-r8a77965",
1925 "renesas,rcar-dmac";
1926 reg = <0 0xec700000 0 0x10000>;
1927 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1928 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1929 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1930 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1931 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1932 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1933 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1934 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1935 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1936 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1937 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1938 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1939 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1940 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1941 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1942 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1943 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1944 interrupt-names = "error",
1945 "ch0", "ch1", "ch2", "ch3",
1946 "ch4", "ch5", "ch6", "ch7",
1947 "ch8", "ch9", "ch10", "ch11",
1948 "ch12", "ch13", "ch14", "ch15";
1949 clocks = <&cpg CPG_MOD 502>;
1950 clock-names = "fck";
1951 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1952 resets = <&cpg 502>;
1953 #dma-cells = <1>;
1954 dma-channels = <16>;
1955 };
1956
1957 audma1: dma-controller@ec720000 {
1958 compatible = "renesas,dmac-r8a77965",
1959 "renesas,rcar-dmac";
1960 reg = <0 0xec720000 0 0x10000>;
1961 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1962 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1963 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1964 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1965 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1966 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1967 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1968 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1969 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1970 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1971 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1972 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1973 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1974 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1975 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1976 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1977 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1978 interrupt-names = "error",
1979 "ch0", "ch1", "ch2", "ch3",
1980 "ch4", "ch5", "ch6", "ch7",
1981 "ch8", "ch9", "ch10", "ch11",
1982 "ch12", "ch13", "ch14", "ch15";
1983 clocks = <&cpg CPG_MOD 501>;
1984 clock-names = "fck";
1985 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1986 resets = <&cpg 501>;
1987 #dma-cells = <1>;
1988 dma-channels = <16>;
1989 };
1990
1991 xhci0: usb@ee000000 {
1992 compatible = "renesas,xhci-r8a77965",
1993 "renesas,rcar-gen3-xhci";
1994 reg = <0 0xee000000 0 0xc00>;
1995 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1996 clocks = <&cpg CPG_MOD 328>;
1997 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
1998 resets = <&cpg 328>;
1999 status = "disabled";
2000 };
2001
2002 usb3_peri0: usb@ee020000 {
2003 compatible = "renesas,r8a77965-usb3-peri",
2004 "renesas,rcar-gen3-usb3-peri";
2005 reg = <0 0xee020000 0 0x400>;
2006 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2007 clocks = <&cpg CPG_MOD 328>;
2008 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2009 resets = <&cpg 328>;
2010 status = "disabled";
2011 };
2012
2013 ohci0: usb@ee080000 {
2014 compatible = "generic-ohci";
2015 reg = <0 0xee080000 0 0x100>;
2016 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2017 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2018 phys = <&usb2_phy0>;
2019 phy-names = "usb";
2020 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2021 resets = <&cpg 703>, <&cpg 704>;
2022 status = "disabled";
2023 };
2024
2025 ohci1: usb@ee0a0000 {
2026 compatible = "generic-ohci";
2027 reg = <0 0xee0a0000 0 0x100>;
2028 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2029 clocks = <&cpg CPG_MOD 702>;
2030 phys = <&usb2_phy1>;
2031 phy-names = "usb";
2032 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2033 resets = <&cpg 702>;
2034 status = "disabled";
2035 };
2036
2037 ehci0: usb@ee080100 {
2038 compatible = "generic-ehci";
2039 reg = <0 0xee080100 0 0x100>;
2040 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2041 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2042 phys = <&usb2_phy0>;
2043 phy-names = "usb";
2044 companion = <&ohci0>;
2045 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2046 resets = <&cpg 703>, <&cpg 704>;
2047 status = "disabled";
2048 };
2049
2050 ehci1: usb@ee0a0100 {
2051 compatible = "generic-ehci";
2052 reg = <0 0xee0a0100 0 0x100>;
2053 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2054 clocks = <&cpg CPG_MOD 702>;
2055 phys = <&usb2_phy1>;
2056 phy-names = "usb";
2057 companion = <&ohci1>;
2058 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2059 resets = <&cpg 702>;
2060 status = "disabled";
2061 };
2062
2063 usb2_phy0: usb-phy@ee080200 {
2064 compatible = "renesas,usb2-phy-r8a77965",
2065 "renesas,rcar-gen3-usb2-phy";
2066 reg = <0 0xee080200 0 0x700>;
2067 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2068 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2069 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2070 resets = <&cpg 703>, <&cpg 704>;
2071 #phy-cells = <0>;
2072 status = "disabled";
2073 };
2074
2075 usb2_phy1: usb-phy@ee0a0200 {
2076 compatible = "renesas,usb2-phy-r8a77965",
2077 "renesas,rcar-gen3-usb2-phy";
2078 reg = <0 0xee0a0200 0 0x700>;
2079 clocks = <&cpg CPG_MOD 702>;
2080 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2081 resets = <&cpg 702>;
2082 #phy-cells = <0>;
2083 status = "disabled";
2084 };
2085
2086 sdhi0: sd@ee100000 {
2087 compatible = "renesas,sdhi-r8a77965",
2088 "renesas,rcar-gen3-sdhi";
2089 reg = <0 0xee100000 0 0x2000>;
2090 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2091 clocks = <&cpg CPG_MOD 314>;
2092 max-frequency = <200000000>;
2093 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2094 resets = <&cpg 314>;
2095 status = "disabled";
2096 };
2097
2098 sdhi1: sd@ee120000 {
2099 compatible = "renesas,sdhi-r8a77965",
2100 "renesas,rcar-gen3-sdhi";
2101 reg = <0 0xee120000 0 0x2000>;
2102 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2103 clocks = <&cpg CPG_MOD 313>;
2104 max-frequency = <200000000>;
2105 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2106 resets = <&cpg 313>;
2107 status = "disabled";
2108 };
2109
2110 sdhi2: sd@ee140000 {
2111 compatible = "renesas,sdhi-r8a77965",
2112 "renesas,rcar-gen3-sdhi";
2113 reg = <0 0xee140000 0 0x2000>;
2114 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2115 clocks = <&cpg CPG_MOD 312>;
2116 max-frequency = <200000000>;
2117 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2118 resets = <&cpg 312>;
2119 status = "disabled";
2120 };
2121
2122 sdhi3: sd@ee160000 {
2123 compatible = "renesas,sdhi-r8a77965",
2124 "renesas,rcar-gen3-sdhi";
2125 reg = <0 0xee160000 0 0x2000>;
2126 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2127 clocks = <&cpg CPG_MOD 311>;
2128 max-frequency = <200000000>;
2129 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2130 resets = <&cpg 311>;
2131 status = "disabled";
2132 };
2133
2134 sata: sata@ee300000 {
2135 compatible = "renesas,sata-r8a77965",
2136 "renesas,rcar-gen3-sata";
2137 reg = <0 0xee300000 0 0x200000>;
2138 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2139 clocks = <&cpg CPG_MOD 815>;
2140 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2141 resets = <&cpg 815>;
2142 status = "disabled";
2143 };
2144
2145 gic: interrupt-controller@f1010000 {
2146 compatible = "arm,gic-400";
2147 #interrupt-cells = <3>;
2148 #address-cells = <0>;
2149 interrupt-controller;
2150 reg = <0x0 0xf1010000 0 0x1000>,
2151 <0x0 0xf1020000 0 0x20000>,
2152 <0x0 0xf1040000 0 0x20000>,
2153 <0x0 0xf1060000 0 0x20000>;
2154 interrupts = <GIC_PPI 9
2155 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
2156 clocks = <&cpg CPG_MOD 408>;
2157 clock-names = "clk";
2158 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2159 resets = <&cpg 408>;
2160 };
2161
2162 pciec0: pcie@fe000000 {
2163 compatible = "renesas,pcie-r8a77965",
2164 "renesas,pcie-rcar-gen3";
2165 reg = <0 0xfe000000 0 0x80000>;
2166 #address-cells = <3>;
2167 #size-cells = <2>;
2168 bus-range = <0x00 0xff>;
2169 device_type = "pci";
2170 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2171 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2172 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2173 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2174 /* Map all possible DDR as inbound ranges */
2175 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2176 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2177 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2178 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2179 #interrupt-cells = <1>;
2180 interrupt-map-mask = <0 0 0 0>;
2181 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2182 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2183 clock-names = "pcie", "pcie_bus";
2184 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2185 resets = <&cpg 319>;
2186 status = "disabled";
2187 };
2188
2189 pciec1: pcie@ee800000 {
2190 compatible = "renesas,pcie-r8a77965",
2191 "renesas,pcie-rcar-gen3";
2192 reg = <0 0xee800000 0 0x80000>;
2193 #address-cells = <3>;
2194 #size-cells = <2>;
2195 bus-range = <0x00 0xff>;
2196 device_type = "pci";
2197 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2198 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2199 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2200 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2201 /* Map all possible DDR as inbound ranges */
2202 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2203 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2204 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2205 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2206 #interrupt-cells = <1>;
2207 interrupt-map-mask = <0 0 0 0>;
2208 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2209 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2210 clock-names = "pcie", "pcie_bus";
2211 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2212 resets = <&cpg 318>;
2213 status = "disabled";
2214 };
2215
2216 fdp1@fe940000 {
2217 compatible = "renesas,fdp1";
2218 reg = <0 0xfe940000 0 0x2400>;
2219 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2220 clocks = <&cpg CPG_MOD 119>;
2221 power-domains = <&sysc R8A77965_PD_A3VP>;
2222 resets = <&cpg 119>;
2223 renesas,fcp = <&fcpf0>;
2224 };
2225
2226 fcpf0: fcp@fe950000 {
2227 compatible = "renesas,fcpf";
2228 reg = <0 0xfe950000 0 0x200>;
2229 clocks = <&cpg CPG_MOD 615>;
2230 power-domains = <&sysc R8A77965_PD_A3VP>;
2231 resets = <&cpg 615>;
2232 };
2233
2234 vspb: vsp@fe960000 {
2235 compatible = "renesas,vsp2";
2236 reg = <0 0xfe960000 0 0x8000>;
2237 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2238 clocks = <&cpg CPG_MOD 626>;
2239 power-domains = <&sysc R8A77965_PD_A3VP>;
2240 resets = <&cpg 626>;
2241
2242 renesas,fcp = <&fcpvb0>;
2243 };
2244
2245 fcpvb0: fcp@fe96f000 {
2246 compatible = "renesas,fcpv";
2247 reg = <0 0xfe96f000 0 0x200>;
2248 clocks = <&cpg CPG_MOD 607>;
2249 power-domains = <&sysc R8A77965_PD_A3VP>;
2250 resets = <&cpg 607>;
2251 };
2252
2253 vspi0: vsp@fe9a0000 {
2254 compatible = "renesas,vsp2";
2255 reg = <0 0xfe9a0000 0 0x8000>;
2256 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2257 clocks = <&cpg CPG_MOD 631>;
2258 power-domains = <&sysc R8A77965_PD_A3VP>;
2259 resets = <&cpg 631>;
2260
2261 renesas,fcp = <&fcpvi0>;
2262 };
2263
2264 fcpvi0: fcp@fe9af000 {
2265 compatible = "renesas,fcpv";
2266 reg = <0 0xfe9af000 0 0x200>;
2267 clocks = <&cpg CPG_MOD 611>;
2268 power-domains = <&sysc R8A77965_PD_A3VP>;
2269 resets = <&cpg 611>;
2270 };
2271
2272 vspd0: vsp@fea20000 {
2273 compatible = "renesas,vsp2";
2274 reg = <0 0xfea20000 0 0x5000>;
2275 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2276 clocks = <&cpg CPG_MOD 623>;
2277 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2278 resets = <&cpg 623>;
2279
2280 renesas,fcp = <&fcpvd0>;
2281 };
2282
2283 fcpvd0: fcp@fea27000 {
2284 compatible = "renesas,fcpv";
2285 reg = <0 0xfea27000 0 0x200>;
2286 clocks = <&cpg CPG_MOD 603>;
2287 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2288 resets = <&cpg 603>;
2289 };
2290
2291 vspd1: vsp@fea28000 {
2292 compatible = "renesas,vsp2";
2293 reg = <0 0xfea28000 0 0x5000>;
2294 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2295 clocks = <&cpg CPG_MOD 622>;
2296 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2297 resets = <&cpg 622>;
2298
2299 renesas,fcp = <&fcpvd1>;
2300 };
2301
2302 fcpvd1: fcp@fea2f000 {
2303 compatible = "renesas,fcpv";
2304 reg = <0 0xfea2f000 0 0x200>;
2305 clocks = <&cpg CPG_MOD 602>;
2306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2307 resets = <&cpg 602>;
2308 };
2309
2310 csi20: csi2@fea80000 {
2311 compatible = "renesas,r8a77965-csi2";
2312 reg = <0 0xfea80000 0 0x10000>;
2313 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2314 clocks = <&cpg CPG_MOD 714>;
2315 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2316 resets = <&cpg 714>;
2317 status = "disabled";
2318
2319 ports {
2320 #address-cells = <1>;
2321 #size-cells = <0>;
2322
2323 port@1 {
2324 #address-cells = <1>;
2325 #size-cells = <0>;
2326
2327 reg = <1>;
2328
2329 csi20vin0: endpoint@0 {
2330 reg = <0>;
2331 remote-endpoint = <&vin0csi20>;
2332 };
2333 csi20vin1: endpoint@1 {
2334 reg = <1>;
2335 remote-endpoint = <&vin1csi20>;
2336 };
2337 csi20vin2: endpoint@2 {
2338 reg = <2>;
2339 remote-endpoint = <&vin2csi20>;
2340 };
2341 csi20vin3: endpoint@3 {
2342 reg = <3>;
2343 remote-endpoint = <&vin3csi20>;
2344 };
2345 csi20vin4: endpoint@4 {
2346 reg = <4>;
2347 remote-endpoint = <&vin4csi20>;
2348 };
2349 csi20vin5: endpoint@5 {
2350 reg = <5>;
2351 remote-endpoint = <&vin5csi20>;
2352 };
2353 csi20vin6: endpoint@6 {
2354 reg = <6>;
2355 remote-endpoint = <&vin6csi20>;
2356 };
2357 csi20vin7: endpoint@7 {
2358 reg = <7>;
2359 remote-endpoint = <&vin7csi20>;
2360 };
2361 };
2362 };
2363 };
2364
2365 csi40: csi2@feaa0000 {
2366 compatible = "renesas,r8a77965-csi2";
2367 reg = <0 0xfeaa0000 0 0x10000>;
2368 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2369 clocks = <&cpg CPG_MOD 716>;
2370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2371 resets = <&cpg 716>;
2372 status = "disabled";
2373
2374 ports {
2375 #address-cells = <1>;
2376 #size-cells = <0>;
2377
2378 port@1 {
2379 #address-cells = <1>;
2380 #size-cells = <0>;
2381
2382 reg = <1>;
2383
2384 csi40vin0: endpoint@0 {
2385 reg = <0>;
2386 remote-endpoint = <&vin0csi40>;
2387 };
2388 csi40vin1: endpoint@1 {
2389 reg = <1>;
2390 remote-endpoint = <&vin1csi40>;
2391 };
2392 csi40vin2: endpoint@2 {
2393 reg = <2>;
2394 remote-endpoint = <&vin2csi40>;
2395 };
2396 csi40vin3: endpoint@3 {
2397 reg = <3>;
2398 remote-endpoint = <&vin3csi40>;
2399 };
2400 csi40vin4: endpoint@4 {
2401 reg = <4>;
2402 remote-endpoint = <&vin4csi40>;
2403 };
2404 csi40vin5: endpoint@5 {
2405 reg = <5>;
2406 remote-endpoint = <&vin5csi40>;
2407 };
2408 csi40vin6: endpoint@6 {
2409 reg = <6>;
2410 remote-endpoint = <&vin6csi40>;
2411 };
2412 csi40vin7: endpoint@7 {
2413 reg = <7>;
2414 remote-endpoint = <&vin7csi40>;
2415 };
2416 };
2417 };
2418 };
2419
2420 hdmi0: hdmi@fead0000 {
2421 compatible = "renesas,r8a77965-hdmi",
2422 "renesas,rcar-gen3-hdmi";
2423 reg = <0 0xfead0000 0 0x10000>;
2424 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2425 clocks = <&cpg CPG_MOD 729>,
2426 <&cpg CPG_CORE R8A77965_CLK_HDMI>;
2427 clock-names = "iahb", "isfr";
2428 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2429 resets = <&cpg 729>;
2430 status = "disabled";
2431
2432 ports {
2433 #address-cells = <1>;
2434 #size-cells = <0>;
2435 port@0 {
2436 reg = <0>;
2437 dw_hdmi0_in: endpoint {
2438 remote-endpoint = <&du_out_hdmi0>;
2439 };
2440 };
2441 port@1 {
2442 reg = <1>;
2443 };
2444 };
2445 };
2446
2447 du: display@feb00000 {
2448 compatible = "renesas,du-r8a77965";
2449 reg = <0 0xfeb00000 0 0x80000>;
2450 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2451 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2452 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2453 clocks = <&cpg CPG_MOD 724>,
2454 <&cpg CPG_MOD 723>,
2455 <&cpg CPG_MOD 721>;
2456 clock-names = "du.0", "du.1", "du.3";
2457 status = "disabled";
2458
2459 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
2460
2461 ports {
2462 #address-cells = <1>;
2463 #size-cells = <0>;
2464
2465 port@0 {
2466 reg = <0>;
2467 du_out_rgb: endpoint {
2468 };
2469 };
2470 port@1 {
2471 reg = <1>;
2472 du_out_hdmi0: endpoint {
2473 remote-endpoint = <&dw_hdmi0_in>;
2474 };
2475 };
2476 port@2 {
2477 reg = <2>;
2478 du_out_lvds0: endpoint {
2479 remote-endpoint = <&lvds0_in>;
2480 };
2481 };
2482 };
2483 };
2484
2485 lvds0: lvds@feb90000 {
2486 compatible = "renesas,r8a77965-lvds";
2487 reg = <0 0xfeb90000 0 0x14>;
2488 clocks = <&cpg CPG_MOD 727>;
2489 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
2490 resets = <&cpg 727>;
2491 status = "disabled";
2492
2493 ports {
2494 #address-cells = <1>;
2495 #size-cells = <0>;
2496
2497 port@0 {
2498 reg = <0>;
2499 lvds0_in: endpoint {
2500 remote-endpoint = <&du_out_lvds0>;
2501 };
2502 };
2503 port@1 {
2504 reg = <1>;
2505 lvds0_out: endpoint {
2506 };
2507 };
2508 };
2509 };
2510
2511 prr: chipid@fff00044 {
2512 compatible = "renesas,prr";
2513 reg = <0 0xfff00044 0 4>;
2514 };
2515 };
2516
2517 thermal-zones {
2518 sensor_thermal1: sensor-thermal1 {
2519 polling-delay-passive = <250>;
2520 polling-delay = <1000>;
2521 thermal-sensors = <&tsc 0>;
2522
2523 trips {
2524 sensor1_crit: sensor1-crit {
2525 temperature = <120000>;
2526 hysteresis = <1000>;
2527 type = "critical";
2528 };
2529 };
2530 };
2531
2532 sensor_thermal2: sensor-thermal2 {
2533 polling-delay-passive = <250>;
2534 polling-delay = <1000>;
2535 thermal-sensors = <&tsc 1>;
2536
2537 trips {
2538 sensor2_crit: sensor2-crit {
2539 temperature = <120000>;
2540 hysteresis = <1000>;
2541 type = "critical";
2542 };
2543 };
2544 };
2545
2546 sensor_thermal3: sensor-thermal3 {
2547 polling-delay-passive = <250>;
2548 polling-delay = <1000>;
2549 thermal-sensors = <&tsc 2>;
2550
2551 trips {
2552 sensor3_crit: sensor3-crit {
2553 temperature = <120000>;
2554 hysteresis = <1000>;
2555 type = "critical";
2556 };
2557 };
2558 };
2559 };
2560
2561 timer {
2562 compatible = "arm,armv8-timer";
2563 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2564 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2565 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2566 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2567 };
2568
2569 /* External USB clocks - can be overridden by the board */
2570 usb3s0_clk: usb3s0 {
2571 compatible = "fixed-clock";
2572 #clock-cells = <0>;
2573 clock-frequency = <0>;
2574 };
2575
2576 usb_extal_clk: usb_extal {
2577 compatible = "fixed-clock";
2578 #clock-cells = <0>;
2579 clock-frequency = <0>;
2580 };
2581 };
"Das U-Boot" Source Tree