]> git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/dts/rk3288-rock2-som.dtsi
Merge git://git.denx.de/u-boot-fdt
[people/ms/u-boot.git] / arch / arm / dts / rk3288-rock2-som.dtsi
1 /*
2 * This file is dual-licensed: you can use it either under the terms
3 * of the GPL or the X11 license, at your option. Note that this dual
4 * licensing only applies to this file, and not this project as a
5 * whole.
6 *
7 * a) This file is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of the
10 * License, or (at your option) any later version.
11 *
12 * This file is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * Or, alternatively,
18 *
19 * b) Permission is hereby granted, free of charge, to any person
20 * obtaining a copy of this software and associated documentation
21 * files (the "Software"), to deal in the Software without
22 * restriction, including without limitation the rights to use,
23 * copy, modify, merge, publish, distribute, sublicense, and/or
24 * sell copies of the Software, and to permit persons to whom the
25 * Software is furnished to do so, subject to the following
26 * conditions:
27 *
28 * The above copyright notice and this permission notice shall be
29 * included in all copies or substantial portions of the Software.
30 *
31 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
32 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
33 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
34 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
35 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
36 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
38 * OTHER DEALINGS IN THE SOFTWARE.
39 */
40
41 #include <dt-bindings/pwm/pwm.h>
42 #include "rk3288.dtsi"
43
44 / {
45 memory {
46 reg = <0x0 0x80000000>;
47 device_type = "memory";
48 };
49
50 emmc_pwrseq: emmc-pwrseq {
51 compatible = "mmc-pwrseq-emmc";
52 pinctrl-0 = <&emmc_reset>;
53 pinctrl-names = "default";
54 reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
55 };
56
57 ext_gmac: external-gmac-clock {
58 compatible = "fixed-clock";
59 #clock-cells = <0>;
60 clock-frequency = <125000000>;
61 clock-output-names = "ext_gmac";
62 };
63
64 vcc_sys: vsys-regulator {
65 compatible = "regulator-fixed";
66 regulator-name = "vcc_sys";
67 regulator-min-microvolt = <5000000>;
68 regulator-max-microvolt = <5000000>;
69 regulator-always-on;
70 regulator-boot-on;
71 };
72 };
73
74 &cpu0 {
75 cpu0-supply = <&vdd_cpu>;
76 };
77
78 &emmc {
79 bus-width = <8>;
80 cap-mmc-highspeed;
81 disable-wp;
82 non-removable;
83 num-slots = <1>;
84 mmc-pwrseq = <&emmc_pwrseq>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
87 vmmc-supply = <&vcc_io>;
88 status = "okay";
89 };
90
91 &gmac {
92 assigned-clocks = <&cru SCLK_MAC>;
93 assigned-clock-parents = <&ext_gmac>;
94 clock_in_out = "input";
95 phy-mode = "rgmii";
96 phy-supply = <&vccio_pmu>;
97 pinctrl-names = "default";
98 pinctrl-0 = <&rgmii_pins &phy_rst>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
100 snps,reset-active-low;
101 snps,reset-delays-us = <0 10000 30000>;
102 rx_delay = <0x10>;
103 tx_delay = <0x30>;
104 };
105
106 &i2c0 {
107 status = "okay";
108
109 act8846: act8846@5a {
110 compatible = "active-semi,act8846";
111 reg = <0x5a>;
112 system-power-controller;
113 inl1-supply = <&vcc_io>;
114 inl2-supply = <&vcc_sys>;
115 inl3-supply = <&vcc_20>;
116 vp1-supply = <&vcc_sys>;
117 vp2-supply = <&vcc_sys>;
118 vp3-supply = <&vcc_sys>;
119 vp4-supply = <&vcc_sys>;
120
121 regulators {
122 vcc_ddr: REG1 {
123 regulator-name = "VCC_DDR";
124 regulator-min-microvolt = <1200000>;
125 regulator-max-microvolt = <1200000>;
126 regulator-always-on;
127 };
128
129 vcc_io: REG2 {
130 regulator-name = "VCC_IO";
131 regulator-min-microvolt = <3300000>;
132 regulator-max-microvolt = <3300000>;
133 regulator-always-on;
134 };
135
136 vdd_log: REG3 {
137 regulator-name = "VDD_LOG";
138 regulator-min-microvolt = <1000000>;
139 regulator-max-microvolt = <1000000>;
140 regulator-always-on;
141 };
142
143 vcc_20: REG4 {
144 regulator-name = "VCC_20";
145 regulator-min-microvolt = <2000000>;
146 regulator-max-microvolt = <2000000>;
147 regulator-always-on;
148 };
149
150 vccio_sd: REG5 {
151 regulator-name = "VCCIO_SD";
152 regulator-min-microvolt = <3300000>;
153 regulator-max-microvolt = <3300000>;
154 regulator-always-on;
155 };
156
157 vdd10_lcd: REG6 {
158 regulator-name = "VDD10_LCD";
159 regulator-min-microvolt = <1000000>;
160 regulator-max-microvolt = <1000000>;
161 regulator-always-on;
162 };
163
164 vcca_codec: REG7 {
165 regulator-name = "VCCA_CODEC";
166 regulator-min-microvolt = <3300000>;
167 regulator-max-microvolt = <3300000>;
168 regulator-always-on;
169 };
170
171 vcca_tp: REG8 {
172 regulator-name = "VCCA_TP";
173 regulator-min-microvolt = <3300000>;
174 regulator-max-microvolt = <3300000>;
175 regulator-always-on;
176 };
177
178 vccio_pmu: REG9 {
179 regulator-name = "VCCIO_PMU";
180 regulator-min-microvolt = <3300000>;
181 regulator-max-microvolt = <3300000>;
182 regulator-always-on;
183 };
184
185 vdd_10: REG10 {
186 regulator-name = "VDD_10";
187 regulator-min-microvolt = <1000000>;
188 regulator-max-microvolt = <1000000>;
189 regulator-always-on;
190 };
191
192 vcc_18: REG11 {
193 regulator-name = "VCC_18";
194 regulator-min-microvolt = <1800000>;
195 regulator-max-microvolt = <1800000>;
196 regulator-always-on;
197 };
198
199 vcc18_lcd: REG12 {
200 regulator-name = "VCC18_LCD";
201 regulator-min-microvolt = <1800000>;
202 regulator-max-microvolt = <1800000>;
203 regulator-always-on;
204 };
205 };
206 };
207
208 vdd_cpu: syr827@40 {
209 compatible = "silergy,syr827";
210 reg = <0x40>;
211 fcs,suspend-voltage-selector = <1>;
212 regulator-always-on;
213 regulator-boot-on;
214 regulator-enable-ramp-delay = <300>;
215 regulator-name = "vdd_cpu";
216 regulator-min-microvolt = <850000>;
217 regulator-max-microvolt = <1350000>;
218 regulator-ramp-delay = <8000>;
219 vin-supply = <&vcc_sys>;
220 };
221
222 vdd_gpu: syr828@41 {
223 compatible = "silergy,syr828";
224 reg = <0x41>;
225 fcs,suspend-voltage-selector = <1>;
226 regulator-always-on;
227 regulator-enable-ramp-delay = <300>;
228 regulator-min-microvolt = <850000>;
229 regulator-max-microvolt = <1350000>;
230 regulator-name = "vdd_gpu";
231 regulator-ramp-delay = <8000>;
232 vin-supply = <&vcc_sys>;
233 };
234 };
235
236 &pinctrl {
237 pcfg_output_high: pcfg-output-high {
238 output-high;
239 };
240
241 emmc {
242 emmc_reset: emmc-reset {
243 rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>;
244 };
245 };
246
247 gmac {
248 phy_rst: phy-rst {
249 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
250 };
251 };
252 };
253
254 &tsadc {
255 rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
256 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
257 status = "okay";
258 };
259
260 &vopb {
261 status = "okay";
262 };
263
264 &vopb_mmu {
265 status = "okay";
266 };
267
268 &vopl {
269 status = "okay";
270 };
271
272 &vopl_mmu {
273 status = "okay";
274 };
275
276 &wdt {
277 status = "okay";
278 };