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1 /*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
4 * SPDX-License-Identifier: GPL-2.0+ X11
5 */
6
7 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
9 #include "rk3399.dtsi"
10 #include "rk3399-sdram-ddr3-1600.dtsi"
11
12 / {
13 model = "Theobroma Systems RK3399-Q7 SoM";
14 compatible = "tsd,puma", "rockchip,rk3399";
15
16 config {
17 u-boot,spl-payload-offset = <0x40000>; // 256kbyte
18 u-boot,boot-led = "puma:orange:power";
19 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 u-boot,spl-boot-order = &spiflash, &sdhci, &sdmmc;
24 };
25
26 aliases {
27 spi0 = &spi1;
28 spi1 = &spi5;
29 };
30
31 vdd_center: vdd-center {
32 compatible = "pwm-regulator";
33 pwms = <&pwm3 0 25000 0>;
34 regulator-name = "vdd_center";
35 regulator-min-microvolt = <800000>;
36 regulator-max-microvolt = <1400000>;
37 regulator-init-microvolt = <950000>;
38 regulator-always-on;
39 regulator-boot-on;
40 status = "okay";
41 };
42
43 vcc3v3_sys: vcc3v3-sys {
44 compatible = "regulator-fixed";
45 regulator-name = "vcc3v3_sys";
46 regulator-always-on;
47 regulator-boot-on;
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50 };
51
52 vcc_phy: vcc-phy-regulator {
53 compatible = "regulator-fixed";
54 regulator-name = "vcc_phy";
55 regulator-always-on;
56 regulator-boot-on;
57 };
58
59 vcc5v0_host: vcc5v0-host-en {
60 compatible = "regulator-fixed";
61 regulator-name = "vcc5v0_host";
62 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
63 };
64
65 clkin_gmac: external-gmac-clock {
66 compatible = "fixed-clock";
67 clock-frequency = <125000000>;
68 clock-output-names = "clkin_gmac";
69 #clock-cells = <0>;
70 };
71
72 vcc_phy: vcc-phy-regulator {
73 compatible = "regulator-fixed";
74 regulator-name = "vcc_phy";
75 regulator-always-on;
76 regulator-boot-on;
77 };
78 };
79
80 &emmc_phy {
81 status = "okay";
82 };
83
84 &pwm0 {
85 status = "okay";
86 };
87
88 &pwm2 {
89 status = "okay";
90 };
91
92 &pwm3 {
93 status = "okay";
94 };
95
96 &sdmmc {
97 u-boot,dm-pre-reloc;
98 bus-width = <4>;
99 status = "okay";
100 };
101
102 &sdhci {
103 bus-width = <8>;
104 mmc-hs400-1_8v;
105 mmc-hs400-enhanced-strobe;
106 non-removable;
107 status = "okay";
108 };
109
110 &uart0 {
111 u-boot,dm-pre-reloc;
112 status = "okay";
113 };
114
115 &uart2 {
116 status = "okay";
117 };
118
119 &usb_host0_ehci {
120 status = "okay";
121 };
122
123 &usb_host0_ohci {
124 status = "okay";
125 };
126
127 &dwc3_typec0 {
128 status = "disabled";
129 };
130
131 &usb_host1_ehci {
132 status = "okay";
133 };
134
135 &usb_host1_ohci {
136 status = "okay";
137 };
138
139 &dwc3_typec1 {
140 rockchip,vbus-gpio = <&gpio4 3 GPIO_ACTIVE_LOW>;
141 status = "okay";
142 };
143
144 &pinctrl {
145 pmic {
146 pmic_int_l: pmic-int-l {
147 rockchip,pins =
148 <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
149 };
150
151 pmic_dvs2: pmic-dvs2 {
152 rockchip,pins =
153 <1 18 RK_FUNC_GPIO &pcfg_pull_down>;
154 };
155 };
156 };
157
158 &gmac {
159 phy-supply = <&vcc_phy>;
160 phy-mode = "rgmii";
161 clock_in_out = "input";
162 snps,reset-gpio = <&gpio3 16 GPIO_ACTIVE_LOW>;
163 snps,reset-active-low;
164 snps,reset-delays-us = <0 10000 50000>;
165 assigned-clocks = <&cru SCLK_RMII_SRC>;
166 assigned-clock-parents = <&clkin_gmac>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&rgmii_pins>;
169 tx_delay = <0x10>;
170 rx_delay = <0x10>;
171 status = "okay";
172 };
173
174 &spi1 {
175 u-boot,dm-pre-reloc;
176
177 status = "okay";
178
179 #address-cells = <1>;
180 #size-cells = <0>;
181
182 spiflash: w25q32dw@0 {
183 u-boot,dm-pre-reloc;
184
185 compatible = "spi-flash";
186 reg = <0>;
187 spi-max-frequency = <49500000>;
188 spi-cpol;
189 spi-cpha;
190 };
191 };
192
193 &spi5 {
194 status = "okay";
195 };