]> git.ipfire.org Git - thirdparty/u-boot.git/blob - arch/arm/dts/rk3588-rock-5b-u-boot.dtsi
rockchip: rk3588: Update bootph props
[thirdparty/u-boot.git] / arch / arm / dts / rk3588-rock-5b-u-boot.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2023 Collabora Ltd.
4 */
5
6 #include "rk3588-u-boot.dtsi"
7 #include <dt-bindings/usb/pd.h>
8
9 / {
10 vcc12v_dcin: vcc12v-dcin-regulator {
11 compatible = "regulator-fixed";
12 regulator-name = "vcc12v_dcin";
13 regulator-always-on;
14 regulator-boot-on;
15 regulator-min-microvolt = <12000000>;
16 regulator-max-microvolt = <12000000>;
17 };
18 };
19
20 &fspim2_pins {
21 bootph-pre-ram;
22 bootph-some-ram;
23 };
24
25 &pinctrl {
26 usb {
27 usbc0_int: usbc0-int {
28 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
29 };
30 };
31 };
32
33 &sdhci {
34 cap-mmc-highspeed;
35 mmc-hs200-1_8v;
36 };
37
38 &sfc {
39 pinctrl-names = "default";
40 pinctrl-0 = <&fspim2_pins>;
41 status = "okay";
42
43 flash@0 {
44 compatible = "jedec,spi-nor";
45 reg = <0>;
46 bootph-pre-ram;
47 bootph-some-ram;
48 spi-max-frequency = <24000000>;
49 spi-rx-bus-width = <4>;
50 spi-tx-bus-width = <1>;
51 };
52 };
53
54 &u2phy0 {
55 status = "okay";
56 };
57
58 &u2phy0_otg {
59 status = "okay";
60 };
61
62 &u2phy1 {
63 status = "okay";
64 };
65
66 &u2phy1_otg {
67 status = "okay";
68 };
69
70 &usbdp_phy1 {
71 status = "okay";
72 };
73
74 &usbdp_phy1_u3 {
75 status = "okay";
76 };
77
78 &usbdp_phy0 {
79 orientation-switch;
80 mode-switch;
81 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
82 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
83 status = "okay";
84
85 port {
86 #address-cells = <1>;
87 #size-cells = <0>;
88
89 usbdp_phy0_typec_ss: endpoint@0 {
90 reg = <0>;
91 remote-endpoint = <&usbc0_ss>;
92 };
93
94 usbdp_phy0_typec_sbu: endpoint@1 {
95 reg = <1>;
96 remote-endpoint = <&usbc0_sbu>;
97 };
98 };
99 };
100
101 &usbdp_phy0_u3 {
102 status = "okay";
103 };
104
105 &usb_host0_xhci {
106 usb-role-switch;
107 status = "okay";
108
109 port {
110 #address-cells = <1>;
111 #size-cells = <0>;
112
113 usb_host0_xhci_drd_sw: endpoint {
114 remote-endpoint = <&usbc0_hs>;
115 };
116 };
117 };
118
119 &usb_host1_xhci {
120 status = "okay";
121 };
122
123 &i2c4 {
124 pinctrl-names = "default";
125 pinctrl-0 = <&i2c4m1_xfer>;
126 status = "okay";
127
128 usbc0: usb-typec@22 {
129 compatible = "fcs,fusb302";
130 reg = <0x22>;
131 interrupt-parent = <&gpio3>;
132 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&usbc0_int>;
135 vbus-supply = <&vcc12v_dcin>;
136 status = "okay";
137
138 usb_con: connector {
139 compatible = "usb-c-connector";
140 label = "USB-C";
141 data-role = "dual";
142 power-role = "sink";
143 try-power-role = "sink";
144 op-sink-microwatt = <1000000>;
145 sink-pdos =
146 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>,
147 <PDO_VAR(5000, 20000, 5000)>;
148
149 ports {
150 #address-cells = <1>;
151 #size-cells = <0>;
152
153 port@0 {
154 reg = <0>;
155 usbc0_hs: endpoint {
156 remote-endpoint = <&usb_host0_xhci_drd_sw>;
157 };
158 };
159
160 port@1 {
161 reg = <1>;
162 usbc0_ss: endpoint {
163 remote-endpoint = <&usbdp_phy0_typec_ss>;
164 };
165 };
166
167 port@2 {
168 reg = <2>;
169 usbc0_sbu: endpoint {
170 remote-endpoint = <&usbdp_phy0_typec_sbu>;
171 };
172 };
173 };
174 };
175 };
176 };