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1 // SPDX-License-Identifier: GPL-2.0+
2
3 #include <dt-bindings/memory/stm32-sdram.h>
4
5 /{
6 clocks {
7 bootph-all;
8 };
9
10 aliases {
11 gpio0 = &gpioa;
12 gpio1 = &gpiob;
13 gpio2 = &gpioc;
14 gpio3 = &gpiod;
15 gpio4 = &gpioe;
16 gpio5 = &gpiof;
17 gpio6 = &gpiog;
18 gpio7 = &gpioh;
19 gpio8 = &gpioi;
20 gpio9 = &gpioj;
21 gpio10 = &gpiok;
22 mmc0 = &sdmmc1;
23 pinctrl0 = &pinctrl;
24 };
25
26 soc {
27 bootph-all;
28 pin-controller {
29 bootph-all;
30 };
31
32 fmc: fmc@52004000 {
33 compatible = "st,stm32h7-fmc";
34 reg = <0x52004000 0x1000>;
35 clocks = <&rcc FMC_CK>;
36
37 pinctrl-0 = <&fmc_pins>;
38 pinctrl-names = "default";
39 status = "okay";
40 };
41 };
42 };
43
44 &clk_hse {
45 bootph-all;
46 };
47
48 &clk_i2s {
49 bootph-all;
50 };
51
52 &clk_lse {
53 bootph-all;
54 };
55
56
57 &fmc {
58 bootph-all;
59 };
60
61 &gpioa {
62 bootph-all;
63 compatible = "st,stm32-gpio";
64 };
65
66 &gpiob {
67 bootph-all;
68 compatible = "st,stm32-gpio";
69 };
70
71 &gpioc {
72 bootph-all;
73 compatible = "st,stm32-gpio";
74 };
75
76 &gpiod {
77 bootph-all;
78 compatible = "st,stm32-gpio";
79 };
80
81 &gpioe {
82 bootph-all;
83 compatible = "st,stm32-gpio";
84 };
85
86 &gpiof {
87 bootph-all;
88 compatible = "st,stm32-gpio";
89 };
90
91 &gpiog {
92 bootph-all;
93 compatible = "st,stm32-gpio";
94 };
95
96 &gpioh {
97 bootph-all;
98 compatible = "st,stm32-gpio";
99 };
100
101 &gpioi {
102 bootph-all;
103 compatible = "st,stm32-gpio";
104 };
105
106 &gpioj {
107 bootph-all;
108 compatible = "st,stm32-gpio";
109 };
110
111 &gpiok {
112 bootph-all;
113 compatible = "st,stm32-gpio";
114 };
115
116 &pwrcfg {
117 bootph-all;
118 };
119
120 &rcc {
121 bootph-all;
122 };
123
124 &sdmmc1 {
125 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
126 };
127
128 &timer5 {
129 bootph-all;
130 };
131
132 &pinctrl {
133 bootph-all;
134 };