arch/arm/dts/uniphier-ph1-ld4.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-LD4 SoC
   3  *
   4  * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+        X11
   7  */
   8
   9 /include/ "uniphier-common32.dtsi"
  10
  11 / {
  12         compatible = "socionext,ph1-ld4";
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17
  18                 cpu@0 {
  19                         device_type = "cpu";
  20                         compatible = "arm,cortex-a9";
  21                         reg = <0>;
  22                 };
  23         };
  24
  25         clocks {
  26                 arm_timer_clk: arm_timer_clk {
  27                         #clock-cells = <0>;
  28                         compatible = "fixed-clock";
  29                         clock-frequency = <50000000>;
  30                 };
  31
  32                 uart_clk: uart_clk {
  33                         #clock-cells = <0>;
  34                         compatible = "fixed-clock";
  35                         clock-frequency = <36864000>;
  36                 };
  37
  38                 iobus_clk: iobus_clk {
  39                         #clock-cells = <0>;
  40                         compatible = "fixed-clock";
  41                         clock-frequency = <100000000>;
  42                 };
  43         };
  44 };
  45
  46 &soc {
  47         i2c0: i2c@58400000 {
  48                 compatible = "socionext,uniphier-i2c";
  49                 status = "disabled";
  50                 reg = <0x58400000 0x40>;
  51                 #address-cells = <1>;
  52                 #size-cells = <0>;
  53                 interrupts = <0 41 1>;
  54                 pinctrl-names = "default";
  55                 pinctrl-0 = <&pinctrl_i2c0>;
  56                 clocks = <&iobus_clk>;
  57                 clock-frequency = <100000>;
  58         };
  59
  60         i2c1: i2c@58480000 {
  61                 compatible = "socionext,uniphier-i2c";
  62                 status = "disabled";
  63                 reg = <0x58480000 0x40>;
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 interrupts = <0 42 1>;
  67                 pinctrl-names = "default";
  68                 pinctrl-0 = <&pinctrl_i2c1>;
  69                 clocks = <&iobus_clk>;
  70                 clock-frequency = <100000>;
  71         };
  72
  73         /* chip-internal connection for DMD */
  74         i2c2: i2c@58500000 {
  75                 compatible = "socionext,uniphier-i2c";
  76                 reg = <0x58500000 0x40>;
  77                 #address-cells = <1>;
  78                 #size-cells = <0>;
  79                 interrupts = <0 43 1>;
  80                 pinctrl-names = "default";
  81                 pinctrl-0 = <&pinctrl_i2c2>;
  82                 clocks = <&iobus_clk>;
  83                 clock-frequency = <400000>;
  84         };
  85
  86         i2c3: i2c@58580000 {
  87                 compatible = "socionext,uniphier-i2c";
  88                 status = "disabled";
  89                 reg = <0x58580000 0x40>;
  90                 #address-cells = <1>;
  91                 #size-cells = <0>;
  92                 interrupts = <0 44 1>;
  93                 pinctrl-names = "default";
  94                 pinctrl-0 = <&pinctrl_i2c3>;
  95                 clocks = <&iobus_clk>;
  96                 clock-frequency = <100000>;
  97         };
  98
  99         usb0: usb@5a800100 {
 100                 compatible = "socionext,uniphier-ehci", "generic-ehci";
 101                 status = "disabled";
 102                 reg = <0x5a800100 0x100>;
 103                 interrupts = <0 80 4>;
 104                 pinctrl-names = "default";
 105                 pinctrl-0 = <&pinctrl_usb0>;
 106         };
 107
 108         usb1: usb@5a810100 {
 109                 compatible = "socionext,uniphier-ehci", "generic-ehci";
 110                 status = "disabled";
 111                 reg = <0x5a810100 0x100>;
 112                 interrupts = <0 81 4>;
 113                 pinctrl-names = "default";
 114                 pinctrl-0 = <&pinctrl_usb1>;
 115         };
 116
 117         usb2: usb@5a820100 {
 118                 compatible = "socionext,uniphier-ehci", "generic-ehci";
 119                 status = "disabled";
 120                 reg = <0x5a820100 0x100>;
 121                 interrupts = <0 82 4>;
 122                 pinctrl-names = "default";
 123                 pinctrl-0 = <&pinctrl_usb2>;
 124         };
 125 };
 126
 127 &serial0 {
 128         clock-frequency = <36864000>;
 129 };
 130
 131 &serial1 {
 132         clock-frequency = <36864000>;
 133 };
 134
 135 &serial2 {
 136         clock-frequency = <36864000>;
 137 };
 138
 139 &serial3 {
 140         interrupts = <0 29 4>;
 141         clock-frequency = <36864000>;
 142 };
 143
 144 &pinctrl {
 145         compatible = "socionext,ph1-ld4-pinctrl", "syscon";
 146 };