arch/arm/dts/uniphier-ph1-sld3.dtsi

   1 /*
   2  * Device Tree Source for UniPhier PH1-sLD3 SoC
   3  *
   4  * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /include/ "skeleton.dtsi"
  10
  11 / {
  12         compatible = "socionext,ph1-sld3";
  13
  14         cpus {
  15                 #address-cells = <1>;
  16                 #size-cells = <0>;
  17                 enable-method = "socionext,uniphier-smp";
  18
  19                 cpu@0 {
  20                         device_type = "cpu";
  21                         compatible = "arm,cortex-a9";
  22                         reg = <0>;
  23                 };
  24
  25                 cpu@1 {
  26                         device_type = "cpu";
  27                         compatible = "arm,cortex-a9";
  28                         reg = <1>;
  29                 };
  30         };
  31
  32         clocks {
  33                 arm_timer_clk: arm_timer_clk {
  34                         #clock-cells = <0>;
  35                         compatible = "fixed-clock";
  36                         clock-frequency = <50000000>;
  37                 };
  38         };
  39
  40         soc {
  41                 compatible = "simple-bus";
  42                 #address-cells = <1>;
  43                 #size-cells = <1>;
  44                 ranges;
  45                 interrupt-parent = <&intc>;
  46
  47                 extbus: extbus {
  48                         compatible = "simple-bus";
  49                         #address-cells = <2>;
  50                         #size-cells = <1>;
  51                 };
  52
  53                 timer@20000200 {
  54                         compatible = "arm,cortex-a9-global-timer";
  55                         reg = <0x20000200 0x20>;
  56                         interrupts = <1 11 0x304>;
  57                         clocks = <&arm_timer_clk>;
  58                 };
  59
  60                 timer@20000600 {
  61                         compatible = "arm,cortex-a9-twd-timer";
  62                         reg = <0x20000600 0x20>;
  63                         interrupts = <1 13 0x304>;
  64                         clocks = <&arm_timer_clk>;
  65                 };
  66
  67                 intc: interrupt-controller@20001000 {
  68                         compatible = "arm,cortex-a9-gic";
  69                         #interrupt-cells = <3>;
  70                         interrupt-controller;
  71                         reg = <0x20001000 0x1000>,
  72                               <0x20000100 0x100>;
  73                 };
  74
  75                 uart0: serial@54006800 {
  76                         compatible = "socionext,uniphier-uart";
  77                         status = "disabled";
  78                         reg = <0x54006800 0x20>;
  79                         clock-frequency = <36864000>;
  80                 };
  81
  82                 uart1: serial@54006900 {
  83                         compatible = "socionext,uniphier-uart";
  84                         status = "disabled";
  85                         reg = <0x54006900 0x20>;
  86                         clock-frequency = <36864000>;
  87                 };
  88
  89                 uart2: serial@54006a00 {
  90                         compatible = "socionext,uniphier-uart";
  91                         status = "disabled";
  92                         reg = <0x54006a00 0x20>;
  93                         clock-frequency = <36864000>;
  94                 };
  95
  96                 i2c0: i2c@58400000 {
  97                         compatible = "socionext,uniphier-i2c";
  98                         #address-cells = <1>;
  99                         #size-cells = <0>;
 100                         reg = <0x58400000 0x40>;
 101                         clock-frequency = <100000>;
 102                         status = "disabled";
 103                 };
 104
 105                 i2c1: i2c@58480000 {
 106                         compatible = "socionext,uniphier-i2c";
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         reg = <0x58480000 0x40>;
 110                         clock-frequency = <100000>;
 111                         status = "disabled";
 112                 };
 113
 114                 i2c2: i2c@58500000 {
 115                         compatible = "socionext,uniphier-i2c";
 116                         #address-cells = <1>;
 117                         #size-cells = <0>;
 118                         reg = <0x58500000 0x40>;
 119                         clock-frequency = <100000>;
 120                         status = "disabled";
 121                 };
 122
 123                 i2c3: i2c@58580000 {
 124                         compatible = "socionext,uniphier-i2c";
 125                         #address-cells = <1>;
 126                         #size-cells = <0>;
 127                         reg = <0x58580000 0x40>;
 128                         clock-frequency = <100000>;
 129                         status = "disabled";
 130                 };
 131
 132                 system-bus-controller-misc@59800000 {
 133                         compatible = "socionext,uniphier-system-bus-controller-misc",
 134                                      "syscon";
 135                         reg = <0x59800000 0x2000>;
 136                 };
 137
 138                 usb0: usb@5a800100 {
 139                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 140                         status = "disabled";
 141                         reg = <0x5a800100 0x100>;
 142                 };
 143
 144                 usb1: usb@5a810100 {
 145                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 146                         status = "disabled";
 147                         reg = <0x5a810100 0x100>;
 148                 };
 149
 150                 usb2: usb@5a820100 {
 151                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 152                         status = "disabled";
 153                         reg = <0x5a820100 0x100>;
 154                 };
 155
 156                 usb3: usb@5a830100 {
 157                         compatible = "socionext,uniphier-ehci", "generic-ehci";
 158                         status = "disabled";
 159                         reg = <0x5a830100 0x100>;
 160                 };
 161
 162                 nand: nand@f8000000 {
 163                         compatible = "denali,denali-nand-dt";
 164                         reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
 165                         reg-names = "nand_data", "denali_reg";
 166                 };
 167         };
 168 };