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[thirdparty/u-boot.git] / arch / arm / dts / zynqmp-zc1275-revB.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * dts file for Xilinx ZynqMP ZC1275 RevB
4 *
5 * (C) Copyright 2018, Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@xilinx.com>
8 * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
9 */
10
11 /dts-v1/;
12
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
15
16 / {
17 model = "ZynqMP ZC1275 RevB";
18 compatible = "xlnx,zynqmp-zc1275-revB", "xlnx,zynqmp-zc1275", "xlnx,zynqmp";
19
20 aliases {
21 serial0 = &uart0;
22 serial1 = &dcc;
23 spi0 = &qspi;
24 mmc0 = &sdhci1;
25 };
26
27 chosen {
28 bootargs = "earlycon";
29 stdout-path = "serial0:115200n8";
30 };
31
32 memory@0 {
33 device_type = "memory";
34 reg = <0x0 0x0 0x0 0x80000000>;
35 };
36 };
37
38 &dcc {
39 status = "okay";
40 };
41
42 &qspi {
43 status = "okay";
44 flash@0 {
45 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
46 #address-cells = <1>;
47 #size-cells = <1>;
48 reg = <0x0>;
49 spi-tx-bus-width = <1>;
50 spi-rx-bus-width = <1>;
51 spi-max-frequency = <108000000>; /* Based on DC1 spec */
52 partition@qspi-fsbl-uboot { /* for testing purpose */
53 label = "qspi-fsbl-uboot";
54 reg = <0x0 0x100000>;
55 };
56 partition@qspi-linux { /* for testing purpose */
57 label = "qspi-linux";
58 reg = <0x100000 0x500000>;
59 };
60 partition@qspi-device-tree { /* for testing purpose */
61 label = "qspi-device-tree";
62 reg = <0x600000 0x20000>;
63 };
64 partition@qspi-rootfs { /* for testing purpose */
65 label = "qspi-rootfs";
66 reg = <0x620000 0x5E0000>;
67 };
68 };
69 };
70
71 &uart0 {
72 status = "okay";
73 };
74
75 &sdhci1 {
76 status = "okay";
77 no-1-8-v;
78 xlnx,mio_bank = <1>;
79 };