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[people/ms/u-boot.git] / arch / arm / dts / zynqmp-zc1751-xm016-dc2.dts
1 /*
2 * dts file for Xilinx ZynqMP zc1751-xm016-dc2
3 *
4 * (C) Copyright 2015, Xilinx, Inc.
5 *
6 * Michal Simek <michal.simek@xilinx.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 /dts-v1/;
12
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk.dtsi"
15
16 / {
17 model = "ZynqMP zc1751-xm016-dc2 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
19
20 aliases {
21 can0 = &can0;
22 can1 = &can1;
23 ethernet0 = &gem2;
24 gpio0 = &gpio;
25 i2c0 = &i2c0;
26 rtc0 = &rtc;
27 serial0 = &uart0;
28 serial1 = &uart1;
29 spi0 = &spi0;
30 spi1 = &spi1;
31 usb0 = &usb1;
32 };
33
34 chosen {
35 bootargs = "earlycon";
36 stdout-path = "serial0:115200n8";
37 };
38
39 memory@0 {
40 device_type = "memory";
41 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
42 };
43 };
44
45 &can0 {
46 status = "okay";
47 };
48
49 &can1 {
50 status = "okay";
51 };
52
53 /* fpd_dma clk 667MHz, lpd_dma 500MHz */
54 &fpd_dma_chan1 {
55 status = "okay";
56 xlnx,include-sg; /* for testing purpose */
57 xlnx,overfetch; /* for testing purpose */
58 xlnx,ratectrl = <0>; /* for testing purpose */
59 xlnx,src-issue = <31>;
60 };
61
62 &fpd_dma_chan2 {
63 status = "okay";
64 xlnx,ratectrl = <100>; /* for testing purpose */
65 xlnx,src-issue = <4>; /* for testing purpose */
66 };
67
68 &fpd_dma_chan3 {
69 status = "okay";
70 };
71
72 &fpd_dma_chan4 {
73 status = "okay";
74 xlnx,include-sg; /* for testing purpose */
75 };
76
77 &fpd_dma_chan5 {
78 status = "okay";
79 };
80
81 &fpd_dma_chan6 {
82 status = "okay";
83 xlnx,include-sg; /* for testing purpose */
84 };
85
86 &fpd_dma_chan7 {
87 status = "okay";
88 };
89
90 &fpd_dma_chan8 {
91 status = "okay";
92 xlnx,include-sg; /* for testing purpose */
93 };
94
95 &gem2 {
96 status = "okay";
97 local-mac-address = [00 0a 35 00 02 90];
98 phy-handle = <&phy0>;
99 phy-mode = "rgmii-id";
100 phy0: phy@5 {
101 reg = <5>;
102 ti,rx-internal-delay = <0x8>;
103 ti,tx-internal-delay = <0xa>;
104 ti,fifo-depth = <0x1>;
105 };
106 };
107
108 &gpio {
109 status = "okay";
110 };
111
112 &i2c0 {
113 status = "okay";
114 clock-frequency = <400000>;
115
116 tca6416_u26: gpio@20 {
117 compatible = "ti,tca6416";
118 reg = <0x20>;
119 gpio-controller;
120 #gpio-cells = <2>;
121 /* IRQ not connected */
122 };
123
124 rtc@68 {
125 compatible = "dallas,ds1339";
126 reg = <0x68>;
127 };
128 };
129
130 &nand0 {
131 status = "okay";
132 arasan,has-mdma;
133 num-cs = <2>;
134
135 partition@0 { /* for testing purpose */
136 label = "nand-fsbl-uboot";
137 reg = <0x0 0x0 0x400000>;
138 };
139 partition@1 { /* for testing purpose */
140 label = "nand-linux";
141 reg = <0x0 0x400000 0x1400000>;
142 };
143 partition@2 { /* for testing purpose */
144 label = "nand-device-tree";
145 reg = <0x0 0x1800000 0x400000>;
146 };
147 partition@3 { /* for testing purpose */
148 label = "nand-rootfs";
149 reg = <0x0 0x1C00000 0x1400000>;
150 };
151 partition@4 { /* for testing purpose */
152 label = "nand-bitstream";
153 reg = <0x0 0x3000000 0x400000>;
154 };
155 partition@5 { /* for testing purpose */
156 label = "nand-misc";
157 reg = <0x0 0x3400000 0xFCC00000>;
158 };
159
160 partition@6 { /* for testing purpose */
161 label = "nand1-fsbl-uboot";
162 reg = <0x1 0x0 0x400000>;
163 };
164 partition@7 { /* for testing purpose */
165 label = "nand1-linux";
166 reg = <0x1 0x400000 0x1400000>;
167 };
168 partition@8 { /* for testing purpose */
169 label = "nand1-device-tree";
170 reg = <0x1 0x1800000 0x400000>;
171 };
172 partition@9 { /* for testing purpose */
173 label = "nand1-rootfs";
174 reg = <0x1 0x1C00000 0x1400000>;
175 };
176 partition@10 { /* for testing purpose */
177 label = "nand1-bitstream";
178 reg = <0x1 0x3000000 0x400000>;
179 };
180 partition@11 { /* for testing purpose */
181 label = "nand1-misc";
182 reg = <0x1 0x3400000 0xFCC00000>;
183 };
184 };
185
186 &rtc {
187 status = "okay";
188 };
189
190 &spi0 {
191 status = "okay";
192 num-cs = <1>;
193 spi0_flash0: spi0_flash0@0 {
194 compatible = "m25p80";
195 #address-cells = <1>;
196 #size-cells = <1>;
197 spi-max-frequency = <50000000>;
198 reg = <0>;
199
200 spi0_flash0@00000000 {
201 label = "spi0_flash0";
202 reg = <0x0 0x100000>;
203 };
204 };
205 };
206
207 &spi1 {
208 status = "okay";
209 num-cs = <1>;
210 spi1_flash0: spi1_flash0@0 {
211 compatible = "mtd_dataflash";
212 #address-cells = <1>;
213 #size-cells = <1>;
214 spi-max-frequency = <20000000>;
215 reg = <0>;
216
217 spi1_flash0@00000000 {
218 label = "spi1_flash0";
219 reg = <0x0 0x84000>;
220 };
221 };
222 };
223
224 /* ULPI SMSC USB3320 */
225 &usb1 {
226 status = "okay";
227 };
228
229 &dwc3_1 {
230 status = "okay";
231 dr_mode = "host";
232 };
233
234 &uart0 {
235 status = "okay";
236 };
237
238 &uart1 {
239 status = "okay";
240 };