arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP zc1751-xm017-dc3
   4  *
   5  * (C) Copyright 2016 - 2021, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@amd.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk-ccf.dtsi"
  14 #include <dt-bindings/phy/phy.h>
  15
  16 / {
  17         model = "ZynqMP zc1751-xm017-dc3 RevA";
  18         compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
  19
  20         aliases {
  21                 ethernet0 = &gem0;
  22                 i2c0 = &i2c0;
  23                 i2c1 = &i2c1;
  24                 mmc0 = &sdhci1;
  25                 rtc0 = &rtc;
  26                 serial0 = &uart0;
  27                 serial1 = &uart1;
  28                 usb0 = &usb0;
  29                 usb1 = &usb1;
  30         };
  31
  32         chosen {
  33                 bootargs = "earlycon";
  34                 stdout-path = "serial0:115200n8";
  35         };
  36
  37         memory@0 {
  38                 device_type = "memory";
  39                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
  40         };
  41
  42         clock_si5338_2: clk26 {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 clock-frequency = <26000000>;
  46         };
  47
  48         clock_si5338_3: clk125 {
  49                 compatible = "fixed-clock";
  50                 #clock-cells = <0>;
  51                 clock-frequency = <125000000>;
  52         };
  53 };
  54
  55 &fpd_dma_chan1 {
  56         status = "okay";
  57 };
  58
  59 &fpd_dma_chan2 {
  60         status = "okay";
  61 };
  62
  63 &fpd_dma_chan3 {
  64         status = "okay";
  65 };
  66
  67 &fpd_dma_chan4 {
  68         status = "okay";
  69 };
  70
  71 &fpd_dma_chan5 {
  72         status = "okay";
  73 };
  74
  75 &fpd_dma_chan6 {
  76         status = "okay";
  77 };
  78
  79 &fpd_dma_chan7 {
  80         status = "okay";
  81 };
  82
  83 &fpd_dma_chan8 {
  84         status = "okay";
  85 };
  86
  87 &gem0 {
  88         status = "okay";
  89         phy-handle = <&phy0>;
  90         phy-mode = "rgmii-id";
  91         mdio: mdio {
  92                 #address-cells = <1>;
  93                 #size-cells = <0>;
  94                 phy0: ethernet-phy@0 { /* VSC8211 */
  95                         reg = <0>;
  96                 };
  97         };
  98 };
  99
 100 &gpio {
 101         status = "okay";
 102 };
 103
 104 /* just eeprom here */
 105 &i2c0 {
 106         status = "okay";
 107         clock-frequency = <400000>;
 108
 109         tca6416_u26: gpio@20 {
 110                 compatible = "ti,tca6416";
 111                 reg = <0x20>;
 112                 gpio-controller;
 113                 #gpio-cells = <2>;
 114                 /* IRQ not connected */
 115         };
 116
 117         rtc@68 {
 118                 compatible = "dallas,ds1339";
 119                 reg = <0x68>;
 120         };
 121 };
 122
 123 /* eeprom24c02 and SE98A temp chip pca9306 */
 124 &i2c1 {
 125         status = "okay";
 126         clock-frequency = <400000>;
 127 };
 128
 129 /* MT29F64G08AECDBJ4-6 */
 130 &nand0 {
 131         status = "okay";
 132         arasan,has-mdma;
 133         num-cs = <2>;
 134
 135         nand@0 {
 136                 reg = <0x0>;
 137                 #address-cells = <0x2>;
 138                 #size-cells = <0x1>;
 139                 nand-ecc-mode = "soft";
 140                 nand-ecc-algo = "bch";
 141                 nand-rb = <0>;
 142                 label = "main-storage-0";
 143                 nand-ecc-step-size = <1024>;
 144                 nand-ecc-strength = <24>;
 145                 nand-on-flash-bbt;
 146
 147                 partition@0 {   /* for testing purpose */
 148                         label = "nand-fsbl-uboot";
 149                         reg = <0x0 0x0 0x400000>;
 150                 };
 151                 partition@1 {   /* for testing purpose */
 152                         label = "nand-linux";
 153                         reg = <0x0 0x400000 0x1400000>;
 154                 };
 155                 partition@2 {   /* for testing purpose */
 156                         label = "nand-device-tree";
 157                         reg = <0x0 0x1800000 0x400000>;
 158                 };
 159                 partition@3 {   /* for testing purpose */
 160                         label = "nand-rootfs";
 161                         reg = <0x0 0x1C00000 0x1400000>;
 162                 };
 163                 partition@4 {   /* for testing purpose */
 164                         label = "nand-bitstream";
 165                         reg = <0x0 0x3000000 0x400000>;
 166                 };
 167                 partition@5 {   /* for testing purpose */
 168                         label = "nand-misc";
 169                         reg = <0x0 0x3400000 0xFCC00000>;
 170                 };
 171         };
 172         nand@1 {
 173                 reg = <0x1>;
 174                 #address-cells = <0x2>;
 175                 #size-cells = <0x1>;
 176                 nand-ecc-mode = "soft";
 177                 nand-ecc-algo = "bch";
 178                 nand-rb = <0>;
 179                 label = "main-storage-1";
 180                 nand-ecc-step-size = <1024>;
 181                 nand-ecc-strength = <24>;
 182                 nand-on-flash-bbt;
 183
 184                 partition@0 {   /* for testing purpose */
 185                         label = "nand1-fsbl-uboot";
 186                         reg = <0x0 0x0 0x400000>;
 187                 };
 188                 partition@1 {   /* for testing purpose */
 189                         label = "nand1-linux";
 190                         reg = <0x0 0x400000 0x1400000>;
 191                 };
 192                 partition@2 {   /* for testing purpose */
 193                         label = "nand1-device-tree";
 194                         reg = <0x0 0x1800000 0x400000>;
 195                 };
 196                 partition@3 {   /* for testing purpose */
 197                         label = "nand1-rootfs";
 198                         reg = <0x0 0x1C00000 0x1400000>;
 199                 };
 200                 partition@4 {   /* for testing purpose */
 201                         label = "nand1-bitstream";
 202                         reg = <0x0 0x3000000 0x400000>;
 203                 };
 204                 partition@5 {   /* for testing purpose */
 205                         label = "nand1-misc";
 206                         reg = <0x0 0x3400000 0xFCC00000>;
 207                 };
 208         };
 209 };
 210
 211 &psgtr {
 212         status = "okay";
 213         /* usb3, sata */
 214         clocks = <&clock_si5338_2>, <&clock_si5338_3>;
 215         clock-names = "ref2", "ref3";
 216 };
 217
 218 &rtc {
 219         status = "okay";
 220 };
 221
 222 &sata {
 223         status = "okay";
 224         /* SATA phy OOB timing settings */
 225         ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
 226         ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
 227         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 228         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 229         ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
 230         ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
 231         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 232         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 233         phy-names = "sata-phy";
 234         phys = <&psgtr 2 PHY_TYPE_SATA 0 3>;
 235 };
 236
 237 &sdhci1 { /* emmc with some settings */
 238         status = "okay";
 239 };
 240
 241 /* main */
 242 &uart0 {
 243         status = "okay";
 244 };
 245
 246 /* DB9 */
 247 &uart1 {
 248         status = "okay";
 249 };
 250
 251 &usb0 {
 252         status = "okay";
 253         phy-names = "usb3-phy";
 254         phys = <&psgtr 0 PHY_TYPE_USB3 0 2>;
 255 };
 256
 257 &dwc3_0 {
 258         status = "okay";
 259         dr_mode = "host";
 260         snps,usb3_lpm_capable;
 261         maximum-speed = "super-speed";
 262 };
 263
 264 /* ULPI SMSC USB3320 */
 265 &usb1 {
 266         status = "okay";
 267         phy-names = "usb3-phy";
 268         phys = <&psgtr 3 PHY_TYPE_USB3 1 2>;
 269 };
 270
 271 &dwc3_1 {
 272         status = "okay";
 273         dr_mode = "host";
 274         snps,usb3_lpm_capable;
 275         maximum-speed = "super-speed";
 276 };