arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         dcc: dcc {
  49                 compatible = "arm,dcc";
  50                 status = "disabled";
  51                 u-boot,dm-pre-reloc;
  52         };
  53
  54         power-domains {
  55                 compatible = "xlnx,zynqmp-genpd";
  56
  57                 pd_usb0: pd-usb0 {
  58                         #power-domain-cells = <0x0>;
  59                         pd-id = <0x16>;
  60                 };
  61
  62                 pd_usb1: pd-usb1 {
  63                         #power-domain-cells = <0x0>;
  64                         pd-id = <0x17>;
  65                 };
  66
  67                 pd_sata: pd-sata {
  68                         #power-domain-cells = <0x0>;
  69                         pd-id = <0x1c>;
  70                 };
  71
  72                 pd_spi0: pd-spi0 {
  73                         #power-domain-cells = <0x0>;
  74                         pd-id = <0x23>;
  75                 };
  76
  77                 pd_spi1: pd-spi1 {
  78                         #power-domain-cells = <0x0>;
  79                         pd-id = <0x24>;
  80                 };
  81
  82                 pd_uart0: pd-uart0 {
  83                         #power-domain-cells = <0x0>;
  84                         pd-id = <0x21>;
  85                 };
  86
  87                 pd_uart1: pd-uart1 {
  88                         #power-domain-cells = <0x0>;
  89                         pd-id = <0x22>;
  90                 };
  91
  92                 pd_eth0: pd-eth0 {
  93                         #power-domain-cells = <0x0>;
  94                         pd-id = <0x1d>;
  95                 };
  96
  97                 pd_eth1: pd-eth1 {
  98                         #power-domain-cells = <0x0>;
  99                         pd-id = <0x1e>;
 100                 };
 101
 102                 pd_eth2: pd-eth2 {
 103                         #power-domain-cells = <0x0>;
 104                         pd-id = <0x1f>;
 105                 };
 106
 107                 pd_eth3: pd-eth3 {
 108                         #power-domain-cells = <0x0>;
 109                         pd-id = <0x20>;
 110                 };
 111
 112                 pd_i2c0: pd-i2c0 {
 113                         #power-domain-cells = <0x0>;
 114                         pd-id = <0x25>;
 115                 };
 116
 117                 pd_i2c1: pd-i2c1 {
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x26>;
 120                 };
 121
 122                 pd_dp: pd-dp {
 123                         /* fixme: what to attach to */
 124                         #power-domain-cells = <0x0>;
 125                         pd-id = <0x29>;
 126                 };
 127
 128                 pd_gdma: pd-gdma {
 129                         #power-domain-cells = <0x0>;
 130                         pd-id = <0x2a>;
 131                 };
 132
 133                 pd_adma: pd-adma {
 134                         #power-domain-cells = <0x0>;
 135                         pd-id = <0x2b>;
 136                 };
 137
 138                 pd_ttc0: pd-ttc0 {
 139                         #power-domain-cells = <0x0>;
 140                         pd-id = <0x18>;
 141                 };
 142
 143                 pd_ttc1: pd-ttc1 {
 144                         #power-domain-cells = <0x0>;
 145                         pd-id = <0x19>;
 146                 };
 147
 148                 pd_ttc2: pd-ttc2 {
 149                         #power-domain-cells = <0x0>;
 150                         pd-id = <0x1a>;
 151                 };
 152
 153                 pd_ttc3: pd-ttc3 {
 154                         #power-domain-cells = <0x0>;
 155                         pd-id = <0x1b>;
 156                 };
 157
 158                 pd_sd0: pd-sd0 {
 159                         #power-domain-cells = <0x0>;
 160                         pd-id = <0x27>;
 161                 };
 162
 163                 pd_sd1: pd-sd1 {
 164                         #power-domain-cells = <0x0>;
 165                         pd-id = <0x28>;
 166                 };
 167
 168                 pd_nand: pd-nand {
 169                         #power-domain-cells = <0x0>;
 170                         pd-id = <0x2c>;
 171                 };
 172
 173                 pd_qspi: pd-qspi {
 174                         #power-domain-cells = <0x0>;
 175                         pd-id = <0x2d>;
 176                 };
 177
 178                 pd_gpio: pd-gpio {
 179                         #power-domain-cells = <0x0>;
 180                         pd-id = <0x2e>;
 181                 };
 182
 183                 pd_can0: pd-can0 {
 184                         #power-domain-cells = <0x0>;
 185                         pd-id = <0x2f>;
 186                 };
 187
 188                 pd_can1: pd-can1 {
 189                         #power-domain-cells = <0x0>;
 190                         pd-id = <0x30>;
 191                 };
 192
 193                 pd_pcie: pd-pcie {
 194                         #power-domain-cells = <0x0>;
 195                         pd-id = <0x3b>;
 196                 };
 197
 198                 pd_gpu: pd-gpu {
 199                         #power-domain-cells = <0x0>;
 200                         pd-id = <0x3a 0x14 0x15>;
 201                 };
 202         };
 203
 204         pmu {
 205                 compatible = "arm,armv8-pmuv3";
 206                 interrupt-parent = <&gic>;
 207                 interrupts = <0 143 4>,
 208                              <0 144 4>,
 209                              <0 145 4>,
 210                              <0 146 4>;
 211         };
 212
 213         psci {
 214                 compatible = "arm,psci-0.2";
 215                 method = "smc";
 216         };
 217
 218         firmware {
 219                 compatible = "xlnx,zynqmp-pm";
 220                 method = "smc";
 221         };
 222
 223         timer {
 224                 compatible = "arm,armv8-timer";
 225                 interrupt-parent = <&gic>;
 226                 interrupts = <1 13 0xf01>,
 227                              <1 14 0xf01>,
 228                              <1 11 0xf01>,
 229                              <1 10 0xf01>;
 230         };
 231
 232         edac {
 233                 compatible = "arm,cortex-a53-edac";
 234         };
 235
 236         pcap {
 237                 compatible = "xlnx,zynqmp-pcap-fpga";
 238         };
 239
 240         amba_apu: amba_apu@0 {
 241                 compatible = "simple-bus";
 242                 #address-cells = <2>;
 243                 #size-cells = <1>;
 244                 ranges = <0 0 0 0 0xffffffff>;
 245
 246                 gic: interrupt-controller@f9010000 {
 247                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 248                         #interrupt-cells = <3>;
 249                         reg = <0x0 0xf9010000 0x10000>,
 250                               <0x0 0xf9020000 0x20000>,
 251                               <0x0 0xf9040000 0x20000>,
 252                               <0x0 0xf9060000 0x20000>;
 253                         interrupt-controller;
 254                         interrupt-parent = <&gic>;
 255                         interrupts = <1 9 0xf04>;
 256                 };
 257         };
 258
 259         amba: amba@0 {
 260                 compatible = "simple-bus";
 261                 u-boot,dm-pre-reloc;
 262                 #address-cells = <2>;
 263                 #size-cells = <1>;
 264                 ranges = <0 0 0 0 0xffffffff>;
 265
 266                 can0: can@ff060000 {
 267                         compatible = "xlnx,zynq-can-1.0";
 268                         status = "disabled";
 269                         clock-names = "can_clk", "pclk";
 270                         reg = <0x0 0xff060000 0x1000>;
 271                         interrupts = <0 23 4>;
 272                         interrupt-parent = <&gic>;
 273                         tx-fifo-depth = <0x40>;
 274                         rx-fifo-depth = <0x40>;
 275                         power-domains = <&pd_can0>;
 276                 };
 277
 278                 can1: can@ff070000 {
 279                         compatible = "xlnx,zynq-can-1.0";
 280                         status = "disabled";
 281                         clock-names = "can_clk", "pclk";
 282                         reg = <0x0 0xff070000 0x1000>;
 283                         interrupts = <0 24 4>;
 284                         interrupt-parent = <&gic>;
 285                         tx-fifo-depth = <0x40>;
 286                         rx-fifo-depth = <0x40>;
 287                         power-domains = <&pd_can1>;
 288                 };
 289
 290                 cci: cci@fd6e0000 {
 291                         compatible = "arm,cci-400";
 292                         reg = <0x0 0xfd6e0000 0x9000>;
 293                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 294                         #address-cells = <1>;
 295                         #size-cells = <1>;
 296
 297                         pmu@9000 {
 298                                 compatible = "arm,cci-400-pmu,r1";
 299                                 reg = <0x9000 0x5000>;
 300                                 interrupt-parent = <&gic>;
 301                                 interrupts = <0 123 4>,
 302                                              <0 123 4>,
 303                                              <0 123 4>,
 304                                              <0 123 4>,
 305                                              <0 123 4>;
 306                         };
 307                 };
 308
 309                 /* GDMA */
 310                 fpd_dma_chan1: dma@fd500000 {
 311                         status = "disabled";
 312                         compatible = "xlnx,zynqmp-dma-1.0";
 313                         reg = <0x0 0xfd500000 0x1000>;
 314                         interrupt-parent = <&gic>;
 315                         interrupts = <0 124 4>;
 316                         clock-names = "clk_main", "clk_apb";
 317                         xlnx,bus-width = <128>;
 318                         #stream-id-cells = <1>;
 319                         iommus = <&smmu 0x14e8>;
 320                         power-domains = <&pd_gdma>;
 321                 };
 322
 323                 fpd_dma_chan2: dma@fd510000 {
 324                         status = "disabled";
 325                         compatible = "xlnx,zynqmp-dma-1.0";
 326                         reg = <0x0 0xfd510000 0x1000>;
 327                         interrupt-parent = <&gic>;
 328                         interrupts = <0 125 4>;
 329                         clock-names = "clk_main", "clk_apb";
 330                         xlnx,bus-width = <128>;
 331                         #stream-id-cells = <1>;
 332                         iommus = <&smmu 0x14e9>;
 333                         power-domains = <&pd_gdma>;
 334                 };
 335
 336                 fpd_dma_chan3: dma@fd520000 {
 337                         status = "disabled";
 338                         compatible = "xlnx,zynqmp-dma-1.0";
 339                         reg = <0x0 0xfd520000 0x1000>;
 340                         interrupt-parent = <&gic>;
 341                         interrupts = <0 126 4>;
 342                         clock-names = "clk_main", "clk_apb";
 343                         xlnx,bus-width = <128>;
 344                         #stream-id-cells = <1>;
 345                         iommus = <&smmu 0x14ea>;
 346                         power-domains = <&pd_gdma>;
 347                 };
 348
 349                 fpd_dma_chan4: dma@fd530000 {
 350                         status = "disabled";
 351                         compatible = "xlnx,zynqmp-dma-1.0";
 352                         reg = <0x0 0xfd530000 0x1000>;
 353                         interrupt-parent = <&gic>;
 354                         interrupts = <0 127 4>;
 355                         clock-names = "clk_main", "clk_apb";
 356                         xlnx,bus-width = <128>;
 357                         #stream-id-cells = <1>;
 358                         iommus = <&smmu 0x14eb>;
 359                         power-domains = <&pd_gdma>;
 360                 };
 361
 362                 fpd_dma_chan5: dma@fd540000 {
 363                         status = "disabled";
 364                         compatible = "xlnx,zynqmp-dma-1.0";
 365                         reg = <0x0 0xfd540000 0x1000>;
 366                         interrupt-parent = <&gic>;
 367                         interrupts = <0 128 4>;
 368                         clock-names = "clk_main", "clk_apb";
 369                         xlnx,bus-width = <128>;
 370                         #stream-id-cells = <1>;
 371                         iommus = <&smmu 0x14ec>;
 372                         power-domains = <&pd_gdma>;
 373                 };
 374
 375                 fpd_dma_chan6: dma@fd550000 {
 376                         status = "disabled";
 377                         compatible = "xlnx,zynqmp-dma-1.0";
 378                         reg = <0x0 0xfd550000 0x1000>;
 379                         interrupt-parent = <&gic>;
 380                         interrupts = <0 129 4>;
 381                         clock-names = "clk_main", "clk_apb";
 382                         xlnx,bus-width = <128>;
 383                         #stream-id-cells = <1>;
 384                         iommus = <&smmu 0x14ed>;
 385                         power-domains = <&pd_gdma>;
 386                 };
 387
 388                 fpd_dma_chan7: dma@fd560000 {
 389                         status = "disabled";
 390                         compatible = "xlnx,zynqmp-dma-1.0";
 391                         reg = <0x0 0xfd560000 0x1000>;
 392                         interrupt-parent = <&gic>;
 393                         interrupts = <0 130 4>;
 394                         clock-names = "clk_main", "clk_apb";
 395                         xlnx,bus-width = <128>;
 396                         #stream-id-cells = <1>;
 397                         iommus = <&smmu 0x14ee>;
 398                         power-domains = <&pd_gdma>;
 399                 };
 400
 401                 fpd_dma_chan8: dma@fd570000 {
 402                         status = "disabled";
 403                         compatible = "xlnx,zynqmp-dma-1.0";
 404                         reg = <0x0 0xfd570000 0x1000>;
 405                         interrupt-parent = <&gic>;
 406                         interrupts = <0 131 4>;
 407                         clock-names = "clk_main", "clk_apb";
 408                         xlnx,bus-width = <128>;
 409                         #stream-id-cells = <1>;
 410                         iommus = <&smmu 0x14ef>;
 411                         power-domains = <&pd_gdma>;
 412                 };
 413
 414                 gpu: gpu@fd4b0000 {
 415                         status = "disabled";
 416                         compatible = "arm,mali-400", "arm,mali-utgard";
 417                         reg = <0x0 0xfd4b0000 0x30000>;
 418                         interrupt-parent = <&gic>;
 419                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 420                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 421                         power-domains = <&pd_gpu>;
 422                 };
 423
 424                 /* ADMA */
 425                 lpd_dma_chan1: dma@ffa80000 {
 426                         status = "disabled";
 427                         compatible = "xlnx,zynqmp-dma-1.0";
 428                         reg = <0x0 0xffa80000 0x1000>;
 429                         interrupt-parent = <&gic>;
 430                         interrupts = <0 77 4>;
 431                         xlnx,bus-width = <64>;
 432                         #stream-id-cells = <1>;
 433                         iommus = <&smmu 0x868>;
 434                         power-domains = <&pd_adma>;
 435                 };
 436
 437                 lpd_dma_chan2: dma@ffa90000 {
 438                         status = "disabled";
 439                         compatible = "xlnx,zynqmp-dma-1.0";
 440                         reg = <0x0 0xffa90000 0x1000>;
 441                         interrupt-parent = <&gic>;
 442                         interrupts = <0 78 4>;
 443                         xlnx,bus-width = <64>;
 444                         #stream-id-cells = <1>;
 445                         iommus = <&smmu 0x869>;
 446                         power-domains = <&pd_adma>;
 447                 };
 448
 449                 lpd_dma_chan3: dma@ffaa0000 {
 450                         status = "disabled";
 451                         compatible = "xlnx,zynqmp-dma-1.0";
 452                         reg = <0x0 0xffaa0000 0x1000>;
 453                         interrupt-parent = <&gic>;
 454                         interrupts = <0 79 4>;
 455                         xlnx,bus-width = <64>;
 456                         #stream-id-cells = <1>;
 457                         iommus = <&smmu 0x86a>;
 458                         power-domains = <&pd_adma>;
 459                 };
 460
 461                 lpd_dma_chan4: dma@ffab0000 {
 462                         status = "disabled";
 463                         compatible = "xlnx,zynqmp-dma-1.0";
 464                         reg = <0x0 0xffab0000 0x1000>;
 465                         interrupt-parent = <&gic>;
 466                         interrupts = <0 80 4>;
 467                         xlnx,bus-width = <64>;
 468                         #stream-id-cells = <1>;
 469                         iommus = <&smmu 0x86b>;
 470                         power-domains = <&pd_adma>;
 471                 };
 472
 473                 lpd_dma_chan5: dma@ffac0000 {
 474                         status = "disabled";
 475                         compatible = "xlnx,zynqmp-dma-1.0";
 476                         reg = <0x0 0xffac0000 0x1000>;
 477                         interrupt-parent = <&gic>;
 478                         interrupts = <0 81 4>;
 479                         xlnx,bus-width = <64>;
 480                         #stream-id-cells = <1>;
 481                         iommus = <&smmu 0x86c>;
 482                         power-domains = <&pd_adma>;
 483                 };
 484
 485                 lpd_dma_chan6: dma@ffad0000 {
 486                         status = "disabled";
 487                         compatible = "xlnx,zynqmp-dma-1.0";
 488                         reg = <0x0 0xffad0000 0x1000>;
 489                         interrupt-parent = <&gic>;
 490                         interrupts = <0 82 4>;
 491                         xlnx,bus-width = <64>;
 492                         #stream-id-cells = <1>;
 493                         iommus = <&smmu 0x86d>;
 494                         power-domains = <&pd_adma>;
 495                 };
 496
 497                 lpd_dma_chan7: dma@ffae0000 {
 498                         status = "disabled";
 499                         compatible = "xlnx,zynqmp-dma-1.0";
 500                         reg = <0x0 0xffae0000 0x1000>;
 501                         interrupt-parent = <&gic>;
 502                         interrupts = <0 83 4>;
 503                         xlnx,bus-width = <64>;
 504                         #stream-id-cells = <1>;
 505                         iommus = <&smmu 0x86e>;
 506                         power-domains = <&pd_adma>;
 507                 };
 508
 509                 lpd_dma_chan8: dma@ffaf0000 {
 510                         status = "disabled";
 511                         compatible = "xlnx,zynqmp-dma-1.0";
 512                         reg = <0x0 0xffaf0000 0x1000>;
 513                         interrupt-parent = <&gic>;
 514                         interrupts = <0 84 4>;
 515                         xlnx,bus-width = <64>;
 516                         #stream-id-cells = <1>;
 517                         iommus = <&smmu 0x86f>;
 518                         power-domains = <&pd_adma>;
 519                 };
 520
 521                 mc: memory-controller@fd070000 {
 522                         compatible = "xlnx,zynqmp-ddrc-2.40a";
 523                         reg = <0x0 0xfd070000 0x30000>;
 524                         interrupt-parent = <&gic>;
 525                         interrupts = <0 112 4>;
 526                 };
 527
 528                 nand0: nand@ff100000 {
 529                         compatible = "arasan,nfc-v3p10";
 530                         status = "disabled";
 531                         reg = <0x0 0xff100000 0x1000>;
 532                         clock-names = "clk_sys", "clk_flash";
 533                         interrupt-parent = <&gic>;
 534                         interrupts = <0 14 4>;
 535                         #address-cells = <2>;
 536                         #size-cells = <1>;
 537                         #stream-id-cells = <1>;
 538                         iommus = <&smmu 0x872>;
 539                         power-domains = <&pd_nand>;
 540                 };
 541
 542                 gem0: ethernet@ff0b0000 {
 543                         compatible = "cdns,zynqmp-gem";
 544                         status = "disabled";
 545                         interrupt-parent = <&gic>;
 546                         interrupts = <0 57 4>, <0 57 4>;
 547                         reg = <0x0 0xff0b0000 0x1000>;
 548                         clock-names = "pclk", "hclk", "tx_clk";
 549                         #address-cells = <1>;
 550                         #size-cells = <0>;
 551                         #stream-id-cells = <1>;
 552                         iommus = <&smmu 0x874>;
 553                         power-domains = <&pd_eth0>;
 554                 };
 555
 556                 gem1: ethernet@ff0c0000 {
 557                         compatible = "cdns,zynqmp-gem";
 558                         status = "disabled";
 559                         interrupt-parent = <&gic>;
 560                         interrupts = <0 59 4>, <0 59 4>;
 561                         reg = <0x0 0xff0c0000 0x1000>;
 562                         clock-names = "pclk", "hclk", "tx_clk";
 563                         #address-cells = <1>;
 564                         #size-cells = <0>;
 565                         #stream-id-cells = <1>;
 566                         iommus = <&smmu 0x875>;
 567                         power-domains = <&pd_eth1>;
 568                 };
 569
 570                 gem2: ethernet@ff0d0000 {
 571                         compatible = "cdns,zynqmp-gem";
 572                         status = "disabled";
 573                         interrupt-parent = <&gic>;
 574                         interrupts = <0 61 4>, <0 61 4>;
 575                         reg = <0x0 0xff0d0000 0x1000>;
 576                         clock-names = "pclk", "hclk", "tx_clk";
 577                         #address-cells = <1>;
 578                         #size-cells = <0>;
 579                         #stream-id-cells = <1>;
 580                         iommus = <&smmu 0x876>;
 581                         power-domains = <&pd_eth2>;
 582                 };
 583
 584                 gem3: ethernet@ff0e0000 {
 585                         compatible = "cdns,zynqmp-gem";
 586                         status = "disabled";
 587                         interrupt-parent = <&gic>;
 588                         interrupts = <0 63 4>, <0 63 4>;
 589                         reg = <0x0 0xff0e0000 0x1000>;
 590                         clock-names = "pclk", "hclk", "tx_clk";
 591                         #address-cells = <1>;
 592                         #size-cells = <0>;
 593                         #stream-id-cells = <1>;
 594                         iommus = <&smmu 0x877>;
 595                         power-domains = <&pd_eth3>;
 596                 };
 597
 598                 gpio: gpio@ff0a0000 {
 599                         compatible = "xlnx,zynqmp-gpio-1.0";
 600                         status = "disabled";
 601                         #gpio-cells = <0x2>;
 602                         interrupt-parent = <&gic>;
 603                         interrupts = <0 16 4>;
 604                         interrupt-controller;
 605                         #interrupt-cells = <2>;
 606                         reg = <0x0 0xff0a0000 0x1000>;
 607                         power-domains = <&pd_gpio>;
 608                 };
 609
 610                 i2c0: i2c@ff020000 {
 611                         compatible = "cdns,i2c-r1p10";
 612                         status = "disabled";
 613                         interrupt-parent = <&gic>;
 614                         interrupts = <0 17 4>;
 615                         reg = <0x0 0xff020000 0x1000>;
 616                         #address-cells = <1>;
 617                         #size-cells = <0>;
 618                         power-domains = <&pd_i2c0>;
 619                 };
 620
 621                 i2c1: i2c@ff030000 {
 622                         compatible = "cdns,i2c-r1p10";
 623                         status = "disabled";
 624                         interrupt-parent = <&gic>;
 625                         interrupts = <0 18 4>;
 626                         reg = <0x0 0xff030000 0x1000>;
 627                         #address-cells = <1>;
 628                         #size-cells = <0>;
 629                         power-domains = <&pd_i2c1>;
 630                 };
 631
 632                 pcie: pcie@fd0e0000 {
 633                         compatible = "xlnx,nwl-pcie-2.11";
 634                         status = "disabled";
 635                         #address-cells = <3>;
 636                         #size-cells = <2>;
 637                         #interrupt-cells = <1>;
 638                         msi-controller;
 639                         device_type = "pci";
 640                         interrupt-parent = <&gic>;
 641                         interrupts = <0 118 4>,
 642                                      <0 117 4>,
 643                                      <0 116 4>,
 644                                      <0 115 4>, /* MSI_1 [63...32] */
 645                                      <0 114 4>; /* MSI_0 [31...0] */
 646                         interrupt-names = "misc","dummy","intx", "msi1", "msi0";
 647                         msi-parent = <&pcie>;
 648                         reg = <0x0 0xfd0e0000 0x1000>,
 649                               <0x0 0xfd480000 0x1000>,
 650                               <0x0 0xe0000000 0x1000000>;
 651                         reg-names = "breg", "pcireg", "cfg";
 652                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 653                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 654                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 655                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 656                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 657                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 658                         power-domains = <&pd_pcie>;
 659                         pcie_intc: legacy-interrupt-controller {
 660                                 interrupt-controller;
 661                                 #address-cells = <0>;
 662                                 #interrupt-cells = <1>;
 663                         };
 664                 };
 665
 666                 qspi: spi@ff0f0000 {
 667                         compatible = "xlnx,zynqmp-qspi-1.0";
 668                         status = "disabled";
 669                         clock-names = "ref_clk", "pclk";
 670                         interrupts = <0 15 4>;
 671                         interrupt-parent = <&gic>;
 672                         num-cs = <1>;
 673                         reg = <0x0 0xff0f0000 0x1000>,
 674                               <0x0 0xc0000000 0x8000000>;
 675                         #address-cells = <1>;
 676                         #size-cells = <0>;
 677                         #stream-id-cells = <1>;
 678                         iommus = <&smmu 0x873>;
 679                         power-domains = <&pd_qspi>;
 680                 };
 681
 682                 rtc: rtc@ffa60000 {
 683                         compatible = "xlnx,zynqmp-rtc";
 684                         status = "disabled";
 685                         reg = <0x0 0xffa60000 0x100>;
 686                         interrupt-parent = <&gic>;
 687                         interrupts = <0 26 4>, <0 27 4>;
 688                         interrupt-names = "alarm", "sec";
 689                 };
 690
 691                 serdes: zynqmp_phy@fd400000 {
 692                         compatible = "xlnx,zynqmp-psgtr";
 693                         status = "disabled";
 694                         reg = <0x0 0xfd400000 0x40000>,
 695                               <0x0 0xfd3d0000 0x1000>,
 696                               <0x0 0xfd1a0000 0x1000>,
 697                               <0x0 0xff5e0000 0x1000>;
 698                         reg-names = "serdes", "siou", "fpd", "lpd";
 699                         xlnx,tx_termination_fix;
 700                         lane0: lane0 {
 701                                 #phy-cells = <4>;
 702                         };
 703                         lane1: lane1 {
 704                                 #phy-cells = <4>;
 705                         };
 706                         lane2: lane2 {
 707                                 #phy-cells = <4>;
 708                         };
 709                         lane3: lane3 {
 710                                 #phy-cells = <4>;
 711                         };
 712                 };
 713
 714                 sata: ahci@fd0c0000 {
 715                         compatible = "ceva,ahci-1v84";
 716                         status = "disabled";
 717                         reg = <0x0 0xfd0c0000 0x2000>;
 718                         interrupt-parent = <&gic>;
 719                         interrupts = <0 133 4>;
 720                         power-domains = <&pd_sata>;
 721                 };
 722
 723                 sdhci0: sdhci@ff160000 {
 724                         u-boot,dm-pre-reloc;
 725                         compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
 726                         status = "disabled";
 727                         interrupt-parent = <&gic>;
 728                         interrupts = <0 48 4>;
 729                         reg = <0x0 0xff160000 0x1000>;
 730                         clock-names = "clk_xin", "clk_ahb";
 731                         xlnx,device_id = <0>;
 732                         #stream-id-cells = <1>;
 733                         iommus = <&smmu 0x870>;
 734                         power-domains = <&pd_sd0>;
 735                 };
 736
 737                 sdhci1: sdhci@ff170000 {
 738                         u-boot,dm-pre-reloc;
 739                         compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
 740                         status = "disabled";
 741                         interrupt-parent = <&gic>;
 742                         interrupts = <0 49 4>;
 743                         reg = <0x0 0xff170000 0x1000>;
 744                         clock-names = "clk_xin", "clk_ahb";
 745                         xlnx,device_id = <1>;
 746                         #stream-id-cells = <1>;
 747                         iommus = <&smmu 0x871>;
 748                         power-domains = <&pd_sd1>;
 749                 };
 750
 751                 smmu: smmu@fd800000 {
 752                         compatible = "arm,mmu-500";
 753                         reg = <0x0 0xfd800000 0x20000>;
 754                         #iommu-cells = <1>;
 755                         #global-interrupts = <1>;
 756                         interrupt-parent = <&gic>;
 757                         interrupts = <0 155 4>,
 758                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 759                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 760                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 761                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 762                         mmu-masters = < &gem0 0x874
 763                                         &gem1 0x875
 764                                         &gem2 0x876
 765                                         &gem3 0x877
 766                                         &usb0 0x860
 767                                         &usb1 0x861
 768                                         &qspi 0x873
 769                                         &lpd_dma_chan1 0x868
 770                                         &lpd_dma_chan2 0x869
 771                                         &lpd_dma_chan3 0x86a
 772                                         &lpd_dma_chan4 0x86b
 773                                         &lpd_dma_chan5 0x86c
 774                                         &lpd_dma_chan6 0x86d
 775                                         &lpd_dma_chan7 0x86e
 776                                         &lpd_dma_chan8 0x86f
 777                                         &fpd_dma_chan1 0x14e8
 778                                         &fpd_dma_chan2 0x14e9
 779                                         &fpd_dma_chan3 0x14ea
 780                                         &fpd_dma_chan4 0x14eb
 781                                         &fpd_dma_chan5 0x14ec
 782                                         &fpd_dma_chan6 0x14ed
 783                                         &fpd_dma_chan7 0x14ee
 784                                         &fpd_dma_chan8 0x14ef
 785                                         &sdhci0 0x870
 786                                         &sdhci1 0x871
 787                                         &nand0 0x872>;
 788                 };
 789
 790                 spi0: spi@ff040000 {
 791                         compatible = "cdns,spi-r1p6";
 792                         status = "disabled";
 793                         interrupt-parent = <&gic>;
 794                         interrupts = <0 19 4>;
 795                         reg = <0x0 0xff040000 0x1000>;
 796                         clock-names = "ref_clk", "pclk";
 797                         #address-cells = <1>;
 798                         #size-cells = <0>;
 799                         power-domains = <&pd_spi0>;
 800                 };
 801
 802                 spi1: spi@ff050000 {
 803                         compatible = "cdns,spi-r1p6";
 804                         status = "disabled";
 805                         interrupt-parent = <&gic>;
 806                         interrupts = <0 20 4>;
 807                         reg = <0x0 0xff050000 0x1000>;
 808                         clock-names = "ref_clk", "pclk";
 809                         #address-cells = <1>;
 810                         #size-cells = <0>;
 811                         power-domains = <&pd_spi1>;
 812                 };
 813
 814                 ttc0: timer@ff110000 {
 815                         compatible = "cdns,ttc";
 816                         status = "disabled";
 817                         interrupt-parent = <&gic>;
 818                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 819                         reg = <0x0 0xff110000 0x1000>;
 820                         timer-width = <32>;
 821                         power-domains = <&pd_ttc0>;
 822                 };
 823
 824                 ttc1: timer@ff120000 {
 825                         compatible = "cdns,ttc";
 826                         status = "disabled";
 827                         interrupt-parent = <&gic>;
 828                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 829                         reg = <0x0 0xff120000 0x1000>;
 830                         timer-width = <32>;
 831                         power-domains = <&pd_ttc1>;
 832                 };
 833
 834                 ttc2: timer@ff130000 {
 835                         compatible = "cdns,ttc";
 836                         status = "disabled";
 837                         interrupt-parent = <&gic>;
 838                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 839                         reg = <0x0 0xff130000 0x1000>;
 840                         timer-width = <32>;
 841                         power-domains = <&pd_ttc2>;
 842                 };
 843
 844                 ttc3: timer@ff140000 {
 845                         compatible = "cdns,ttc";
 846                         status = "disabled";
 847                         interrupt-parent = <&gic>;
 848                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 849                         reg = <0x0 0xff140000 0x1000>;
 850                         timer-width = <32>;
 851                         power-domains = <&pd_ttc3>;
 852                 };
 853
 854                 uart0: serial@ff000000 {
 855                         u-boot,dm-pre-reloc;
 856                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 857                         status = "disabled";
 858                         interrupt-parent = <&gic>;
 859                         interrupts = <0 21 4>;
 860                         reg = <0x0 0xff000000 0x1000>;
 861                         clock-names = "uart_clk", "pclk";
 862                         power-domains = <&pd_uart0>;
 863                 };
 864
 865                 uart1: serial@ff010000 {
 866                         u-boot,dm-pre-reloc;
 867                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 868                         status = "disabled";
 869                         interrupt-parent = <&gic>;
 870                         interrupts = <0 22 4>;
 871                         reg = <0x0 0xff010000 0x1000>;
 872                         clock-names = "uart_clk", "pclk";
 873                         power-domains = <&pd_uart1>;
 874                 };
 875
 876                 usb0: usb0 {
 877                         #address-cells = <2>;
 878                         #size-cells = <1>;
 879                         status = "disabled";
 880                         compatible = "xlnx,zynqmp-dwc3";
 881                         clock-names = "bus_clk", "ref_clk";
 882                         clocks = <&clk125>, <&clk125>;
 883                         #stream-id-cells = <1>;
 884                         iommus = <&smmu 0x860>;
 885                         power-domains = <&pd_usb0>;
 886                         ranges;
 887
 888                         dwc3_0: dwc3@fe200000 {
 889                                 compatible = "snps,dwc3";
 890                                 status = "disabled";
 891                                 reg = <0x0 0xfe200000 0x40000>;
 892                                 interrupt-parent = <&gic>;
 893                                 interrupts = <0 65 4>;
 894                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 895                                 snps,refclk_fladj;
 896                         };
 897                 };
 898
 899                 usb1: usb1 {
 900                         #address-cells = <2>;
 901                         #size-cells = <1>;
 902                         status = "disabled";
 903                         compatible = "xlnx,zynqmp-dwc3";
 904                         clock-names = "bus_clk", "ref_clk";
 905                         clocks = <&clk125>, <&clk125>;
 906                         #stream-id-cells = <1>;
 907                         iommus = <&smmu 0x861>;
 908                         power-domains = <&pd_usb1>;
 909                         ranges;
 910
 911                         dwc3_1: dwc3@fe300000 {
 912                                 compatible = "snps,dwc3";
 913                                 status = "disabled";
 914                                 reg = <0x0 0xfe300000 0x40000>;
 915                                 interrupt-parent = <&gic>;
 916                                 interrupts = <0 70 4>;
 917                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 918                                 snps,refclk_fladj;
 919                         };
 920                 };
 921
 922                 watchdog0: watchdog@fd4d0000 {
 923                         compatible = "cdns,wdt-r1p2";
 924                         status = "disabled";
 925                         interrupt-parent = <&gic>;
 926                         interrupts = <0 113 1>;
 927                         reg = <0x0 0xfd4d0000 0x1000>;
 928                         timeout-sec = <10>;
 929                 };
 930
 931                 xilinx_drm: xilinx_drm {
 932                         compatible = "xlnx,drm";
 933                         status = "disabled";
 934                         xlnx,encoder-slave = <&xlnx_dp>;
 935                         xlnx,connector-type = "DisplayPort";
 936                         xlnx,dp-sub = <&xlnx_dp_sub>;
 937                         planes {
 938                                 xlnx,pixel-format = "rgb565";
 939                                 plane0 {
 940                                         dmas = <&xlnx_dpdma 3>;
 941                                         dma-names = "dma0";
 942                                 };
 943                                 plane1 {
 944                                         dmas = <&xlnx_dpdma 0>,
 945                                                <&xlnx_dpdma 1>,
 946                                                <&xlnx_dpdma 2>;
 947                                         dma-names = "dma0", "dma1", "dma2";
 948                                 };
 949                         };
 950                 };
 951
 952                 xlnx_dp: dp@fd4a0000 {
 953                         compatible = "xlnx,v-dp";
 954                         status = "disabled";
 955                         reg = <0x0 0xfd4a0000 0x1000>;
 956                         interrupts = <0 119 4>;
 957                         interrupt-parent = <&gic>;
 958                         clock-names = "aclk", "aud_clk";
 959                         xlnx,dp-version = "v1.2";
 960                         xlnx,max-lanes = <2>;
 961                         xlnx,max-link-rate = <540000>;
 962                         xlnx,max-bpc = <16>;
 963                         xlnx,enable-ycrcb;
 964                         xlnx,colormetry = "rgb";
 965                         xlnx,bpc = <8>;
 966                         xlnx,audio-chan = <2>;
 967                         xlnx,dp-sub = <&xlnx_dp_sub>;
 968                         xlnx,max-pclock-frequency = <300000>;
 969                 };
 970
 971                 xlnx_dp_snd_card: dp_snd_card {
 972                         compatible = "xlnx,dp-snd-card";
 973                         status = "disabled";
 974                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 975                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 976                 };
 977
 978                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 979                         compatible = "xlnx,dp-snd-codec";
 980                         status = "disabled";
 981                         clock-names = "aud_clk";
 982                 };
 983
 984                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 985                         compatible = "xlnx,dp-snd-pcm";
 986                         status = "disabled";
 987                         dmas = <&xlnx_dpdma 4>;
 988                         dma-names = "tx";
 989                 };
 990
 991                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 992                         compatible = "xlnx,dp-snd-pcm";
 993                         status = "disabled";
 994                         dmas = <&xlnx_dpdma 5>;
 995                         dma-names = "tx";
 996                 };
 997
 998                 xlnx_dp_sub: dp_sub@fd4aa000 {
 999                         compatible = "xlnx,dp-sub";
1000                         status = "disabled";
1001                         reg = <0x0 0xfd4aa000 0x1000>,
1002                               <0x0 0xfd4ab000 0x1000>,
1003                               <0x0 0xfd4ac000 0x1000>;
1004                         reg-names = "blend", "av_buf", "aud";
1005                         xlnx,output-fmt = "rgb";
1006                         xlnx,vid-fmt = "yuyv";
1007                         xlnx,gfx-fmt = "rgb565";
1008                 };
1009
1010                 xlnx_dpdma: dma@fd4c0000 {
1011                         compatible = "xlnx,dpdma";
1012                         status = "disabled";
1013                         reg = <0x0 0xfd4c0000 0x1000>;
1014                         interrupts = <0 122 4>;
1015                         interrupt-parent = <&gic>;
1016                         clock-names = "axi_clk";
1017                         dma-channels = <6>;
1018                         #dma-cells = <1>;
1019                         dma-video0channel {
1020                                 compatible = "xlnx,video0";
1021                         };
1022                         dma-video1channel {
1023                                 compatible = "xlnx,video1";
1024                         };
1025                         dma-video2channel {
1026                                 compatible = "xlnx,video2";
1027                         };
1028                         dma-graphicschannel {
1029                                 compatible = "xlnx,graphics";
1030                         };
1031                         dma-audio0channel {
1032                                 compatible = "xlnx,audio0";
1033                         };
1034                         dma-audio1channel {
1035                                 compatible = "xlnx,audio1";
1036                         };
1037                 };
1038         };
1039 };