arch/arm/imx-common/cpu.c

   1 /*
   2  * (C) Copyright 2007
   3  * Sascha Hauer, Pengutronix
   4  *
   5  * (C) Copyright 2009 Freescale Semiconductor, Inc.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <asm/errno.h>
  28 #include <asm/io.h>
  29 #include <asm/arch/imx-regs.h>
  30 #include <asm/arch/clock.h>
  31 #include <asm/arch/sys_proto.h>
  32 #include <asm/arch/crm_regs.h>
  33
  34 #ifdef CONFIG_FSL_ESDHC
  35 #include <fsl_esdhc.h>
  36 #endif
  37
  38 char *get_reset_cause(void)
  39 {
  40         u32 cause;
  41         struct src *src_regs = (struct src *)SRC_BASE_ADDR;
  42
  43         cause = readl(&src_regs->srsr);
  44         writel(cause, &src_regs->srsr);
  45
  46         switch (cause) {
  47         case 0x00001:
  48         case 0x00011:
  49                 return "POR";
  50         case 0x00004:
  51                 return "CSU";
  52         case 0x00008:
  53                 return "IPP USER";
  54         case 0x00010:
  55                 return "WDOG";
  56         case 0x00020:
  57                 return "JTAG HIGH-Z";
  58         case 0x00040:
  59                 return "JTAG SW";
  60         case 0x10000:
  61                 return "WARM BOOT";
  62         default:
  63                 return "unknown reset";
  64         }
  65 }
  66
  67 #if defined(CONFIG_DISPLAY_CPUINFO)
  68
  69 static const char *get_imx_type(u32 imxtype)
  70 {
  71         switch (imxtype) {
  72         case 0x63:
  73                 return "6Q";    /* Quad-core version of the mx6 */
  74         case 0x61:
  75                 return "6DS";   /* Dual/Solo version of the mx6 */
  76         case 0x60:
  77                 return "6SL";   /* Solo-Lite version of the mx6 */
  78         case 0x51:
  79                 return "51";
  80         case 0x53:
  81                 return "53";
  82         default:
  83                 return "??";
  84         }
  85 }
  86
  87 int print_cpuinfo(void)
  88 {
  89         u32 cpurev;
  90
  91         cpurev = get_cpu_rev();
  92
  93         printf("CPU:   Freescale i.MX%s rev%d.%d at %d MHz\n",
  94                 get_imx_type((cpurev & 0xFF000) >> 12),
  95                 (cpurev & 0x000F0) >> 4,
  96                 (cpurev & 0x0000F) >> 0,
  97                 mxc_get_clock(MXC_ARM_CLK) / 1000000);
  98         printf("Reset cause: %s\n", get_reset_cause());
  99         return 0;
 100 }
 101 #endif
 102
 103 int cpu_eth_init(bd_t *bis)
 104 {
 105         int rc = -ENODEV;
 106
 107 #if defined(CONFIG_FEC_MXC)
 108         rc = fecmxc_initialize(bis);
 109 #endif
 110
 111         return rc;
 112 }
 113
 114 #ifdef CONFIG_FSL_ESDHC
 115 /*
 116  * Initializes on-chip MMC controllers.
 117  * to override, implement board_mmc_init()
 118  */
 119 int cpu_mmc_init(bd_t *bis)
 120 {
 121         return fsl_esdhc_mmc_init(bis);
 122 }
 123 #endif
 124
 125 void reset_cpu(ulong addr)
 126 {
 127         __raw_writew(4, WDOG1_BASE_ADDR);
 128 }
 129
 130 u32 get_ahb_clk(void)
 131 {
 132         struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
 133         u32 reg, ahb_podf;
 134
 135         reg = __raw_readl(&imx_ccm->cbcdr);
 136         reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
 137         ahb_podf = reg >> MXC_CCM_CBCDR_AHB_PODF_OFFSET;
 138
 139         return get_periph_clk() / (ahb_podf + 1);
 140 }