arch/arm/include/asm/arch-armada100/mfp.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Based on linux/arch/arm/mach-mpp/include/mfp-pxa168.h
   4  * (C) Copyright 2007
   5  * Marvell Semiconductor <www.marvell.com>
   6  * 2007-08-21: eric miao <eric.miao@marvell.com>
   7  *
   8  * (C) Copyright 2010
   9  * Marvell Semiconductor <www.marvell.com>
  10  * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  11  * Contributor: Mahavir Jain <mjain@marvell.com>
  12  */
  13
  14 #ifndef __ARMADA100_MFP_H
  15 #define __ARMADA100_MFP_H
  16
  17 /*
  18  * Frequently used MFP Configuration macros for all ARMADA100 family of SoCs
  19  *
  20  *                                  offset, pull,pF, drv,dF, edge,eF ,afn,aF
  21  */
  22 /* UART1 */
  23 #define MFP107_UART1_TXD        (MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST)
  24 #define MFP107_UART1_RXD        (MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST)
  25 #define MFP108_UART1_RXD        (MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST)
  26 #define MFP108_UART1_TXD        (MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST)
  27 #define MFP109_UART1_CTS        (MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  28 #define MFP109_UART1_RTS        (MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  29 #define MFP110_UART1_RTS        (MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  30 #define MFP110_UART1_CTS        (MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  31 #define MFP111_UART1_RI         (MFP_REG(0x01bc) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  32 #define MFP111_UART1_DSR        (MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  33 #define MFP112_UART1_DTR        (MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  34 #define MFP112_UART1_DCD        (MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  35
  36 /* UART2 */
  37 #define MFP47_UART2_RXD         (MFP_REG(0x0028) | MFP_AF6 | MFP_DRIVE_MEDIUM)
  38 #define MFP48_UART2_TXD         (MFP_REG(0x002c) | MFP_AF6 | MFP_DRIVE_MEDIUM)
  39 #define MFP88_UART2_RXD         (MFP_REG(0x0160) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  40 #define MFP89_UART2_TXD         (MFP_REG(0x0164) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  41
  42 /* UART3 */
  43 #define MFPO8_UART3_TXD         (MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  44 #define MFPO9_UART3_RXD         (MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM)
  45
  46 /* I2c */
  47 #define MFP105_CI2C_SDA         (MFP_REG(0x1a4) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  48 #define MFP106_CI2C_SCL         (MFP_REG(0x1a8) | MFP_AF1 | MFP_DRIVE_MEDIUM)
  49
  50 /* Fast Ethernet */
  51 #define MFP086_ETH_TXCLK        (MFP_REG(0x158) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  52 #define MFP087_ETH_TXEN         (MFP_REG(0x15C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  53 #define MFP088_ETH_TXDQ3        (MFP_REG(0x160) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  54 #define MFP089_ETH_TXDQ2        (MFP_REG(0x164) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  55 #define MFP090_ETH_TXDQ1        (MFP_REG(0x168) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  56 #define MFP091_ETH_TXDQ0        (MFP_REG(0x16C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  57 #define MFP092_ETH_CRS          (MFP_REG(0x170) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  58 #define MFP093_ETH_COL          (MFP_REG(0x174) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  59 #define MFP094_ETH_RXCLK        (MFP_REG(0x178) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  60 #define MFP095_ETH_RXER         (MFP_REG(0x17C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  61 #define MFP096_ETH_RXDQ3        (MFP_REG(0x180) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  62 #define MFP097_ETH_RXDQ2        (MFP_REG(0x184) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  63 #define MFP098_ETH_RXDQ1        (MFP_REG(0x188) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  64 #define MFP099_ETH_RXDQ0        (MFP_REG(0x18C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  65 #define MFP100_ETH_MDC          (MFP_REG(0x190) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  66 #define MFP101_ETH_MDIO         (MFP_REG(0x194) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  67 #define MFP103_ETH_RXDV         (MFP_REG(0x19C) | MFP_AF5 | MFP_DRIVE_MEDIUM)
  68
  69 /* SPI */
  70 #define MFP107_SSP2_RXD         (MFP_REG(0x1AC) | MFP_AF4 | MFP_DRIVE_MEDIUM)
  71 #define MFP108_SSP2_TXD         (MFP_REG(0x1B0) | MFP_AF4 | MFP_DRIVE_MEDIUM)
  72 #define MFP110_SSP2_CS          (MFP_REG(0x1B8) | MFP_AF0 | MFP_DRIVE_MEDIUM)
  73 #define MFP111_SSP2_CLK         (MFP_REG(0x1BC) | MFP_AF4 | MFP_DRIVE_MEDIUM)
  74
  75 /* More macros can be defined here... */
  76
  77 #define MFP_PIN_MAX     117
  78
  79 #endif /* __ARMADA100_MFP_H */