arch/arm/include/asm/arch-at91/at91sam9263.h

   1 /*
   2  * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9263.h]
   3  *
   4  * (C) 2007 Atmel Corporation.
   5  * (C) Copyright 2010
   6  * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
   7  *
   8  * Definitions for the SoC:
   9  * AT91SAM9263
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #ifndef AT91SAM9263_H
  18 #define AT91SAM9263_H
  19
  20 /*
  21  * defines to be used in other places
  22  */
  23 #define CONFIG_ARM926EJS        /* ARM926EJS Core */
  24 #define CONFIG_AT91FAMILY       /* it's a member of AT91 */
  25
  26 /*
  27  * Peripheral identifiers/interrupts.
  28  */
  29 #define ATMEL_ID_FIQ    0       /* Advanced Interrupt Controller (FIQ) */
  30 #define ATMEL_ID_SYS    1       /* System Peripherals */
  31 #define ATMEL_ID_PIOA   2       /* Parallel IO Controller A */
  32 #define ATMEL_ID_PIOB   3       /* Parallel IO Controller B */
  33 #define ATMEL_ID_PIOCDE 4       /* Parallel IO Controller C, D and E */
  34 /* Reserved:            5 */
  35 /* Reserved:            6 */
  36 #define ATMEL_ID_USART0 7       /* USART 0 */
  37 #define ATMEL_ID_USART1 8       /* USART 1 */
  38 #define ATMEL_ID_USART2 9       /* USART 2 */
  39 #define ATMEL_ID_MCI0   10      /* Multimedia Card Interface 0 */
  40 #define ATMEL_ID_MCI1   11      /* Multimedia Card Interface 1 */
  41 #define ATMEL_ID_CAN    12      /* CAN */
  42 #define ATMEL_ID_TWI    13      /* Two-Wire Interface */
  43 #define ATMEL_ID_SPI0   14      /* Serial Peripheral Interface 0 */
  44 #define ATMEL_ID_SPI1   15      /* Serial Peripheral Interface 1 */
  45 #define ATMEL_ID_SSC0   16      /* Serial Synchronous Controller 0 */
  46 #define ATMEL_ID_SSC1   17      /* Serial Synchronous Controller 1 */
  47 #define ATMEL_ID_AC97C  18      /* AC97 Controller */
  48 #define ATMEL_ID_TCB    19      /* Timer Counter 0, 1 and 2 */
  49 #define ATMEL_ID_PWMC   20      /* Pulse Width Modulation Controller */
  50 #define ATMEL_ID_EMAC   21      /* Ethernet */
  51 /* Reserved:            22 */
  52 #define ATMEL_ID_2DGE   23      /* 2D Graphic Engine */
  53 #define ATMEL_ID_UDP    24      /* USB Device Port */
  54 #define ATMEL_ID_ISI    25      /* Image Sensor Interface */
  55 #define ATMEL_ID_LCDC   26      /* LCD Controller */
  56 #define ATMEL_ID_DMA    27      /* DMA Controller */
  57 /* Reserved:            28 */
  58 #define ATMEL_ID_UHP    29      /* USB Host port */
  59 #define ATMEL_ID_IRQ0   30      /* Advanced Interrupt Controller (IRQ0) */
  60 #define ATMEL_ID_IRQ1   31      /* Advanced Interrupt Controller (IRQ1) */
  61
  62 /*
  63  * User Peripherals physical base addresses.
  64  */
  65 #define ATMEL_BASE_UDP          0xfff78000
  66 #define ATMEL_BASE_TCB0         0xfff7c000
  67 #define ATMEL_BASE_TC0          0xfff7c000
  68 #define ATMEL_BASE_TC1          0xfff7c040
  69 #define ATMEL_BASE_TC2          0xfff7c080
  70 #define ATMEL_BASE_MCI0         0xfff80000
  71 #define ATMEL_BASE_MCI1         0xfff84000
  72 #define ATMEL_BASE_TWI          0xfff88000
  73 #define ATMEL_BASE_USART0       0xfff8c000
  74 #define ATMEL_BASE_USART1       0xfff90000
  75 #define ATMEL_BASE_USART2       0xfff94000
  76 #define ATMEL_BASE_SSC0         0xfff98000
  77 #define ATMEL_BASE_SSC1         0xfff9c000
  78 #define ATMEL_BASE_AC97C        0xfffa0000
  79 #define ATMEL_BASE_SPI0         0xfffa4000
  80 #define ATMEL_BASE_SPI1         0xfffa8000
  81 #define ATMEL_BASE_CAN          0xfffac000
  82 #define ATMEL_BASE_PWMC         0xfffb8000
  83 #define ATMEL_BASE_EMAC         0xfffbc000
  84 #define ATMEL_BASE_ISI          0xfffc4000
  85 #define ATMEL_BASE_2DGE         0xfffc8000
  86
  87 /*
  88  * System Peripherals physical base addresses.
  89  */
  90 #define ATMEL_BASE_ECC0         0xffffe000
  91 #define ATMEL_BASE_SDRAMC0      0xffffe200
  92 #define ATMEL_BASE_SMC0         0xffffe400
  93 #define ATMEL_BASE_ECC1         0xffffe600
  94 #define ATMEL_BASE_SDRAMC1      0xffffe800
  95 #define ATMEL_BASE_SMC1         0xffffea00
  96 #define ATMEL_BASE_MATRIX       0xffffec00
  97 #define ATMEL_BASE_CCFG         0xffffed10
  98 #define ATMEL_BASE_DBGU         0xffffee00
  99 #define ATMEL_BASE_AIC          0xfffff000
 100 #define ATMEL_BASE_PIOA         0xfffff200
 101 #define ATMEL_BASE_PIOB         0xfffff400
 102 #define ATMEL_BASE_PIOC         0xfffff600
 103 #define ATMEL_BASE_PIOD         0xfffff800
 104 #define ATMEL_BASE_PIOE         0xfffffa00
 105 #define ATMEL_BASE_PMC          0xfffffc00
 106 #define ATMEL_BASE_RSTC         0xfffffd00
 107 #define ATMEL_BASE_SHDWC        0xfffffd10
 108 #define ATMEL_BASE_RTT0         0xfffffd20
 109 #define ATMEL_BASE_PIT          0xfffffd30
 110 #define ATMEL_BASE_WDT          0xfffffd40
 111 #define ATMEL_BASE_RTT1         0xfffffd50
 112 #define ATMEL_BASE_GPBR         0xfffffd60
 113
 114 /*
 115  * Internal Memory.
 116  */
 117 #define ATMEL_BASE_SRAM0        0x00300000      /* Internal SRAM 0 */
 118
 119 #define ATMEL_BASE_ROM          0x00400000      /* Internal ROM */
 120
 121 #define ATMEL_BASE_SRAM1        0x00500000      /* Internal SRAM 1 */
 122
 123 #define ATMEL_BASE_LCDC         0x00700000      /* LCD Controller */
 124 #define ATMEL_BASE_DMAC         0x00800000      /* DMA Controller */
 125 #define ATMEL_BASE_UHP          0x00a00000      /* USB Host controller */
 126
 127 /*
 128  * External memory
 129  */
 130 #define ATMEL_BASE_CS0          0x10000000      /* typically NOR */
 131 #define ATMEL_BASE_CS1          0x20000000      /* SDRAM */
 132 #define ATMEL_BASE_CS2          0x30000000
 133 #define ATMEL_BASE_CS3          0x40000000      /* typically NAND */
 134 #define ATMEL_BASE_CS4          0x50000000
 135 #define ATMEL_BASE_CS5          0x60000000
 136 #define ATMEL_BASE_CS6          0x70000000
 137 #define ATMEL_BASE_CS7          0x80000000
 138
 139 /*
 140  * Other misc defines
 141  */
 142 #define ATMEL_PIO_PORTS         5               /* this SoCs has 5 PIO */
 143 #define ATMEL_BASE_PIO          ATMEL_BASE_PIOA
 144 #define ATMEL_PMC_UHP           AT91SAM926x_PMC_UHP
 145
 146 /*
 147  * Cpu Name
 148  */
 149 #define ATMEL_CPU_NAME          "AT91SAM9263"
 150
 151 #endif