]>
git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/include/asm/arch-fsl-layerscape/fsl_serdes.h
2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SERDES_H__
8 #define __FSL_SERDES_H__
12 #if defined(CONFIG_LS2080A)
47 QSGMII_A
, /* A indicates MACs 1-4 */
48 QSGMII_B
, /* B indicates MACs 5-8 */
49 QSGMII_C
, /* C indicates MACs 9-12 */
50 QSGMII_D
, /* D indicates MACs 12-16 */
58 #elif defined(CONFIG_LS1043A)
108 QSGMII_FM1_A
, /* A indicates MACs 1,2,5,6 */
109 QSGMII_FM1_B
, /* B indicates MACs 5,6,9,10 */
119 QSGMII_SW1_A
, /* Indicates ports on L2 Switch */
121 SGMII_2500_FM1_DTSEC1
,
122 SGMII_2500_FM1_DTSEC2
,
123 SGMII_2500_FM1_DTSEC3
,
124 SGMII_2500_FM1_DTSEC4
,
125 SGMII_2500_FM1_DTSEC5
,
126 SGMII_2500_FM1_DTSEC6
,
127 SGMII_2500_FM1_DTSEC9
,
128 SGMII_2500_FM1_DTSEC10
,
129 SGMII_2500_FM2_DTSEC1
,
130 SGMII_2500_FM2_DTSEC2
,
131 SGMII_2500_FM2_DTSEC3
,
132 SGMII_2500_FM2_DTSEC4
,
133 SGMII_2500_FM2_DTSEC5
,
134 SGMII_2500_FM2_DTSEC6
,
135 SGMII_2500_FM2_DTSEC9
,
136 SGMII_2500_FM2_DTSEC10
,
146 int is_serdes_configured(enum srds_prtcl device
);
147 void fsl_serdes_init(void);
148 int serdes_get_first_lane(u32 sd
, enum srds_prtcl device
);
149 enum srds_prtcl
serdes_get_prtcl(int serdes
, int cfg
, int lane
);
150 int is_serdes_prtcl_valid(int serdes
, u32 prtcl
);
152 #ifdef CONFIG_LS1043A
153 const char *serdes_clock_to_string(u32 clock
);
154 int get_serdes_protocol(void);
157 #endif /* __FSL_SERDES_H__ */