arch/arm/include/asm/arch-imx8/sci/sci.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2018 NXP
   4  */
   5
   6 #ifndef _SC_SCI_H
   7 #define _SC_SCI_H
   8
   9 #include <log.h>
  10 #include <asm/arch/sci/types.h>
  11 #include <asm/arch/sci/svc/misc/api.h>
  12 #include <asm/arch/sci/svc/pad/api.h>
  13 #include <asm/arch/sci/svc/pm/api.h>
  14 #include <asm/arch/sci/svc/rm/api.h>
  15 #include <asm/arch/sci/svc/seco/api.h>
  16 #include <asm/arch/sci/rpc.h>
  17 #include <dt-bindings/soc/imx_rsrc.h>
  18 #include <linux/errno.h>
  19
  20 static inline int sc_err_to_linux(sc_err_t err)
  21 {
  22         int ret;
  23
  24         switch (err) {
  25         case SC_ERR_NONE:
  26                 return 0;
  27         case SC_ERR_VERSION:
  28         case SC_ERR_CONFIG:
  29         case SC_ERR_PARM:
  30                 ret = -EINVAL;
  31                 break;
  32         case SC_ERR_NOACCESS:
  33         case SC_ERR_LOCKED:
  34         case SC_ERR_UNAVAILABLE:
  35                 ret = -EACCES;
  36                 break;
  37         case SC_ERR_NOTFOUND:
  38         case SC_ERR_NOPOWER:
  39                 ret = -ENODEV;
  40                 break;
  41         case SC_ERR_IPC:
  42                 ret = -EIO;
  43                 break;
  44         case SC_ERR_BUSY:
  45                 ret = -EBUSY;
  46                 break;
  47         case SC_ERR_FAIL:
  48                 ret = -EIO;
  49                 break;
  50         default:
  51                 ret = 0;
  52                 break;
  53         }
  54
  55         debug("%s %d %d\n", __func__, err, ret);
  56
  57         return ret;
  58 }
  59
  60 /* PM API*/
  61 int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
  62                                   sc_pm_power_mode_t mode);
  63 int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource,
  64                                   sc_pm_power_mode_t *mode);
  65 int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
  66                          sc_pm_clock_rate_t *rate);
  67 int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
  68                          sc_pm_clock_rate_t *rate);
  69 int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
  70                        sc_bool_t enable, sc_bool_t autog);
  71 int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
  72                            sc_pm_clk_parent_t parent);
  73 int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
  74                     sc_faddr_t address);
  75 sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
  76 int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource);
  77
  78 /* MISC API */
  79 int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
  80                         sc_ctrl_t ctrl, u32 val);
  81 int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl,
  82                         u32 *val);
  83 void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev);
  84 void sc_misc_boot_status(sc_ipc_t ipc, sc_misc_boot_status_t status);
  85 int sc_misc_get_boot_container(sc_ipc_t ipc, u8 *idx);
  86 void sc_misc_build_info(sc_ipc_t ipc, u32 *build, u32 *commit);
  87 int sc_misc_otp_fuse_read(sc_ipc_t ipc, u32 word, u32 *val);
  88 int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp,
  89                      s16 *celsius, s8 *tenths);
  90
  91 /* RM API */
  92 sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr);
  93 int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start,
  94                       sc_faddr_t addr_end);
  95 int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr,
  96                                  sc_rm_pt_t pt, sc_rm_perm_t perm);
  97 int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start,
  98                           sc_faddr_t *addr_end);
  99 sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource);
 100 int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure,
 101                           sc_bool_t isolated, sc_bool_t restricted,
 102                           sc_bool_t grant, sc_bool_t coherent);
 103 int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt);
 104 int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt);
 105 int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent);
 106 int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource);
 107 int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad);
 108 sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad);
 109 int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource,
 110                              sc_rm_pt_t *pt);
 111
 112 /* PAD API */
 113 int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val);
 114 int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
 115
 116 /* SMMU API */
 117 int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid);
 118
 119 /* SECO API */
 120 int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd,
 121                          sc_faddr_t addr);
 122 int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change);
 123 int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l,
 124                       u32 *uid_h);
 125 void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit);
 126 int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event);
 127 int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
 128                          sc_faddr_t export_addr, u16 max_size);
 129 int sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, u16 dst_size);
 130 int sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, u8 size, u8 lock);
 131 int sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
 132                         u16 msg_size, sc_faddr_t dst_addr, u16 dst_size);
 133 int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data);
 134 int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access,
 135                           u32 *data0, u32 *data1, u32 *data2, u32 *data3,
 136                           u32 *data4, u8 size);
 137
 138 #endif