arch/arm/include/asm/arch-rockchip/clock.h

   1 /*
   2  * (C) Copyright 2015 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #ifndef _ASM_ARCH_CLOCK_H
   8 #define _ASM_ARCH_CLOCK_H
   9
  10 /* define pll mode */
  11 #define RKCLK_PLL_MODE_SLOW             0
  12 #define RKCLK_PLL_MODE_NORMAL           1
  13
  14 enum {
  15         ROCKCHIP_SYSCON_NOC,
  16         ROCKCHIP_SYSCON_GRF,
  17         ROCKCHIP_SYSCON_SGRF,
  18         ROCKCHIP_SYSCON_PMU,
  19         ROCKCHIP_SYSCON_PMUGRF,
  20         ROCKCHIP_SYSCON_PMUSGRF,
  21         ROCKCHIP_SYSCON_CIC,
  22         ROCKCHIP_SYSCON_MSCH,
  23 };
  24
  25 /* Standard Rockchip clock numbers */
  26 enum rk_clk_id {
  27         CLK_OSC,
  28         CLK_ARM,
  29         CLK_DDR,
  30         CLK_CODEC,
  31         CLK_GENERAL,
  32         CLK_NEW,
  33
  34         CLK_COUNT,
  35 };
  36
  37 static inline int rk_pll_id(enum rk_clk_id clk_id)
  38 {
  39         return clk_id - 1;
  40 }
  41
  42 /**
  43  * clk_get_divisor() - Calculate the required clock divisior
  44  *
  45  * Given an input rate and a required output_rate, calculate the Rockchip
  46  * divisor needed to achieve this.
  47  *
  48  * @input_rate:         Input clock rate in Hz
  49  * @output_rate:        Output clock rate in Hz
  50  * @return divisor register value to use
  51  */
  52 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate)
  53 {
  54         uint clk_div;
  55
  56         clk_div = input_rate / output_rate;
  57         clk_div = (clk_div + 1) & 0xfffe;
  58
  59         return clk_div;
  60 }
  61
  62 /**
  63  * rockchip_get_cru() - get a pointer to the clock/reset unit registers
  64  *
  65  * @return pointer to registers, or -ve error on error
  66  */
  67 void *rockchip_get_cru(void);
  68
  69 /**
  70  * rockchip_get_pmucru() - get a pointer to the clock/reset unit registers
  71  *
  72  * @return pointer to registers, or -ve error on error
  73  */
  74 void *rockchip_get_pmucru(void);
  75
  76 struct rk3288_cru;
  77 struct rk3288_grf;
  78
  79 void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf);
  80
  81 int rockchip_get_clk(struct udevice **devp);
  82
  83 #endif