arch/arm/include/asm/arch-socfpga/reset_manager.h

   1 /*
   2  *  Copyright (C) 2012 Altera Corporation <www.altera.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef _RESET_MANAGER_H_
   8 #define _RESET_MANAGER_H_
   9
  10 void reset_cpu(ulong addr);
  11 void reset_deassert_peripherals_handoff(void);
  12
  13 void socfpga_bridges_reset(int enable);
  14
  15 void socfpga_emac_reset(int enable);
  16 void socfpga_watchdog_reset(void);
  17
  18 struct socfpga_reset_manager {
  19         u32     status;
  20         u32     ctrl;
  21         u32     counts;
  22         u32     padding1;
  23         u32     mpu_mod_reset;
  24         u32     per_mod_reset;
  25         u32     per2_mod_reset;
  26         u32     brg_mod_reset;
  27 };
  28
  29 #if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
  30 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 2
  31 #else
  32 #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1
  33 #endif
  34
  35 #define RSTMGR_PERMODRST_EMAC0_LSB      0
  36 #define RSTMGR_PERMODRST_EMAC1_LSB      1
  37 #define RSTMGR_PERMODRST_L4WD0_LSB      6
  38
  39 #endif /* _RESET_MANAGER_H_ */