arch/arm/include/asm/global_data.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2002-2010
   4  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   5  */
   6
   7 #ifndef __ASM_GBL_DATA_H
   8 #define __ASM_GBL_DATA_H
   9
  10 #ifndef __ASSEMBLY__
  11
  12 #include <config.h>
  13
  14 #include <linux/types.h>
  15
  16 /* Architecture-specific global data */
  17 struct arch_global_data {
  18 #if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX)
  19         u32 sdhc_clk;
  20 #endif
  21
  22 #if defined(CONFIG_FSL_ESDHC)
  23         u32 sdhc_per_clk;
  24 #endif
  25
  26 #if defined(CONFIG_U_QE)
  27         u32 qe_clk;
  28         u32 brg_clk;
  29         uint mp_alloc_base;
  30         uint mp_alloc_top;
  31 #endif /* CONFIG_U_QE */
  32
  33 #ifdef CONFIG_AT91FAMILY
  34         /* "static data" needed by at91's clock.c */
  35         unsigned long   cpu_clk_rate_hz;
  36         unsigned long   main_clk_rate_hz;
  37         unsigned long   mck_rate_hz;
  38         unsigned long   plla_rate_hz;
  39         unsigned long   pllb_rate_hz;
  40         unsigned long   at91_pllb_usb_init;
  41 #endif
  42         /* "static data" needed by most of timer.c on ARM platforms */
  43         unsigned long timer_rate_hz;
  44         unsigned int tbu;
  45         unsigned int tbl;
  46         unsigned long lastinc;
  47         unsigned long long timer_reset_value;
  48 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  49         unsigned long tlb_addr;
  50         unsigned long tlb_size;
  51 #if defined(CONFIG_ARM64)
  52         unsigned long tlb_fillptr;
  53         unsigned long tlb_emerg;
  54 #endif
  55 #endif
  56 #ifdef CFG_SYS_MEM_RESERVE_SECURE
  57 #define MEM_RESERVE_SECURE_SECURED      0x1
  58 #define MEM_RESERVE_SECURE_MAINTAINED   0x2
  59 #define MEM_RESERVE_SECURE_ADDR_MASK    (~0x3)
  60         /*
  61          * Secure memory addr
  62          * This variable needs maintenance if the RAM base is not zero,
  63          * or if RAM splits into non-consecutive banks. It also has a
  64          * flag indicating the secure memory is marked as secure by MMU.
  65          * Flags used: 0x1 secured
  66          *             0x2 maintained
  67          */
  68         phys_addr_t secure_ram;
  69         unsigned long tlb_allocated;
  70 #endif
  71 #ifdef CONFIG_RESV_RAM
  72         /*
  73          * Reserved RAM for memory resident, eg. Management Complex (MC)
  74          * driver which continues to run after U-Boot exits.
  75          */
  76         phys_addr_t resv_ram;
  77 #endif
  78
  79 #ifdef CONFIG_ARCH_OMAP2PLUS
  80         u32 omap_boot_device;
  81         u32 omap_boot_mode;
  82         u8 omap_ch_flags;
  83 #endif
  84 #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
  85         unsigned long mem2_clk;
  86 #endif
  87
  88 #ifdef CONFIG_ARCH_IMX8
  89         struct udevice *scu_dev;
  90 #endif
  91
  92 #ifdef CONFIG_IMX_ELE
  93         struct udevice *ele_dev;
  94         u32 soc_rev;
  95         u32 lifecycle;
  96         u32 uid[4];
  97 #endif
  98
  99 #ifdef CONFIG_ARCH_IMX8ULP
 100         bool m33_handshake_done;
 101 #endif
 102 #ifdef CONFIG_SMBIOS
 103         ulong smbios_start;             /* Start address of SMBIOS table */
 104 #endif
 105 };
 106
 107 #include <asm-generic/global_data.h>
 108
 109 #if defined(__clang__) || defined(LTO_ENABLE)
 110
 111 #define DECLARE_GLOBAL_DATA_PTR
 112 #define gd      get_gd()
 113
 114 static inline gd_t *get_gd(void)
 115 {
 116         gd_t *gd_ptr;
 117
 118 #ifdef CONFIG_ARM64
 119         __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
 120 #else
 121         __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
 122 #endif
 123
 124         return gd_ptr;
 125 }
 126
 127 #else
 128
 129 #ifdef CONFIG_ARM64
 130 #define DECLARE_GLOBAL_DATA_PTR         register volatile gd_t *gd asm ("x18")
 131 #else
 132 #define DECLARE_GLOBAL_DATA_PTR         register volatile gd_t *gd asm ("r9")
 133 #endif
 134 #endif
 135
 136 static inline void set_gd(volatile gd_t *gd_ptr)
 137 {
 138 #ifdef CONFIG_ARM64
 139         __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
 140 #elif __ARM_ARCH >= 7
 141         __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
 142 #else
 143         __asm__ volatile("mov r9, %0\n" : : "r"(gd_ptr));
 144 #endif
 145 }
 146
 147 #endif /* __ASSEMBLY__ */
 148
 149 #endif /* __ASM_GBL_DATA_H */