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arm/arm64: KVM: Add PSCI version selection API
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1 /*
2 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
3 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License, version 2, as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #ifndef __ARM_KVM_HOST_H__
20 #define __ARM_KVM_HOST_H__
21
22 #include <linux/types.h>
23 #include <linux/kvm_types.h>
24 #include <asm/kvm.h>
25 #include <asm/kvm_asm.h>
26 #include <asm/kvm_mmio.h>
27 #include <asm/fpstate.h>
28 #include <kvm/arm_arch_timer.h>
29
30 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
31
32 #define KVM_USER_MEM_SLOTS 32
33 #define KVM_HAVE_ONE_REG
34 #define KVM_HALT_POLL_NS_DEFAULT 500000
35
36 #define KVM_VCPU_MAX_FEATURES 2
37
38 #include <kvm/arm_vgic.h>
39
40
41 #ifdef CONFIG_ARM_GIC_V3
42 #define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
43 #else
44 #define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
45 #endif
46
47 #define KVM_REQ_SLEEP \
48 KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
49 #define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
50
51 u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
52 int __attribute_const__ kvm_target_cpu(void);
53 int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
54 void kvm_reset_coprocs(struct kvm_vcpu *vcpu);
55
56 struct kvm_arch {
57 /* VTTBR value associated with below pgd and vmid */
58 u64 vttbr;
59
60 /* The last vcpu id that ran on each physical CPU */
61 int __percpu *last_vcpu_ran;
62
63 /*
64 * Anything that is not used directly from assembly code goes
65 * here.
66 */
67
68 /* The VMID generation used for the virt. memory system */
69 u64 vmid_gen;
70 u32 vmid;
71
72 /* Stage-2 page table */
73 pgd_t *pgd;
74
75 /* Interrupt controller */
76 struct vgic_dist vgic;
77 int max_vcpus;
78
79 /* Mandated version of PSCI */
80 u32 psci_version;
81 };
82
83 #define KVM_NR_MEM_OBJS 40
84
85 /*
86 * We don't want allocation failures within the mmu code, so we preallocate
87 * enough memory for a single page fault in a cache.
88 */
89 struct kvm_mmu_memory_cache {
90 int nobjs;
91 void *objects[KVM_NR_MEM_OBJS];
92 };
93
94 struct kvm_vcpu_fault_info {
95 u32 hsr; /* Hyp Syndrome Register */
96 u32 hxfar; /* Hyp Data/Inst. Fault Address Register */
97 u32 hpfar; /* Hyp IPA Fault Address Register */
98 };
99
100 /*
101 * 0 is reserved as an invalid value.
102 * Order should be kept in sync with the save/restore code.
103 */
104 enum vcpu_sysreg {
105 __INVALID_SYSREG__,
106 c0_MPIDR, /* MultiProcessor ID Register */
107 c0_CSSELR, /* Cache Size Selection Register */
108 c1_SCTLR, /* System Control Register */
109 c1_ACTLR, /* Auxiliary Control Register */
110 c1_CPACR, /* Coprocessor Access Control */
111 c2_TTBR0, /* Translation Table Base Register 0 */
112 c2_TTBR0_high, /* TTBR0 top 32 bits */
113 c2_TTBR1, /* Translation Table Base Register 1 */
114 c2_TTBR1_high, /* TTBR1 top 32 bits */
115 c2_TTBCR, /* Translation Table Base Control R. */
116 c3_DACR, /* Domain Access Control Register */
117 c5_DFSR, /* Data Fault Status Register */
118 c5_IFSR, /* Instruction Fault Status Register */
119 c5_ADFSR, /* Auxilary Data Fault Status R */
120 c5_AIFSR, /* Auxilary Instrunction Fault Status R */
121 c6_DFAR, /* Data Fault Address Register */
122 c6_IFAR, /* Instruction Fault Address Register */
123 c7_PAR, /* Physical Address Register */
124 c7_PAR_high, /* PAR top 32 bits */
125 c9_L2CTLR, /* Cortex A15/A7 L2 Control Register */
126 c10_PRRR, /* Primary Region Remap Register */
127 c10_NMRR, /* Normal Memory Remap Register */
128 c12_VBAR, /* Vector Base Address Register */
129 c13_CID, /* Context ID Register */
130 c13_TID_URW, /* Thread ID, User R/W */
131 c13_TID_URO, /* Thread ID, User R/O */
132 c13_TID_PRIV, /* Thread ID, Privileged */
133 c14_CNTKCTL, /* Timer Control Register (PL1) */
134 c10_AMAIR0, /* Auxilary Memory Attribute Indirection Reg0 */
135 c10_AMAIR1, /* Auxilary Memory Attribute Indirection Reg1 */
136 NR_CP15_REGS /* Number of regs (incl. invalid) */
137 };
138
139 struct kvm_cpu_context {
140 struct kvm_regs gp_regs;
141 struct vfp_hard_struct vfp;
142 u32 cp15[NR_CP15_REGS];
143 };
144
145 typedef struct kvm_cpu_context kvm_cpu_context_t;
146
147 struct kvm_vcpu_arch {
148 struct kvm_cpu_context ctxt;
149
150 int target; /* Processor target */
151 DECLARE_BITMAP(features, KVM_VCPU_MAX_FEATURES);
152
153 /* The CPU type we expose to the VM */
154 u32 midr;
155
156 /* HYP trapping configuration */
157 u32 hcr;
158
159 /* Interrupt related fields */
160 u32 irq_lines; /* IRQ and FIQ levels */
161
162 /* Exception Information */
163 struct kvm_vcpu_fault_info fault;
164
165 /* Host FP context */
166 kvm_cpu_context_t *host_cpu_context;
167
168 /* VGIC state */
169 struct vgic_cpu vgic_cpu;
170 struct arch_timer_cpu timer_cpu;
171
172 /*
173 * Anything that is not used directly from assembly code goes
174 * here.
175 */
176
177 /* vcpu power-off state */
178 bool power_off;
179
180 /* Don't run the guest (internal implementation need) */
181 bool pause;
182
183 /* IO related fields */
184 struct kvm_decode mmio_decode;
185
186 /* Cache some mmu pages needed inside spinlock regions */
187 struct kvm_mmu_memory_cache mmu_page_cache;
188
189 /* Detect first run of a vcpu */
190 bool has_run_once;
191 };
192
193 struct kvm_vm_stat {
194 ulong remote_tlb_flush;
195 };
196
197 struct kvm_vcpu_stat {
198 u64 halt_successful_poll;
199 u64 halt_attempted_poll;
200 u64 halt_poll_invalid;
201 u64 halt_wakeup;
202 u64 hvc_exit_stat;
203 u64 wfe_exit_stat;
204 u64 wfi_exit_stat;
205 u64 mmio_exit_user;
206 u64 mmio_exit_kernel;
207 u64 exits;
208 };
209
210 #define vcpu_cp15(v,r) (v)->arch.ctxt.cp15[r]
211
212 int kvm_vcpu_preferred_target(struct kvm_vcpu_init *init);
213 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
214 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
215 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
216 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
217 unsigned long kvm_call_hyp(void *hypfn, ...);
218 void force_vm_exit(const cpumask_t *mask);
219
220 #define KVM_ARCH_WANT_MMU_NOTIFIER
221 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
222 int kvm_unmap_hva_range(struct kvm *kvm,
223 unsigned long start, unsigned long end);
224 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
225
226 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu);
227 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices);
228 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
229 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
230
231 struct kvm_vcpu *kvm_arm_get_running_vcpu(void);
232 struct kvm_vcpu __percpu **kvm_get_running_vcpus(void);
233 void kvm_arm_halt_guest(struct kvm *kvm);
234 void kvm_arm_resume_guest(struct kvm *kvm);
235
236 int kvm_arm_copy_coproc_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
237 unsigned long kvm_arm_num_coproc_regs(struct kvm_vcpu *vcpu);
238 int kvm_arm_coproc_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
239 int kvm_arm_coproc_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *);
240
241 int handle_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
242 int exception_index);
243
244 static inline void __cpu_init_hyp_mode(phys_addr_t pgd_ptr,
245 unsigned long hyp_stack_ptr,
246 unsigned long vector_ptr)
247 {
248 /*
249 * Call initialization code, and switch to the full blown HYP
250 * code. The init code doesn't need to preserve these
251 * registers as r0-r3 are already callee saved according to
252 * the AAPCS.
253 * Note that we slightly misuse the prototype by casting the
254 * stack pointer to a void *.
255
256 * The PGDs are always passed as the third argument, in order
257 * to be passed into r2-r3 to the init code (yes, this is
258 * compliant with the PCS!).
259 */
260
261 kvm_call_hyp((void*)hyp_stack_ptr, vector_ptr, pgd_ptr);
262 }
263
264 static inline void __cpu_init_stage2(void)
265 {
266 kvm_call_hyp(__init_stage2_translation);
267 }
268
269 static inline int kvm_arch_dev_ioctl_check_extension(struct kvm *kvm, long ext)
270 {
271 return 0;
272 }
273
274 int kvm_perf_init(void);
275 int kvm_perf_teardown(void);
276
277 void kvm_mmu_wp_memory_region(struct kvm *kvm, int slot);
278
279 struct kvm_vcpu *kvm_mpidr_to_vcpu(struct kvm *kvm, unsigned long mpidr);
280
281 static inline void kvm_arch_hardware_unsetup(void) {}
282 static inline void kvm_arch_sync_events(struct kvm *kvm) {}
283 static inline void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) {}
284 static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
285 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
286
287 static inline void kvm_arm_init_debug(void) {}
288 static inline void kvm_arm_setup_debug(struct kvm_vcpu *vcpu) {}
289 static inline void kvm_arm_clear_debug(struct kvm_vcpu *vcpu) {}
290 static inline void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) {}
291
292 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
293 struct kvm_device_attr *attr);
294 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
295 struct kvm_device_attr *attr);
296 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
297 struct kvm_device_attr *attr);
298
299 static inline bool kvm_arm_harden_branch_predictor(void)
300 {
301 /* No way to detect it yet, pretend it is not there. */
302 return false;
303 }
304
305 #endif /* __ARM_KVM_HOST_H__ */