arch/arm/mach-imx/mach-pcm043.c

   1 /*
   2  *  Copyright (C) 2009 Sascha Hauer, Pengutronix
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/init.h>
  17
  18 #include <linux/platform_device.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/mtd/plat-ram.h>
  21 #include <linux/memory.h>
  22 #include <linux/gpio.h>
  23 #include <linux/gpio/machine.h>
  24 #include <linux/smc911x.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/delay.h>
  27 #include <linux/i2c.h>
  28 #include <linux/property.h>
  29 #include <linux/usb/otg.h>
  30 #include <linux/usb/ulpi.h>
  31
  32 #include <asm/mach-types.h>
  33 #include <asm/mach/arch.h>
  34 #include <asm/mach/time.h>
  35 #include <asm/mach/map.h>
  36
  37 #include "common.h"
  38 #include "devices-imx35.h"
  39 #include "ehci.h"
  40 #include "hardware.h"
  41 #include "iomux-mx35.h"
  42 #include "ulpi.h"
  43
  44 static const struct fb_videomode fb_modedb[] = {
  45         {
  46                 /* 240x320 @ 60 Hz */
  47                 .name           = "Sharp-LQ035Q7",
  48                 .refresh        = 60,
  49                 .xres           = 240,
  50                 .yres           = 320,
  51                 .pixclock       = 185925,
  52                 .left_margin    = 9,
  53                 .right_margin   = 16,
  54                 .upper_margin   = 7,
  55                 .lower_margin   = 9,
  56                 .hsync_len      = 1,
  57                 .vsync_len      = 1,
  58                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
  59                 .vmode          = FB_VMODE_NONINTERLACED,
  60                 .flag           = 0,
  61         }, {
  62                 /* 240x320 @ 60 Hz */
  63                 .name           = "TX090",
  64                 .refresh        = 60,
  65                 .xres           = 240,
  66                 .yres           = 320,
  67                 .pixclock       = 38255,
  68                 .left_margin    = 144,
  69                 .right_margin   = 0,
  70                 .upper_margin   = 7,
  71                 .lower_margin   = 40,
  72                 .hsync_len      = 96,
  73                 .vsync_len      = 1,
  74                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
  75                 .vmode          = FB_VMODE_NONINTERLACED,
  76                 .flag           = 0,
  77         },
  78 };
  79
  80 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
  81         .name           = "Sharp-LQ035Q7",
  82         .mode           = fb_modedb,
  83         .num_modes      = ARRAY_SIZE(fb_modedb),
  84 };
  85
  86 static struct physmap_flash_data pcm043_flash_data = {
  87         .width  = 2,
  88 };
  89
  90 static struct resource pcm043_flash_resource = {
  91         .start  = 0xa0000000,
  92         .end    = 0xa1ffffff,
  93         .flags  = IORESOURCE_MEM,
  94 };
  95
  96 static struct platform_device pcm043_flash = {
  97         .name   = "physmap-flash",
  98         .id     = 0,
  99         .dev    = {
 100                 .platform_data  = &pcm043_flash_data,
 101         },
 102         .resource = &pcm043_flash_resource,
 103         .num_resources = 1,
 104 };
 105
 106 static const struct imxuart_platform_data uart_pdata __initconst = {
 107         .flags = IMXUART_HAVE_RTSCTS,
 108 };
 109
 110 static const struct imxi2c_platform_data pcm043_i2c0_data __initconst = {
 111         .bitrate = 50000,
 112 };
 113
 114 static const struct property_entry board_eeprom_properties[] = {
 115         PROPERTY_ENTRY_U32("pagesize", 32),
 116         { }
 117 };
 118
 119 static struct i2c_board_info pcm043_i2c_devices[] = {
 120         {
 121                 I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
 122                 .properties = board_eeprom_properties,
 123         }, {
 124                 I2C_BOARD_INFO("pcf8563", 0x51),
 125         },
 126 };
 127
 128 static struct platform_device *devices[] __initdata = {
 129         &pcm043_flash,
 130 };
 131
 132 static const iomux_v3_cfg_t pcm043_pads[] __initconst = {
 133         /* UART1 */
 134         MX35_PAD_CTS1__UART1_CTS,
 135         MX35_PAD_RTS1__UART1_RTS,
 136         MX35_PAD_TXD1__UART1_TXD_MUX,
 137         MX35_PAD_RXD1__UART1_RXD_MUX,
 138         /* UART2 */
 139         MX35_PAD_CTS2__UART2_CTS,
 140         MX35_PAD_RTS2__UART2_RTS,
 141         MX35_PAD_TXD2__UART2_TXD_MUX,
 142         MX35_PAD_RXD2__UART2_RXD_MUX,
 143         /* FEC */
 144         MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
 145         MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
 146         MX35_PAD_FEC_RX_DV__FEC_RX_DV,
 147         MX35_PAD_FEC_COL__FEC_COL,
 148         MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
 149         MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
 150         MX35_PAD_FEC_TX_EN__FEC_TX_EN,
 151         MX35_PAD_FEC_MDC__FEC_MDC,
 152         MX35_PAD_FEC_MDIO__FEC_MDIO,
 153         MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
 154         MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
 155         MX35_PAD_FEC_CRS__FEC_CRS,
 156         MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
 157         MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
 158         MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
 159         MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
 160         MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
 161         MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
 162         /* I2C1 */
 163         MX35_PAD_I2C1_CLK__I2C1_SCL,
 164         MX35_PAD_I2C1_DAT__I2C1_SDA,
 165         /* Display */
 166         MX35_PAD_LD0__IPU_DISPB_DAT_0,
 167         MX35_PAD_LD1__IPU_DISPB_DAT_1,
 168         MX35_PAD_LD2__IPU_DISPB_DAT_2,
 169         MX35_PAD_LD3__IPU_DISPB_DAT_3,
 170         MX35_PAD_LD4__IPU_DISPB_DAT_4,
 171         MX35_PAD_LD5__IPU_DISPB_DAT_5,
 172         MX35_PAD_LD6__IPU_DISPB_DAT_6,
 173         MX35_PAD_LD7__IPU_DISPB_DAT_7,
 174         MX35_PAD_LD8__IPU_DISPB_DAT_8,
 175         MX35_PAD_LD9__IPU_DISPB_DAT_9,
 176         MX35_PAD_LD10__IPU_DISPB_DAT_10,
 177         MX35_PAD_LD11__IPU_DISPB_DAT_11,
 178         MX35_PAD_LD12__IPU_DISPB_DAT_12,
 179         MX35_PAD_LD13__IPU_DISPB_DAT_13,
 180         MX35_PAD_LD14__IPU_DISPB_DAT_14,
 181         MX35_PAD_LD15__IPU_DISPB_DAT_15,
 182         MX35_PAD_LD16__IPU_DISPB_DAT_16,
 183         MX35_PAD_LD17__IPU_DISPB_DAT_17,
 184         MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
 185         MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
 186         MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
 187         MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
 188         MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
 189         MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
 190         MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
 191         /* gpio */
 192         MX35_PAD_ATA_CS0__GPIO2_6,
 193         /* USB host */
 194         MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
 195         MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
 196         /* SSI */
 197         MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
 198         MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
 199         MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
 200         MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
 201         /* CAN2 */
 202         MX35_PAD_TX5_RX0__CAN2_TXCAN,
 203         MX35_PAD_TX4_RX1__CAN2_RXCAN,
 204         /* esdhc */
 205         MX35_PAD_SD1_CMD__ESDHC1_CMD,
 206         MX35_PAD_SD1_CLK__ESDHC1_CLK,
 207         MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
 208         MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
 209         MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
 210         MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
 211         MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */
 212         MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */
 213 };
 214
 215 #define AC97_GPIO_TXFS  IMX_GPIO_NR(2, 31)
 216 #define AC97_GPIO_TXD   IMX_GPIO_NR(2, 28)
 217 #define AC97_GPIO_RESET IMX_GPIO_NR(2, 0)
 218
 219 static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97)
 220 {
 221         iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
 222         iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
 223         int ret;
 224
 225         ret = gpio_request(AC97_GPIO_TXFS, "SSI");
 226         if (ret) {
 227                 printk("failed to get GPIO_TXFS: %d\n", ret);
 228                 return;
 229         }
 230
 231         mxc_iomux_v3_setup_pad(txfs_gpio);
 232
 233         /* warm reset */
 234         gpio_direction_output(AC97_GPIO_TXFS, 1);
 235         udelay(2);
 236         gpio_set_value(AC97_GPIO_TXFS, 0);
 237
 238         gpio_free(AC97_GPIO_TXFS);
 239         mxc_iomux_v3_setup_pad(txfs);
 240 }
 241
 242 static void pcm043_ac97_cold_reset(struct snd_ac97 *ac97)
 243 {
 244         iomux_v3_cfg_t txfs_gpio = MX35_PAD_STXFS4__GPIO2_31;
 245         iomux_v3_cfg_t txfs = MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS;
 246         iomux_v3_cfg_t txd_gpio = MX35_PAD_STXD4__GPIO2_28;
 247         iomux_v3_cfg_t txd = MX35_PAD_STXD4__AUDMUX_AUD4_TXD;
 248         iomux_v3_cfg_t reset_gpio = MX35_PAD_SD2_CMD__GPIO2_0;
 249         int ret;
 250
 251         ret = gpio_request(AC97_GPIO_TXFS, "SSI");
 252         if (ret)
 253                 goto err1;
 254
 255         ret = gpio_request(AC97_GPIO_TXD, "SSI");
 256         if (ret)
 257                 goto err2;
 258
 259         ret = gpio_request(AC97_GPIO_RESET, "SSI");
 260         if (ret)
 261                 goto err3;
 262
 263         mxc_iomux_v3_setup_pad(txfs_gpio);
 264         mxc_iomux_v3_setup_pad(txd_gpio);
 265         mxc_iomux_v3_setup_pad(reset_gpio);
 266
 267         gpio_direction_output(AC97_GPIO_TXFS, 0);
 268         gpio_direction_output(AC97_GPIO_TXD, 0);
 269
 270         /* cold reset */
 271         gpio_direction_output(AC97_GPIO_RESET, 0);
 272         udelay(10);
 273         gpio_direction_output(AC97_GPIO_RESET, 1);
 274
 275         mxc_iomux_v3_setup_pad(txd);
 276         mxc_iomux_v3_setup_pad(txfs);
 277
 278         gpio_free(AC97_GPIO_RESET);
 279 err3:
 280         gpio_free(AC97_GPIO_TXD);
 281 err2:
 282         gpio_free(AC97_GPIO_TXFS);
 283 err1:
 284         if (ret)
 285                 printk("%s failed with %d\n", __func__, ret);
 286         mdelay(1);
 287 }
 288
 289 static const struct imx_ssi_platform_data pcm043_ssi_pdata __initconst = {
 290         .ac97_reset = pcm043_ac97_cold_reset,
 291         .ac97_warm_reset = pcm043_ac97_warm_reset,
 292         .flags = IMX_SSI_USE_AC97,
 293 };
 294
 295 static const struct mxc_nand_platform_data
 296 pcm037_nand_board_info __initconst = {
 297         .width = 1,
 298         .hw_ecc = 1,
 299 };
 300
 301 static int pcm043_otg_init(struct platform_device *pdev)
 302 {
 303         return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
 304 }
 305
 306 static struct mxc_usbh_platform_data otg_pdata __initdata = {
 307         .init   = pcm043_otg_init,
 308         .portsc = MXC_EHCI_MODE_UTMI,
 309 };
 310
 311 static int pcm043_usbh1_init(struct platform_device *pdev)
 312 {
 313         return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
 314                         MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN);
 315 }
 316
 317 static const struct mxc_usbh_platform_data usbh1_pdata __initconst = {
 318         .init   = pcm043_usbh1_init,
 319         .portsc = MXC_EHCI_MODE_SERIAL,
 320 };
 321
 322 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
 323         .operating_mode = FSL_USB2_DR_DEVICE,
 324         .phy_mode       = FSL_USB2_PHY_UTMI,
 325 };
 326
 327 static bool otg_mode_host __initdata;
 328
 329 static int __init pcm043_otg_mode(char *options)
 330 {
 331         if (!strcmp(options, "host"))
 332                 otg_mode_host = true;
 333         else if (!strcmp(options, "device"))
 334                 otg_mode_host = false;
 335         else
 336                 pr_info("otg_mode neither \"host\" nor \"device\". "
 337                         "Defaulting to device\n");
 338         return 1;
 339 }
 340 __setup("otg_mode=", pcm043_otg_mode);
 341
 342 static struct esdhc_platform_data sd1_pdata = {
 343         .wp_type = ESDHC_WP_GPIO,
 344         .cd_type = ESDHC_CD_GPIO,
 345 };
 346
 347 static struct gpiod_lookup_table sd1_gpio_table = {
 348         .dev_id = "sdhci-esdhc-imx35.0",
 349         .table = {
 350                 /* Card detect: bank 2 offset 24 */
 351                 GPIO_LOOKUP("imx35-gpio.2", 24, "cd", GPIO_ACTIVE_LOW),
 352                 /* Write protect: bank 2 offset 23 */
 353                 GPIO_LOOKUP("imx35-gpio.2", 23, "wp", GPIO_ACTIVE_LOW),
 354                 { },
 355         },
 356 };
 357
 358 /*
 359  * Board specific initialization.
 360  */
 361 static void __init pcm043_init(void)
 362 {
 363         imx35_soc_init();
 364
 365         mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads));
 366
 367         imx35_add_fec(NULL);
 368         platform_add_devices(devices, ARRAY_SIZE(devices));
 369         imx35_add_imx2_wdt();
 370
 371         imx35_add_imx_uart0(&uart_pdata);
 372         imx35_add_mxc_nand(&pcm037_nand_board_info);
 373
 374         imx35_add_imx_uart1(&uart_pdata);
 375
 376         i2c_register_board_info(0, pcm043_i2c_devices,
 377                         ARRAY_SIZE(pcm043_i2c_devices));
 378
 379         imx35_add_imx_i2c0(&pcm043_i2c0_data);
 380
 381         imx35_add_ipu_core();
 382         imx35_add_mx3_sdc_fb(&mx3fb_pdata);
 383
 384         if (otg_mode_host) {
 385                 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
 386                                 ULPI_OTG_DRVVBUS_EXT);
 387                 if (otg_pdata.otg)
 388                         imx35_add_mxc_ehci_otg(&otg_pdata);
 389         }
 390         imx35_add_mxc_ehci_hs(&usbh1_pdata);
 391
 392         if (!otg_mode_host)
 393                 imx35_add_fsl_usb2_udc(&otg_device_pdata);
 394
 395         imx35_add_flexcan1();
 396 }
 397
 398 static void __init pcm043_late_init(void)
 399 {
 400         imx35_add_imx_ssi(0, &pcm043_ssi_pdata);
 401
 402         gpiod_add_lookup_table(&sd1_gpio_table);
 403         imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
 404 }
 405
 406 static void __init pcm043_timer_init(void)
 407 {
 408         mx35_clocks_init();
 409 }
 410
 411 MACHINE_START(PCM043, "Phytec Phycore pcm043")
 412         /* Maintainer: Pengutronix */
 413         .atag_offset = 0x100,
 414         .map_io = mx35_map_io,
 415         .init_early = imx35_init_early,
 416         .init_irq = mx35_init_irq,
 417         .init_time = pcm043_timer_init,
 418         .init_machine   = pcm043_init,
 419         .init_late      = pcm043_late_init,
 420         .restart        = mxc_restart,
 421 MACHINE_END