]>
git.ipfire.org Git - people/ms/u-boot.git/blob - arch/arm/mach-imx/timer.c
3 * Sascha Hauer, Pengutronix
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/sys_proto.h>
17 /* General purpose timers registers */
20 unsigned int prescaler
;
22 unsigned int nouse
[6];
26 static struct mxc_gpt
*cur_gpt
= (struct mxc_gpt
*)GPT1_BASE_ADDR
;
28 /* General purpose timers bitfields */
29 #define GPTCR_SWR (1 << 15) /* Software reset */
30 #define GPTCR_24MEN (1 << 10) /* Enable 24MHz clock input */
31 #define GPTCR_FRR (1 << 9) /* Freerun / restart */
32 #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source 32khz */
33 #define GPTCR_CLKSOURCE_OSC (5 << 6) /* Clock source OSC */
34 #define GPTCR_CLKSOURCE_PRE (1 << 6) /* Clock source PRECLK */
35 #define GPTCR_CLKSOURCE_MASK (0x7 << 6)
36 #define GPTCR_TEN 1 /* Timer enable */
38 #define GPTPR_PRESCALER24M_SHIFT 12
39 #define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
41 DECLARE_GLOBAL_DATA_PTR
;
43 static inline int gpt_has_clk_source_osc(void)
45 #if defined(CONFIG_MX6)
46 if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0
)) ||
47 is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() ||
48 is_mx6ull() || is_mx6sll())
57 static inline ulong
gpt_get_clk(void)
59 #ifdef CONFIG_MXC_GPT_HCLK
60 if (gpt_has_clk_source_osc())
63 return mxc_get_clock(MXC_IPG_PERCLK
);
73 /* setup GP Timer 1 */
74 __raw_writel(GPTCR_SWR
, &cur_gpt
->control
);
76 /* We have no udelay by now */
77 __raw_writel(0, &cur_gpt
->control
);
79 i
= __raw_readl(&cur_gpt
->control
);
80 i
&= ~GPTCR_CLKSOURCE_MASK
;
82 #ifdef CONFIG_MXC_GPT_HCLK
83 if (gpt_has_clk_source_osc()) {
84 i
|= GPTCR_CLKSOURCE_OSC
| GPTCR_TEN
;
87 * For DL/S, SX, UL, ULL, SLL set 24Mhz OSC
88 * Enable bit and prescaler
90 if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() ||
94 /* Produce 3Mhz clock */
95 __raw_writel((7 << GPTPR_PRESCALER24M_SHIFT
),
99 i
|= GPTCR_CLKSOURCE_PRE
| GPTCR_TEN
;
102 __raw_writel(0, &cur_gpt
->prescaler
); /* 32Khz */
103 i
|= GPTCR_CLKSOURCE_32
| GPTCR_TEN
;
105 __raw_writel(i
, &cur_gpt
->control
);
110 unsigned long timer_read_counter(void)
112 return __raw_readl(&cur_gpt
->counter
); /* current tick value */
116 * This function is derived from PowerPC code (timebase clock frequency).
117 * On ARM it returns the number of timer ticks per second.
119 ulong
get_tbclk(void)
121 return gpt_get_clk();
125 * This function is intended for SHORT delays only.
126 * It will overflow at around 10 seconds @ 400MHz,
127 * or 20 seconds @ 200MHz.
129 unsigned long usec2ticks(unsigned long _usec
)
131 unsigned long long usec
= _usec
;
135 do_div(usec
, 1000000);