arch/arm/mach-meson/board-axg.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2016 Beniamino Galvani <b.galvani@gmail.com>
   4  * (C) Copyright 2018 Neil Armstrong <narmstrong@baylibre.com>
   5  */
   6
   7 #include <common.h>
   8 #include <init.h>
   9 #include <net.h>
  10 #include <asm/arch/boot.h>
  11 #include <asm/arch/eth.h>
  12 #include <asm/arch/axg.h>
  13 #include <asm/arch/mem.h>
  14 #include <asm/global_data.h>
  15 #include <asm/io.h>
  16 #include <asm/armv8/mmu.h>
  17 #include <linux/sizes.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 int meson_get_boot_device(void)
  22 {
  23         return readl(AXG_AO_SEC_GP_CFG0) & AXG_AO_BOOT_DEVICE;
  24 }
  25
  26 /* Configure the reserved memory zones exported by the secure registers
  27  * into EFI and DTB reserved memory entries.
  28  */
  29 void meson_init_reserved_memory(void *fdt)
  30 {
  31         u64 bl31_size, bl31_start;
  32         u64 bl32_size, bl32_start;
  33         u32 reg;
  34
  35         /*
  36          * Get ARM Trusted Firmware reserved memory zones in :
  37          * - AO_SEC_GP_CFG3: bl32 & bl31 size in KiB, can be 0
  38          * - AO_SEC_GP_CFG5: bl31 physical start address, can be NULL
  39          * - AO_SEC_GP_CFG4: bl32 physical start address, can be NULL
  40          */
  41         reg = readl(AXG_AO_SEC_GP_CFG3);
  42
  43         bl31_size = ((reg & AXG_AO_BL31_RSVMEM_SIZE_MASK)
  44                         >> AXG_AO_BL31_RSVMEM_SIZE_SHIFT) * SZ_1K;
  45         bl32_size = (reg & AXG_AO_BL32_RSVMEM_SIZE_MASK) * SZ_1K;
  46
  47         bl31_start = readl(AXG_AO_SEC_GP_CFG5);
  48         bl32_start = readl(AXG_AO_SEC_GP_CFG4);
  49
  50         /* Add BL31 reserved zone */
  51         if (bl31_start && bl31_size)
  52                 meson_board_add_reserved_memory(fdt, bl31_start, bl31_size);
  53
  54         /* Add BL32 reserved zone */
  55         if (bl32_start && bl32_size)
  56                 meson_board_add_reserved_memory(fdt, bl32_start, bl32_size);
  57 }
  58
  59 phys_size_t get_effective_memsize(void)
  60 {
  61         /* Size is reported in MiB, convert it in bytes */
  62         return ((readl(AXG_AO_SEC_GP_CFG0) & AXG_AO_MEM_SIZE_MASK)
  63                         >> AXG_AO_MEM_SIZE_SHIFT) * SZ_1M;
  64 }
  65
  66 static struct mm_region axg_mem_map[] = {
  67         {
  68                 .virt = 0x0UL,
  69                 .phys = 0x0UL,
  70                 .size = 0x80000000UL,
  71                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  72                          PTE_BLOCK_INNER_SHARE
  73         }, {
  74                 .virt = 0xf0000000UL,
  75                 .phys = 0xf0000000UL,
  76                 .size = 0x10000000UL,
  77                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  78                          PTE_BLOCK_NON_SHARE |
  79                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  80         }, {
  81                 /* List terminator */
  82                 0,
  83         }
  84 };
  85
  86 struct mm_region *mem_map = axg_mem_map;